CN114185458B - Display device and display panel thereof - Google Patents
Display device and display panel thereof Download PDFInfo
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- CN114185458B CN114185458B CN202111504272.1A CN202111504272A CN114185458B CN 114185458 B CN114185458 B CN 114185458B CN 202111504272 A CN202111504272 A CN 202111504272A CN 114185458 B CN114185458 B CN 114185458B
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- 239000000758 substrate Substances 0.000 claims abstract description 63
- 229910052751 metal Inorganic materials 0.000 claims description 67
- 239000002184 metal Substances 0.000 claims description 67
- 239000003990 capacitor Substances 0.000 description 17
- 238000010586 diagram Methods 0.000 description 12
- 230000000694 effects Effects 0.000 description 9
- 239000011521 glass Substances 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
- G06F3/0445—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
- G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
Abstract
The embodiment of the application discloses a display device and a display panel thereof, wherein the display panel comprises: a pixel electrode and an array substrate side common electrode. The array substrate side common electrode is arranged opposite to the pixel electrode, the periphery of the array substrate side common electrode is wider than the periphery of the pixel electrode, and a transparent conductive layer is arranged in the area, opposite to the pixel electrode, of the array substrate side common electrode. In the embodiment of the application, the transparent conductive layer opposite to the pixel electrode is arranged on the public electrode at the side of the array substrate, and is opposite to the pixel electrode, so that the transparent conductive layer is transparent, and can cover the pixel electrode layer without influencing display, and meanwhile, the area of the touch electrode plate is increased, so that the technical problem that the touch performance is limited due to smaller area of the touch electrode plate and smaller sensing capacitance of fingers after the public electrode at the side of the array substrate is reused as the touch electrode plate in the prior art is solved.
Description
Technical Field
The application relates to the field of display, in particular to display equipment and a display panel thereof.
Background
The liquid crystal display panel, abbreviated as liquid crystal panel, has the advantages of thin body, power saving, no radiation and the like, and is widely applied, such as: liquid crystal televisions, smart phones, digital cameras, tablet computers, computer screens, notebook computer screens, or the like are dominant in the field of flat panel display.
The liquid crystal display panel is composed of a color film substrate, a thin film transistor array substrate and a liquid crystal layer arranged between the two substrates. The liquid crystal display panel is internally provided with a plurality of pixels which are arranged in an array mode, and when driving voltages are applied to the two substrates, each pixel displays under the driving of the pixel circuit.
For a vertically aligned liquid crystal display panel, the touch surface can only be placed on one side of the array substrate due to the existence of the common electrode on the color film substrate side of the whole surface. Therefore, the common electrode on the array substrate side can be reused as the touch electrode plate. However, the area of the touch electrode plate is smaller, and the sensing capacitance of the touch electrode plate and the finger is smaller, so that the touch performance is limited.
Disclosure of Invention
The embodiment of the application provides display equipment and a display panel thereof, which can solve the technical problem that the touch performance is limited because the area of a touch electrode plate is smaller and the sensing capacitance of a finger is smaller after the common electrode on the array substrate side is reused as the touch electrode plate in the prior art.
An embodiment of the present application provides a display panel including:
a pixel electrode;
the array substrate side common electrode is arranged opposite to the pixel electrode, the periphery of the array substrate side common electrode is wider than the periphery of the pixel electrode, and a transparent conductive layer is arranged in the area, opposite to the pixel electrode, of the array substrate side common electrode.
In some embodiments of the present application, the array substrate-side common electrode includes:
the metal grid layer is arranged opposite to the pixel electrode, and an opening is formed in the area, opposite to the pixel electrode, of the metal grid layer;
and the transparent conductive layer is arranged opposite to the opening and is electrically connected with the metal grid layer.
In some embodiments of the present application, the transparent conductive layer is disposed on a side of the metal grid layer facing the pixel electrode, and covers the opening.
In some embodiments of the present application, the transparent conductive layer is disposed on a side of the metal grid layer facing away from the pixel electrode, and covers the opening.
In some embodiments of the application, the transparent conductive layer is embedded in the opening and forms at least one gap with the metal grid layer.
In some embodiments of the application, the transparent conductive layer comprises:
the main body layer is arranged on one side of the metal grid layer and covers the opening;
and the embedded layer is arranged on one surface of the main body layer facing the metal grid layer and is embedded into the opening so as to connect the main body layer with the metal grid layer.
In some embodiments of the application, at least one gap is formed between the embedded layer and the metal grid layer.
In some embodiments of the present application, two intersecting stripe holes are etched in a region of the array substrate side common electrode facing the pixel electrode.
In some embodiments of the present application, the area of the common electrode on the array substrate opposite to the pixel electrode is etched with a first stripe hole arranged in a two-to-two manner, and a second stripe hole vertically arranged between the two first stripe holes.
Correspondingly, the embodiment of the application also provides a display device, which comprises:
a housing;
the display panel as described above, the display panel is mounted in the housing.
In the embodiment of the application, the transparent conductive layer opposite to the pixel electrode is arranged on the public electrode at the side of the array substrate, and is opposite to the pixel electrode, so that the transparent conductive layer is transparent, and can cover the pixel electrode layer without influencing display, and meanwhile, the area of the touch electrode plate is increased, so that the technical problem that the touch performance is limited due to smaller area of the touch electrode plate and smaller sensing capacitance of fingers after the public electrode at the side of the array substrate is reused as the touch electrode plate in the prior art is solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present application.
Fig. 2 is a schematic diagram of a display panel according to an embodiment of the present application.
Fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the application.
Fig. 4 is a schematic structural diagram of a common electrode on the side of an array substrate according to a first embodiment of the present application.
Fig. 5 is a schematic structural diagram of a metal grid layer according to an embodiment of the present application.
Fig. 6 is a schematic structural diagram of a common electrode on the array substrate side according to a second embodiment of the present application.
Fig. 7 is a schematic structural diagram of a common electrode on the array substrate side according to a third embodiment of the present application.
Fig. 8 is a schematic structural diagram of a common electrode on the side of an array substrate according to a fourth embodiment of the present application.
Fig. 9 is a schematic structural diagram of a common electrode on the array substrate side according to a fifth embodiment of the present application.
Fig. 10 is a schematic structural diagram of a common electrode on the array substrate side according to a sixth embodiment of the present application.
Fig. 11 is a schematic structural diagram of a common electrode on the array substrate side according to a seventh embodiment of the present application.
Fig. 12 is a schematic structural diagram of an array substrate side common electrode according to an eighth embodiment of the present application.
Reference numerals illustrate:
10. a display panel; 20. a housing; 100. a glass panel; 200. a first metal layer; 300. a first insulating layer; 400. a second metal layer; 500. a second insulating layer; 600. a pixel electrode; 210. a gate layer; 220. an array substrate side common electrode; 410. a source electrode layer; 420. a drain layer; 430. reading the line layer; 401. a silicon-based layer; 221. a transparent conductive layer; 222. a metal grid layer; 224. a bar-shaped hole; 225. a first bar-shaped hole; 226. a second bar-shaped hole; 2211. a body layer; 2212. an embedding layer; 2221. an opening; 2201. a gap.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application. Furthermore, it should be understood that the detailed description is presented herein for purposes of illustration and description only, and is not intended to limit the application. In the present application, unless otherwise indicated, terms of orientation such as "upper" and "lower" are used to generally refer to the upper and lower positions of the device in actual use or operation, and specifically the orientation of the drawing figures; while "inner" and "outer" are for the outline of the device.
The embodiment of the application provides a display device and a display panel 10 thereof. The following will describe in detail. The following description of the embodiments is not intended to limit the preferred embodiments.
The present application provides a display device which can be mounted in various products having a display function. For example, the electronic product may be a smart terminal, a notebook computer, a photographic device, a wearable device, an electronic scale, a vehicle-mounted display, a television, and the like.
Referring to fig. 1 and 2, the display device includes a housing 20 and a display panel 10 mounted in the housing 20. The display panel 10 includes a glass panel 100, a first metal layer 200, a first insulating layer 300, a second metal layer 400, a second insulating layer 500, and a pixel electrode 600. The first metal layer 200 is disposed on a side of the glass panel 100, the first insulating layer 300 is disposed on a side of the first metal layer 200 facing away from the glass panel 100, the second metal layer 400 is disposed on a side of the first insulating layer 300 facing away from the first metal layer 200, the second insulating layer 500 is disposed on a side of the second metal layer 400 facing away from the silicon substrate 401, and the pixel electrode 600 is disposed on a side of the second insulating layer 500 facing away from the second metal layer 400.
Referring to fig. 3 in combination, the first metal layer 200 includes a gate layer 210 and an array substrate-side common electrode 220 disposed in the same layer. The array substrate side common electrode 220 is disposed opposite to the pixel electrode 600 and has a periphery wider than the pixel electrode 600 to cover the pixel electrode 600. The gate layer 210 is disposed at one side of the array substrate-side common electrode 220 and is isolated from the array substrate-side common electrode 220 by the first insulating layer 300.
The second metal layer 400 includes a source layer 410, a drain layer 420, and a read line layer 430, all of which are disposed on the same layer. The readout line layer 430 is disposed on a side opposite to the array substrate side common electrode 220, and is electrically connected to the array substrate side common electrode 220 through the first insulating layer 300, so as to output the touch signal of the display panel 10 from the array substrate side common electrode 220 to the corresponding processing module for processing. A silicon base layer 401 is further disposed between the source layer 410, the drain layer 420 and the first insulating layer 300, and the silicon base layer 401 is disposed opposite to the gate layer 210. The drain layer 420 is disposed on a side of the silicon base layer 401 facing the read line layer 430 and isolated from the read line layer 430 by the second insulating layer 500, and the source layer 410 is disposed on a side of the silicon base layer 401 facing away from the read line layer 430 and isolated from the drain layer 420 by the second insulating layer 500.
The pixel electrode 600 is electrically connected to the drain electrode layer 420 through the second insulating layer 500, and a region thereof opposite to the array substrate-side common electrode 220 is shielded by the array substrate-side common electrode 220 to form a storage capacitor together with the array substrate-side common electrode 220.
In an embodiment of the present application, referring to fig. 4, the array substrate side common electrode 220 includes a transparent conductive layer 221. The transparent conductive layer 221 is made of a transparent conductive material and is disposed opposite to the pixel electrode 600, and since the transparent conductive layer 221 is transparent, the pixel point is not shielded even when the pixel electrode 600 is covered, and the display is not affected. Meanwhile, compared with the prior art, the area of the array substrate side common electrode serving as the touch electrode plate is increased by the scheme of hollowing out the area of the array substrate side common electrode facing the pixel electrode 600, which covers the pixel electrode 600 layer, so that the touch capacitance is increased, and the technical problem that the touch performance is limited due to the fact that the area of the touch electrode plate is smaller and the sensing capacitance of a finger is smaller after the array substrate side common electrode is reused as the touch electrode plate in the prior art is solved. The storage capacitor is formed by the common electrode 220 on the side of the array substrate and the pixel electrode 600 together, the overlapping area of the common electrode 220 on the side of the array substrate and the pixel electrode 600 is increased, the storage capacitor can be increased, the common electrode 220 on the side of the array substrate is prevented from being influenced by voltage jump, crosstalk is generated on picture display, and further the display effect is optimized.
In some embodiments of the present application, the transparent conductive layer 221 is made of Indium Tin Oxide (ITO). The ITO has better transparency and higher conductivity, and can maintain better conductivity on the premise of ensuring the display effect.
In some embodiments of the present application, the array substrate-side common electrode includes only the transparent conductive layer 221 using an ITO material. The transparent conductive layer 221 directly contacts with the read line layer 430, and realizes electrical signal connection, and outputs the touch signal of the display panel 10 to the relevant processing module for processing through the read line layer 430. When the transparent electrode materials such as ITO are used for all the common electrodes on the array substrate side, the transparent area on the common electrodes on the array substrate side can be maximized, and then the transparent area is matched with the pixel points with larger size, so that the display effect of the whole display panel 10 is improved.
In other embodiments of the present application, referring to fig. 5, the array substrate side common electrode 220 includes a metal grid layer 222 in addition to the transparent conductive layer 221.
The metal grid layer 222 is disposed opposite to the pixel electrode 600, and an area thereof opposite to the pixel electrode 600 is provided with an opening 2221. The metal grid layer 222 is in contact with the read line layer 430 and makes electrical signal connection. The transparent conductive layer 221 is disposed opposite to the opening 2221 and electrically connected to the metal grid layer 222. In this embodiment, the metal grid layer 222 is made of a material with good conductivity such as copper and silver, and the transparent conductive layer 221 is electrically connected with the read line layer 430 through the metal grid layer 222, so that the conductivity of the common electrode 220 on the entire array substrate side is improved, and further the touch sensitivity of the display panel 10 is ensured. Meanwhile, since the metal grid layer 222 is provided with the opening 2221 in the area facing the pixel electrode 600, it will not shade the pixel, and the display effect will not be affected.
In the embodiment of the present application, please continue to refer to fig. 4, the transparent conductive layer 221 and the metal grid layer 222 are arranged in the same layer, the transparent conductive layer 221 is embedded in the opening 2221, and the outer sidewall of the transparent conductive side contacts with the inner sidewall of the metal grid layer 222 to realize electrical signal connection. In this embodiment, the transparent conductive layer 221 and the metal grid layer 222 are arranged in the same layer, so that the thickness of the display panel 10 is not increased, and the transparent conductive layer 221 can be directly fixed in the metal grid layer 222 by embedding the transparent conductive layer 221 into the opening 2221.
In some embodiments of the present application, referring to fig. 6, a plurality of trenches are etched on an outer sidewall of the transparent conductive layer 221, so that at least one gap 2201 is formed between the transparent conductive layer 221 and the metal grid layer 222, so as to reduce an overlapping area between the common electrode 220 and the pixel electrode 600 on the array substrate side, and avoid that the storage capacitor is too high, which results in that the storage capacitor needs to be charged for a long time in a frame idle period, especially for a short frame idle period in a high frame rate mode, the storage capacitor is too high, which results in that the charge amount of the storage capacitor is too low, thereby affecting the display effect.
In other embodiments of the present application, referring to fig. 7, the transparent conductive layer 221 is disposed on a side of the metal grid layer 222 facing away from the pixel electrode 600, and covers the opening 2221. In this embodiment, the periphery of the transparent conductive layer 221 may be flush with the periphery of the metal grid layer 222, so as to increase the contact area with the metal grid layer 222 and ensure the conductive performance of the common electrode 220 on the array substrate side. Meanwhile, the transparent conductive layer 221 is disposed on a side of the metal grid layer 222 facing away from the pixel electrode 600, so that the transparent conductive layer is closer to the glass panel 100 that can be touched by a finger, and is farther from the pixel electrode 600, and the larger the distance between the two electrode plates is, the smaller the capacitance is, so that the structure of the embodiment can increase the touch capacitance between the array substrate side common electrode 220 and the finger, and simultaneously reduce the storage capacitance between the pixel electrode 600 and the array substrate side common electrode 220. While improving the touch sensitivity of the display panel 10, the storage capacitor is controlled within a reasonable range, so that the problem that the storage capacitor is too small, which causes the common electrode 220 on the side of the array substrate to be easily influenced by voltage jump, crosstalk is generated on picture display, and further the display effect is influenced is avoided, and the problem that the storage capacitor is too large, which causes the storage capacitor to be charged for a long time in a frame idle stage, particularly, in the case of short frame idle time in a high frame rate mode, the too high storage capacitor causes the too small charge amount of the storage capacitor, and influences the display effect is avoided.
In still other embodiments of the present application, referring to fig. 8, the transparent conductive layer 221 is disposed on a side of the metal grid layer 222 facing the pixel electrode 600, and covers the opening 2221. In this embodiment, the periphery of the transparent conductive layer 221 may be flush with the periphery of the metal grid layer 222, so as to increase the contact area with the metal grid layer 222 and ensure the conductive performance of the common electrode 220 on the array substrate side. Meanwhile, in the present embodiment, the transparent conductive layer 221 is disposed on a side of the metal grid layer 222 facing the pixel electrode 600. That is, the metal grid layer 222 is disposed on a side of the glass panel 100, and the transparent conductive layer 221 is disposed on a side of the metal grid layer 222 facing away from the glass panel 100. When assembling, the metal grid layer 222 is firstly arranged on the glass panel 100, then the transparent conductive layer 221 is arranged on the metal grid layer 222, and the metal grid layer 222 can be used as a positioning mark for mounting the transparent conductive layer 221, the scanning line layer and the pixel electrode 600 at the back, so that the subsequent assembling process can be more accurate, and the tolerance in the assembling process is reduced.
In some embodiments of the present application, referring to fig. 9 in combination, the transparent conductive layer 221 includes a body layer 2211 and an embedded layer 2212, the embedded layer 2212 is disposed on one side of the body layer 2211, and the periphery of the embedded layer 2212 is narrower than the body layer 2211. The insertion layer 2212 is inserted into the opening 2221 of the metal grid layer 222, and abuts against the inner side surface of the metal grid layer 222, thereby realizing connection with the metal grid layer 222. The body layer 2211 is positioned on one side of the metal lattice layer 222, overlaps the metal lattice layer 222, and covers the opening 2221. In this embodiment, the contact area between the transparent conductive layer 221 and the metal grid layer 222 is larger, and the conductive performance of the common electrode 220 on the array substrate side is increased. At the same time, by embedding the embedding layer 2212 into the opening 2221 of the metal grid layer 222, a secure connection with the metal grid layer 222 can also be achieved.
In some embodiments of the present application, referring to fig. 10, a plurality of grooves are etched on the outer sidewall of the embedded layer 2212, so that at least one gap 2201 is formed between the embedded layer 2212 and the metal grid layer 222, so as to reduce the overlapping area between the common electrode 220 and the pixel electrode 600 on the array substrate side, and avoid that the storage capacitor is too high, which results in that a longer time is required to charge the storage capacitor in the frame idle period, especially for the case of short frame idle time in the high frame rate mode, the storage capacitor is too high, which results in too little charge of the storage capacitor and affects the display effect.
In some embodiments of the present application, referring to fig. 11 and 12 in combination, various patterns are etched on the area of the common electrode 220 on the array substrate side facing the pixel electrode 600, so as to reduce the overlapping area of the common electrode 220 on the array substrate side and the pixel electrode 600, and further reduce the storage capacitance, so as to avoid the storage capacitance from being too high, which results in that the storage capacitance needs to be charged for a longer time in the frame idle stage, especially for the case of short frame idle time in the high frame rate mode, the storage capacitance is too high, which results in too low charge of the storage capacitance, and affects the display effect. Typically, the pattern is etched into the transparent conductive layer 221, which may also extend to the metal grid layer 222 in some embodiments. In one embodiment, two intersecting stripe-shaped holes 224 are etched in the array substrate-side common electrode 220 to form a cross pattern. In another embodiment, the array substrate side common electrode 220 is etched with two opposite first bar holes 225 and a second bar hole 226 vertically disposed between the two first bar holes 225, and the second bar hole 226 connects the two first bar holes 225 to form a gate pattern or an i-shaped pattern.
The display device and the display panel 10 thereof provided by the embodiments of the present application are described in detail, and specific examples are applied herein to illustrate the principles and embodiments of the present application, and the description of the above embodiments is only for helping to understand the method and core ideas of the present application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, the present description should not be construed as limiting the present application.
Claims (4)
1. A display panel, comprising:
a pixel electrode;
the array substrate side common electrode is arranged opposite to the pixel electrode, the periphery of the array substrate side common electrode is wider than the periphery of the pixel electrode, and a transparent conductive layer is arranged in the area of the array substrate side common electrode opposite to the pixel electrode;
wherein, the array substrate side common electrode includes:
the metal grid layer is arranged opposite to the pixel electrode, and an opening is formed in the area, opposite to the pixel electrode, of the metal grid layer;
the transparent conductive layer is arranged opposite to the opening and is electrically connected with the metal grid layer;
the transparent conductive layer is embedded in the opening and forms at least one gap with the metal grid layer, or the transparent conductive layer comprises: the main body layer is arranged on one side of the metal grid layer and covers the opening; the embedded layer is arranged on one surface of the main body layer facing the metal grid layer and embedded into the opening so as to enable the main body layer to be connected with the metal grid layer, and at least one gap is formed between the embedded layer and the metal grid layer.
2. The display panel of claim 1, wherein the array substrate side common electrode has two intersecting stripe-shaped holes etched in a region facing the pixel electrode.
3. The display panel of claim 1, wherein the array substrate side common electrode has first stripe holes arranged in opposite directions and second stripe holes vertically arranged between the two first stripe holes, and the second stripe holes are communicated with the two first stripe holes.
4. A display device, characterized by comprising:
a housing;
a display panel according to claims 1 to 3, mounted within the housing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111504272.1A CN114185458B (en) | 2021-12-10 | 2021-12-10 | Display device and display panel thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111504272.1A CN114185458B (en) | 2021-12-10 | 2021-12-10 | Display device and display panel thereof |
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| Publication Number | Publication Date |
|---|---|
| CN114185458A CN114185458A (en) | 2022-03-15 |
| CN114185458B true CN114185458B (en) | 2023-12-01 |
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| CN202111504272.1A Active CN114185458B (en) | 2021-12-10 | 2021-12-10 | Display device and display panel thereof |
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| CN103278971A (en) * | 2012-10-10 | 2013-09-04 | 上海天马微电子有限公司 | Thin film transistor array substrate and manufacturing method thereof |
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