CN1032470A - 用于电钝化集成电路的一种布局 - Google Patents

用于电钝化集成电路的一种布局 Download PDF

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CN1032470A
CN1032470A CN88109121A CN88109121A CN1032470A CN 1032470 A CN1032470 A CN 1032470A CN 88109121 A CN88109121 A CN 88109121A CN 88109121 A CN88109121 A CN 88109121A CN 1032470 A CN1032470 A CN 1032470A
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circuit
layout
electric capacity
passivation
ground connection
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CN1013463B (zh
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弗林曼·阿夫
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Carms Enterprises SA
Carmis Enterprises SA
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Carms Enterprises SA
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/1053—Mounted components directly electrically connected to each other, i.e. not via the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

本发明涉及到利用钝化电容以电钝化IC-电路 的一种布置。根据本发明，获得了一个特别简单和有 效的对电路的电钝化，用安装，如胶粘一种金属薄片 (2)在电路上。通过一短的导体把电路的接地(3)连 结到薄片的边缘，并把信号输出(4)和电源导体(5)通 过各自的焊接夹钳电容(7、8)直接连结到薄片的边 缘。

Description

本发明涉及到用于电钝化集成电路的一种布置借助于把地线和信号输出或地线和电源线之间的连结电容进行钝化。
当大量的快速作用的集成电路，所谓IC-电路被一起连结到一个单元即计算机或数据处理机时，某些烦人的相互干扰就会发生。例如，仪器的功能一方面受环境影响干扰，诸如别的计算机，无线电接收机，电视设备以及另一方面，仪器本身对以上外围设备和仪器也有一种干扰，从而产生有误差的结果或根本无结果。这里所提的干扰是一种电磁干扰（EMI）它是幅射的或导体界的（Conducfor-bound）。
除此，问题还不仅表现在干扰上，而且有一个危险，即设备能发射出-离设备有局部范围能被俘获到的信号，而该信号是用于不公开的或保密的信息，称之为信号泄密（revealing    signals）。
所有这些问题在技术上是众所周知的。因此周围环境可通过用金属封罩把设备与这些信号屏蔽起来，並把输入和输出信号进行过滤。当有关设备包括显示器，可见显示萤光屏、键盘等，这样的金属封罩变得非常昂贵，而且很难起作用。进而金属封罩不能有助于阻止设备本身的内部干扰。为了阻止住内部的干扰，标准的做法是在电源和IC电路情况下的电路板的接地端之间加上一个电容。
然而，这种解决法也拖带着一系列的缺点。例如，该解决法不是特别有效以及不能防止住信号的泄密和电磁干扰（EMI）。进而，在密凑的设备中，器件要求占有大多的空间。
另外一些解决法，在文献中已详尽地阐述安设在IC-电路的上部或下部，加用铁氧体过滤器，铁氧体片，多层电路板和平面电容。更深一步的可能性是在IC-电路上面密集排列地安装-或多个电容。然而，该解决法也是无效的。
对于有效地使用没有已知的解法是非常有效或足够简单，特别是用于现有的设备上。
因此，本发明的目的是提供一个简单的，便宜的和有效的解决法，以解决IC-电路的电钝化问题。
根据本发明，该目的的达到是通过用一个金属薄片在这种IC-电路的上表面或下表面的至少是主要部份加以覆盖，该金属薄片是把电路的接地点利用一短导体连伸到薄片的边缘，並把输出信号或电路的电源经过一个钝化电容也连结到薄片上。这种钝化体是很容易地构成的。该金属薄片，其有利点是可用胶粘到IC-电路的一侧，即边缘表面的平面上，将该端自粘结起来。钝化电容的连接成为有高的可行性並很容易进行，特别是当组成电容片子中的一个或多个焊接在信号输出或电源一面和连接于薄片边缘的一侧面之间的时候。
根据本发明集成电路的钝化是取决于有效钝化的所有准则来完成的，诸如具有短的和宽的电源连体以达到低的串连电感，电源电压，小尺寸下（小范围，短长度）所采用表面的信号电压，最小可能的线圈区域，低电容损失，以及接地表面的低电阻抗。由本发明所产生的效应在实践中能得以证实适宜于与实验进行比较，正如下面的说明中所列举的那样。
本发明将结合附图更详尽地加以叙述，该附图以图例演算出本发明布局的例证实施方案以及用有关的结果曲线的试验装置，更详细地是：
图1是根据本发明的IC-电路的一个透视图。
图2是试验装置的轮廓示图。
图3是被试验的IC-电路与连结点的电路图。
图4、5、6和7示出了试验中所得到的曲线。
在图1的所示的实施例中，IC-电路形成在一个通常的拉长了的容器1中，而容器1是铜箔2的薄片牢固地胶粘到其上表面。容器的连结腿是沿该容器的两个长边侧排列，这里的腿3是接地的，而腿4是一输出端。电压电源腿5被布设在容器的看不见的一侧。接地腿3是利用一非常短的牢实的焊接导体6连结到薄片2的边缘，而输出腿4是通过一牢实的焊接钳夹电容7连结到上述薄片的边缘。电压电源腿5是通过一钳夹电容8连结到薄片的边缘。
在图2中所示的IC容器是设在屏蔽室10中。容器1连结到信号发生器11上。在屏蔽室中还设置一双凹面天线12（bicocave-anfenna），该天线是连结到-天线放大器13，谱线分析器14和打印机15。
图3所示的IC-电路1中有5个做记号的点从A到E，其中A和E表示电路板连结到容器1的点而点B、C、D是直接设接在容器的腿上。
下面的测量是在A和E之中耦合-电容为150nF的电容器的情况下进行的。
1.不采用附加的措施，相应于在计算机中正常的情况，例如最大的（max    EMI-level）电磁干扰水平为56dB。（图4）
2.在BoD之间为100nF+4.7nF：最大电磁干扰水平为34dB在CoD之间为47nF+4.7nF（图5）
3.当2+铁氧体平板，最大电磁干扰水平为28dB（图6）
4.在BoD之间为片状电容100nF最大电磁干扰水平为13dB，在COD之间的片状电容为47nF。而且根据本叙述装设着铜箔（图7）
从图4-6和7将可以看到，根据通常布置的上面的1-3和由4所代表的本发明的布置之间有着相当的差别。

Claims (3)

1、利用布设在接地/信号输出和/或接地/电源导体之间的钝化电容方法的电钝化集成电路(1)的布置，其特征在于至少是这样的集成电路(1)的上表面或底表面的主要部分是用金属薄片(2)所覆盖，该薄片是将电路的接地(3)通过一短的导体(6)连接到薄片(2)的边缘，並经过也连接到薄片边缘的钝化电容(7、8)，将接地连结到电路的信号输出(4)和/或电源导体上。
2、根据权利要求1的布置，其特征在于一个或多个钝化电容是焊接在各自信号输出（4）或电源导体（5）为一方和在薄片边缘的连结点为另一方之间的片状电容（7、8）。
3、根据权项要求1或2的布置，其特征在于用金属薄片（2）把集成电路（1）的一侧胶粘到与上述侧面齐平的边缘上。
CN88109121A 1987-10-09 1988-10-08 一种电钝化集成电路的装置 Expired CN1013463B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE8703913A SE458004C (sv) 1987-10-09 1987-10-09 Anordning foer elektrisk avkoppling av integrerade kretsar
SE8703913-7 1987-10-09

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CN1032470A true CN1032470A (zh) 1989-04-19
CN1013463B CN1013463B (zh) 1991-08-07

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US (1) US4920444A (zh)
EP (1) EP0391926A1 (zh)
JP (1) JPH03500593A (zh)
KR (1) KR890702419A (zh)
CN (1) CN1013463B (zh)
AU (1) AU610283B2 (zh)
BG (1) BG51169A3 (zh)
BR (1) BR8807736A (zh)
DK (1) DK86990D0 (zh)
ES (1) ES2009117A6 (zh)
FI (1) FI901524A0 (zh)
HU (1) HUT54265A (zh)
SE (1) SE458004C (zh)
WO (1) WO1989003634A1 (zh)

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US5557504A (en) * 1993-08-31 1996-09-17 Sgs-Thomson Microelectronics, Inc. Surface mountable integrated circuit package with detachable module
US5570273A (en) * 1993-08-31 1996-10-29 Sgs-Thomson Microelectronics, Inc. Surface mountable integrated circuit package with low-profile detachable module
US6274224B1 (en) 1999-02-01 2001-08-14 3M Innovative Properties Company Passive electrical article, circuit articles thereof, and circuit articles comprising a passive electrical article
US6577492B2 (en) 2001-07-10 2003-06-10 3M Innovative Properties Company Capacitor having epoxy dielectric layer cured with aminophenylfluorenes

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* Cited by examiner, † Cited by third party
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US3614546A (en) * 1970-01-07 1971-10-19 Rca Corp Shielded semiconductor device
US4177480A (en) * 1975-10-02 1979-12-04 Licentia Patent-Verwaltungs-G.M.B.H. Integrated circuit arrangement with means for avoiding undesirable capacitive coupling between leads
US4636918A (en) * 1982-07-30 1987-01-13 Rogers Corporation Decoupled integrated circuit package
JPS5934625A (ja) * 1982-08-20 1984-02-25 松尾電機株式会社 チツプ型固体電解コンデンサの製造方法
JPS5954249A (ja) * 1982-09-22 1984-03-29 Fujitsu Ltd 半導体装置
JPS60117705A (ja) * 1983-11-30 1985-06-25 日本メクトロン株式会社 集積回路用バイパスコンデンサ
US4626958A (en) * 1985-01-22 1986-12-02 Rogers Corporation Decoupling capacitor for Pin Grid Array package

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SE458004C (sv) 1991-10-07
ES2009117A6 (es) 1989-08-16
JPH03500593A (ja) 1991-02-07
SE458004B (sv) 1989-02-13
KR890702419A (ko) 1989-12-23
WO1989003634A1 (en) 1989-04-20
SE8703913D0 (sv) 1987-10-09
AU610283B2 (en) 1991-05-16
SE8703913A (zh) 1989-02-23
FI901524A0 (fi) 1990-03-27
US4920444A (en) 1990-04-24
DK86990A (da) 1990-04-06
EP0391926A1 (en) 1990-10-17
BR8807736A (pt) 1990-08-07
AU2556488A (en) 1989-05-02
HU886251D0 (en) 1990-11-28
HUT54265A (en) 1991-01-28
DK86990D0 (da) 1990-04-06
BG51169A3 (en) 1993-02-15
CN1013463B (zh) 1991-08-07

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