CN103199014A - Method for thinning and polishing indium phosphide (InP) materials - Google Patents

Method for thinning and polishing indium phosphide (InP) materials Download PDF

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CN103199014A
CN103199014A CN2013100686416A CN201310068641A CN103199014A CN 103199014 A CN103199014 A CN 103199014A CN 2013100686416 A CN2013100686416 A CN 2013100686416A CN 201310068641 A CN201310068641 A CN 201310068641A CN 103199014 A CN103199014 A CN 103199014A
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polishing
inp material
inp
carried out
attenuate
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CN103199014B (en
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汪宁
苏永波
金智
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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Abstract

The invention discloses a method for thinning and polishing indium phosphide (InP) materials. The method for thinning and polishing the InP materials includes: making a silicon slice grinding pad used for thinning the InP materials; thinning the InP materials by using the silicon slice grinding pad; conducting chemico-mechanical polishing on the InP materials; cleaning the InP materials which are polished through the chemico-mechanical polishing method; and putting the cleaned InP materials into an inductively coupled plasma (ICP) etcher and conducting plasma polishing on the InP materials. By means of the method for thinning and polishing the InP materials, thinning effect is improved greatly, a tinning polishing substrate of pollution free, low damage, high efficiency and mirror effect is achieved, and the problem that the follow-up process of an InP monolithic microwave integrated circuit (MMIC) is difficult is solved.

Description

A kind of method of the InP material being carried out attenuate and polishing
Technical field
The present invention relates to InP MMIC preparing technical field, relate in particular to a kind of improved method of the InP material being carried out attenuate and polishing.
Background technology
Along with new and high technology constantly is applied to military field, the frequency microwave signal frequency is more and more higher, and frequency range is more and more wideer, and the disposal ability of digit chip is more and more stronger, and modern war has progressed into information age and digital times.The fast development of electronic device makes the transmission rate of signal more and more faster; the III-V compounds of group relies on its good frequency characteristic, and its semiconductor device is becoming one of core component of modernized defence equipments such as military communication, radar, guidance, space defense, high-speed intelligent chemical weapons device and electronic countermeasures with relevant ultrahigh speed numeral/Digital Analog Hybrid Circuits.Particularly in the Terahertz research field, the use of InP material is in the ascendant.
In numerous III-V compound semiconductor devices, the InP material has special advantages, this mainly has benefited from its excellent material characteristic, very little lattice mismatch between InGaAs and the InP for example, and very high electron saturation velocities etc., no matter so HEMT structure or HBT structure have very excellent high frequency, high-power performance.But the physical property of InP material is very poor, and is very frangible, and very little collision or vibration all can cause wafer cracked and all that has been achieved is spoiled, so InP material volume manufacturing processing just faces a lot of technologic difficult problems.
For ultra-high frequency, powerful InP MMIC, its heat dissipation problem is difficult to good solution always, the solution of comparative maturity is to make large-area heat radiating metal at the InP wafer substrate back side, positive MMIC circuit and backside heat metal are passed through metallic communication, realize effective release of heat.
Based on this solution, the InP wafer substrate is carried out attenuate, make it to reach very thin thickness, and the surface of attenuate to realize that mirror effect is to satisfy the strongly adherent of back metal.But the physical property of InP fragility causes the technology difficulty of low reduced thickness and mirror effect polishing very big, and attenuate and the glossing of the low thickness of low damage that therefore improves the InP material is significant.
Summary of the invention
(1) technical problem that will solve
In view of this, main purpose of the present invention is to provide a kind of method of the InP material being carried out attenuate and polishing.
(2) technical scheme
For achieving the above object, the invention provides a kind of method that the InP material is carried out attenuate and polishing, comprising: make the InP material is carried out the silicon chip grinding liner that attenuate is used; Utilize this silicon chip grinding liner that the InP material is carried out attenuate; The InP material is carried out chemico-mechanical polishing; The InP material of finishing chemico-mechanical polishing is cleaned; And the InP material after will cleaning is put into ICP etching machine and is carried out plasma polishing.
In the such scheme, described making is carried out the step of the silicon chip grinding liner that attenuate uses to the InP material, comprising: silicon chip is carried out standard RCA cleaning; And use the silicon wafer polishing face surface of sputtering unit after cleaning to adopt RF plasma sputtering Ti/Al 2O 3Nano particle rete structure forms the silicon chip grinding liner.
In the such scheme, described silicon chip is carried out the step of standard RCA cleaning, comprising: silicon chip is cleaned under 100～130 ℃ of temperature with SC-3 reagent: each composition volume ratio is H in the SC-3 reagent 2SO 4: H 2O 2: H 2O=1: 3: 20,10 minutes time; Silicon chip is cleaned under 65～80 ℃ of temperature with SC-1 reagent, each composition volume ratio is NH in the SC-1 reagent 4OH: HO 2: H 2O=1: 1: 5,10 minutes time; Silicon chip is cleaned under 20～25 ℃ of temperature with DHF, each composition volume ratio is HF: H among the DHF 2O=1: 10,10 minutes time; Silicon chip is cleaned under 65～80 ℃ of temperature with SC-2 reagent, each composition volume ratio is HCl: H in the SC-2 reagent 2O 2: H 2O=1: 1: 6,10 minutes time; And rinse well with deionized water (DI), N2 dries up.
In the such scheme, RF plasma sputtering Ti/Al is adopted on the silicon wafer polishing face surface of described use sputtering unit after cleaning 2O 3In the step of nano particle rete structure, Ti thickness is 50nm～80nm, Al 2O 3Thickness is 5 μ m～6 μ m, film thickness uniformity ± 3%.
In the such scheme, described this silicon chip grinding liner that utilizes carries out the step of attenuate to the InP material, comprising: utilize this silicon chip grinding liner, the InP material for the treatment of attenuate is loaded on the grinding clamp, the beginning attenuate; This silicon chip grinding liner rotating speed 30rpm～60rpm, InP material rotation 80rpm～200rpm, grinding milk adopts aqueous sodium hypochlorite solution and 3 μ m Al 2O 3Powder, pH value 11～12.5, pressure 0.1kg/cm 2The final thickness of described InP material attenuate is 60 μ m.
In the such scheme, the described step that the InP material is carried out chemico-mechanical polishing comprises: use the polyimide resin polishing pad, the polishing slurries composition is: 30nm particle diameter SiO 2Powder and Tetramethylammonium hydroxide 5～10% (volume ratio) aqueous solution, pH value 12, polishing pad rotating speed 40rpm～50rpm, InP material rotation 100rpm～120rpm, pressure 0.15kg/cm 2, the thickness after the polishing of InP material finishes finishes CMP (Chemical Mechanical Polishing) process less than 30 μ m.
In the such scheme, the described step that the InP material of finishing chemico-mechanical polishing is cleaned comprises: 1: 10 the fatty alcohol-ether sodium sulfate aqueous solution of employing ratio cleans the InP material of finishing chemico-mechanical polishing, 40 ℃ of solution temperatures, after cleaning is finished, use hot nitrogen to dry up.
In the such scheme, the InP material after described will the cleaning is put into the step that ICP etching machine carries out the plasma polishing, comprising: adopt Cl 2Gas 30sccm, Ar gas 2sccm, RF power 20W～40W, ICP power 200W～300W, etching 10 minutes～15 minutes, again with He gas 5sccm, RF10W etching 10～15 minutes.
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
This method that the InP material is carried out attenuate and polishing of the present invention effectively raises the surface topography after the InP substrate polishes.The attenuate course of processing adopts sputter to prepare Al 2O 3Rete is as the attenuate grinding carrier, sputter Al 2O 3Nano particle rete good uniformity, the compactness height, therefore the InP substrate thinning surface uniformity of preparing is outstanding, and the InP substrate damage is little, and attenuate itself is not introduced other impurity, and is pollution-free.Al 2O 3The new rete continuation use of sputter again after rete consumption is finished, efficient height, good reproducibility.The plasma glossing of final stage has realized that the precision of surface roughness significantly promotes, and has reached other mirror effect of extension level, can remove the residual impurity on InP surface with He.InP substrate final thickness is less than 30 μ m, thickness error ± 1 μ m, and surface roughness Ra is less than 2nm.
Description of drawings
Fig. 1 is the method flow diagram that the InP material is carried out attenuate and polishing provided by the invention;
Fig. 2 adopts sputter to prepare deposit Ti/Al according to the present invention 2O 3The schematic diagram of nano particle rete structure;
Fig. 3 adopts Ti/Al according to the present invention 2O 3The nano particle rete carries out the schematic diagram of attenuate.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
The method that the InP material is carried out attenuate and polishing provided by the invention may further comprise the steps:
Step 1: silicon chip is carried out standard RCA cleaning:
(1), silicon chip is cleaned under 100 ℃～130 ℃ temperature with SC-3 reagent: each composition volume ratio is H in the SC-3 reagent 2SO 4: H 2O 2: H 2O=1: 3: 20,10 minutes time;
(2), silicon chip is cleaned under 65～80 ℃ of temperature with SC-1 reagent, each composition volume ratio is NH in the SC-1 reagent 4OH: HO2: H2O=1: 1: 5,10 minutes time;
(3), silicon chip is cleaned under 20～25 ℃ of temperature with DHF, each composition volume ratio is HF: H among the DHF 2O=1: 10,10 minutes time;
(4), silicon chip is cleaned under 65～80 ℃ of temperature with SC-2 reagent, each composition volume ratio is HCl: H in the SC-2 reagent 2O 2: H 2O=1: 1: 6,10 minutes time;
(5), rinse N well with deionized water (DI) 2Dry up;
Step 2: use the silicon wafer polishing face surface of sputtering unit after step 1 is cleaned to adopt RF plasma sputtering Ti/Al 2O 3Nano particle rete structure, Ti thickness 50nm～80nm, Al 2O 3Thickness 5 μ m～6 μ m, film thickness uniformity ± 3%, shown in Figure 2;
Step 3: the InP material is carried out reduction process: the silicon chip of step 2 as polishing pad, is loaded on the InP substrate for the treatment of attenuate on the grinding clamp beginning attenuate (shown in Figure 3).Silicon chip grinding liner rotating speed 30rpm～60rpm, InP substrate rotation 80rpm～200rpm, grinding milk adopts aqueous sodium hypochlorite solution and 3 μ m Al 2O 3Powder, pH value 11～12.5, pressure 0.1kg/cm 2InP substrate thinning final thickness is about 60 μ m.
Step 4: the InP material is carried out chemico-mechanical polishing (CMP) technology: use the polyimide resin polishing pad, the polishing slurries composition is: 30nm particle diameter SiO 2Powder and Tetramethylammonium hydroxide 5～10% (volume ratio) aqueous solution, pH value 12, polishing pad rotating speed 40rpm～50rpm, InP substrate rotation 100rpm～120rpm, pressure 0.15kg/cm 2, the thickness after the polishing of InP substrate finishes finishes CMP technology less than 30 μ m.
Step 5: the InP material of finishing CMP is carried out cleaning: adopt volume ratio be 1: 10 the fatty alcohol-ether sodium sulfate aqueous solution to the cleaning of step 4,40 ℃ of solution temperatures, clean finish after, use hot nitrogen to dry up.
Step 6: the InP substrate of step 5 cleaning end is put into ICP etching machine carry out the plasma glossing.Adopt Cl 230sccm, Ar2sccm, RF power 20W～40W, ICP power 200W～300W, etching 10 minutes～15 minutes, again with He gas 5sccm, RF10W etching 10 minutes～15 minutes.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of making, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (9)

1. the method that the InP material is carried out attenuate and polishing is characterized in that, comprising:
Making is carried out the silicon chip grinding liner that attenuate is used to the InP material;
Utilize this silicon chip grinding liner that the InP material is carried out attenuate;
The InP material is carried out chemico-mechanical polishing;
The InP material of finishing chemico-mechanical polishing is cleaned; And
InP material after cleaning is put into ICP etching machine carry out the plasma polishing.
2. the method that the InP material is carried out attenuate and polishing according to claim 1 is characterized in that, described making is carried out the step of the silicon chip grinding liner that attenuate uses to the InP material, comprising:
Silicon chip is carried out standard RCA cleaning; And
Use the silicon wafer polishing face surface of sputtering unit after cleaning to adopt RF plasma sputtering Ti/Al 2O 3Nano particle rete structure forms the silicon chip grinding liner.
3. the method that the InP material is carried out attenuate and polishing according to claim 2 is characterized in that, described silicon chip is carried out the step of standard RCA cleaning, comprising:
Silicon chip is cleaned under 100 ℃～130 ℃ temperature with SC-3 reagent: each composition volume ratio is H in the SC-3 reagent 2SO 4: H 2O 2: H 2O=1: 3: 20,10 minutes time;
Silicon chip is cleaned under 65 ℃～80 ℃ temperature with SC-1 reagent, each composition volume ratio is NH in the SC-1 reagent 4OH: HO 2: H 2O=1: 1: 5,10 minutes time;
Silicon chip is cleaned under 20～25 ℃ of temperature with DHF, each composition volume ratio is HF: H among the DHF 2O=1: 10,10 minutes time;
Silicon chip is cleaned under 65 ℃～80 ℃ temperature with SC-2 reagent, each composition volume ratio is HCl: H in the SC-2 reagent 2O 2: H 2O=1: 1: 6,10 minutes time; And
Rinse N well with deionized water 2Dry up.
4. the method that the InP material is carried out attenuate and polishing according to claim 2 is characterized in that, RF plasma sputtering Ti/Al is adopted on the silicon wafer polishing face surface of described use sputtering unit after cleaning 2O 3In the step of nano particle rete structure, Ti thickness is 50nm～80nm, Al 2O 3Thickness is 5 μ m～6 μ m, film thickness uniformity ± 3%.
5. the method that the InP material is carried out attenuate and polishing according to claim 1 is characterized in that, described this silicon chip grinding liner that utilizes carries out the step of attenuate to the InP material, comprising:
Utilize this silicon chip grinding liner, the InP material for the treatment of attenuate is loaded on the grinding clamp, the beginning attenuate; This silicon chip grinding liner rotating speed 30rpm～60rpm, InP material rotation 80rpm～200rpm, grinding milk adopts aqueous sodium hypochlorite solution and 3 μ mAl2O3 powder, pH value 11～12.5, pressure 0.1kg/cm 2
6. the method that the InP material is carried out attenuate and polishing according to claim 5 is characterized in that, the final thickness of described InP material attenuate is 60 μ m.
7. the method that the InP material is carried out attenuate and polishing according to claim 1 is characterized in that, the described step that the InP material is carried out chemico-mechanical polishing comprises:
Use the polyimide resin polishing pad, the polishing slurries composition is: 30nm particle diameter SiO 2Powder and Tetramethylammonium hydroxide 5～10% (volume ratio) aqueous solution, pH value 12, polishing pad rotating speed 40rpm～50rpm, InP material rotation 100rpm～120rpm, pressure 0.15kg/cm 2, the thickness after the polishing of InP material finishes finishes CMP (Chemical Mechanical Polishing) process less than 30 μ m.
8. the method that the InP material is carried out attenuate and polishing according to claim 1 is characterized in that, the described step that the InP material of finishing chemico-mechanical polishing is cleaned comprises:
The employing volume ratio is that 1: 10 the fatty alcohol-ether sodium sulfate aqueous solution cleans the InP material of finishing chemico-mechanical polishing, and 40 ℃ of solution temperatures after cleaning is finished, use hot nitrogen to dry up.
9. the method that the InP material is carried out attenuate and polishing according to claim 1 is characterized in that, the InP material after described will the cleaning is put into the step that ICP etching machine carries out the plasma polishing, comprising:
Adopt Cl 2Gas 30sccm, Ar gas 2sccm, RF power 20W～40W, ICP power 200W～300W, etching 10 minutes～15 minutes, again with He gas 5sccm, RF10W etching 10 minutes～15 minutes.
CN201310068641.6A 2013-03-05 2013-03-05 A kind of method that is thinning and polishing is carried out to InP material Active CN103199014B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106346318A (en) * 2016-11-09 2017-01-25 苏州长光华芯光电技术有限公司 InP (indium phosphide) wafer thinning and polishing method and chemical corrosion device
CN105914137B (en) * 2016-06-23 2019-07-26 北京知投家知识产权运营有限公司 A kind of wet process silicon wafer cleaning method
US10418248B2 (en) 2016-02-16 2019-09-17 Cabot Microelectronics Corporation Method of polishing group III-V materials

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004337992A (en) * 2003-05-13 2004-12-02 Disco Abrasive Syst Ltd Fixed abrasive grain polishing pad, and method of polishing silicon wafer using fixed abrasive grain polishing pad
CN101256952A (en) * 2008-03-27 2008-09-03 薛松生 Method and device for polishing wafer
CN102011106A (en) * 2010-09-07 2011-04-13 天津理工大学 Method for flattening diamond film by using composite process
CN102543665A (en) * 2010-12-07 2012-07-04 中国科学院微电子研究所 Improved rapid thinning method of gallium arsenide substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004337992A (en) * 2003-05-13 2004-12-02 Disco Abrasive Syst Ltd Fixed abrasive grain polishing pad, and method of polishing silicon wafer using fixed abrasive grain polishing pad
CN101256952A (en) * 2008-03-27 2008-09-03 薛松生 Method and device for polishing wafer
CN102011106A (en) * 2010-09-07 2011-04-13 天津理工大学 Method for flattening diamond film by using composite process
CN102543665A (en) * 2010-12-07 2012-07-04 中国科学院微电子研究所 Improved rapid thinning method of gallium arsenide substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10418248B2 (en) 2016-02-16 2019-09-17 Cabot Microelectronics Corporation Method of polishing group III-V materials
CN105914137B (en) * 2016-06-23 2019-07-26 北京知投家知识产权运营有限公司 A kind of wet process silicon wafer cleaning method
CN106346318A (en) * 2016-11-09 2017-01-25 苏州长光华芯光电技术有限公司 InP (indium phosphide) wafer thinning and polishing method and chemical corrosion device

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