CN103163451A - Super computing system oriented self-gating boundary scan test method and device - Google Patents
Super computing system oriented self-gating boundary scan test method and device Download PDFInfo
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- CN103163451A CN103163451A CN2013100711780A CN201310071178A CN103163451A CN 103163451 A CN103163451 A CN 103163451A CN 2013100711780 A CN2013100711780 A CN 2013100711780A CN 201310071178 A CN201310071178 A CN 201310071178A CN 103163451 A CN103163451 A CN 103163451A
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Abstract
The invention discloses a super computing system oriented self-gating boundary scan test method and a super computing system oriented self-gating boundary scan test device. The method comprises the following steps of: calculating to obtain the optimum test joint test action group (JTAG) line according to an input target main board number, a test command and test concurrency to determine a JTAG output port of a monitoring main board and send a control signal; and receiving the control signal of a JTAG gate by using a crossbar network on a rear panel, and changing turn-on and turn-off of each switch in the crossbar switch network according to the control signal to finish gating and executing a test command by using the gated JTAG output port. The device comprises a JTAG controller and the JTAG gate which are positioned on the monitoring main board, and a crossbar switch network module positioned on the rear panel. The method and the device have the advantages of simple structure, few rear panel wire, high test flexibility, high test efficiency and balanced JTAG line load.
Description
Technical field
The present invention is mainly concerned with boundary scan commissioning examination technical field, refer in particular to a kind of towards super computer system from gating boundary scan commissioning method for testing and device.
Background technology
Boundary scan (Boundary Scan Test) technology utilizes boundary scan cell additional in chip pin and steering logic thereof to realize the commissioning examination function irrelevant with packaged type, has overcome that traditional " probe " method efficient is low, cost is high and the problem such as poor reliability.Nineteen ninety U.S. electric and electronic engineering association (IEEE) ratified the boundary scan testing standard that JTAG (Joint Test Action Group) is drafted, formed ieee standard 1149.1, be called for short the JTAG standard.Boundary scan technique has been widely used in the line between internal logic, the line between chip and the complicated printed board (PCB) of commissioning examination chip since proposing, greatly shortened the process that large scale integrated circuit and PCB research and development are produced.
Nearly all chip all has jtag interface at present.According to the JTAG standard, the boundary scan chain that jtag interface provides five pins to be used for the access destination chip, it comprises that data input pin TDI, data output pin TDO, test pattern select pin TMS, test clock pin TCK and optional reset pin TRST.On chip, the inner additional boundary scan cell of other pins is concatenated together, and has consisted of boundary scan register (boundary scan chain).Test data is inputted boundary scan register from TDI, and outputs test result from TDO.
Super computer system adopts mainboard to arrive the system of systems structure to subrack, subrack to rack, rack usually again.For reliability, availability and the serviceability that guarantees system, usually be inserted with at least one monitoring mainboard in each subrack, be responsible for the accent test job of function mainboard in this subrack, and the state during supervisory control system running.Along with the lifting of application level and the expansion of application, the scale of super computer system is more and more huger, and in a performance 10P level super computer system, the mainboard number is up to ten thousand easily, and in single subrack, function mainboard number grows with each passing day; Simultaneously, the function of integrated chip is also more and more, and on mainboard, device density improves constantly, and it is more tediously long, complicated that boundary scan chain becomes.Therefore to have a mainboard to be measured many for the single subrack commissioning examination in super computer system, the characteristics such as scan chain complexity.Realize the examination of single subrack commissioning, be one of major issue of needing to be resolved hurrily of super computer system with how making good use of existing JTAG technique to high-efficiency.
The commissioning examination that the patent that great majority are relevant to boundary scan and paper are mainly paid close attention to single mainboard or chip is optimized, as Chinese invention patent 201120079849.4, Chinese invention patent 201110254917.0 and Chinese invention patent 201210090599.3 etc.Published boundary scan commissioning electricity testing device and method towards super computer system is less at present.Provide a kind of border scanning system based on the high-performance calculation communication construction and method as Chinese invention patent 200710143086.4, the method is connected in mainboard to be measured on jtag bus, can only carry out the commissioning examination to a mainboard at every turn, and efficient is lower.And for example Chinese invention patent 201210083040.8 provides the parallel boundary scan device of a kind of efficient multilink and method, what the method adopted equally is jtag bus form cabling mode, but the boundary scan chain of polylith mainboard is connected into an integral body, can carry out the commissioning examination to the polylith mainboard simultaneously.Yet the weak point of the method is that different mainboards to be measured can only adopt identical commissioning examination order and test data at every turn, and dirigibility is relatively poor.For the commissioning examination realizes maximum concurrency, the monitoring mainboard can be all mainboards to be measured independent JTAG circuit all is set in addition, though can carry out the commissioning examination to any mainboard in subrack simultaneously, there is the defective of backboard cabling complexity in this kind method.
Summary of the invention
The technical problem to be solved in the present invention just is: for the technical matters that prior art exists, the invention provides that a kind of structure is more simple, the backboard cabling is less, commissioning examination dirigibility is better, commissioning examination efficient is higher, the equilibrium of JTAG line load towards super computer system from gating boundary scan commissioning method for testing and device.
For solving the problems of the technologies described above, the present invention by the following technical solutions:
A kind of towards super computer system from gating boundary scan commissioning method for testing, calculate optimum commissioning examination JTAG circuit according to input target mainboard number, commissioning examination order and commissioning examination concurrency, to determine monitoring mainboard JTAG output port and to send control signal; Utilize the control signal of the cross bar switch network reception JTAG gate on backboard, change the break-make of each switch in the cross bar switch network according to control signal, complete gating and utilize the JTAG output port of gating to carry out commissioning examination order.
As a further improvement on the present invention:
When carrying out gating, the destination register of some is set according to the number of mainboard to be measured, certain is 1 and identifies the mainboard to be measured of this correspondence of gating, otherwise this position is 0; Simultaneously, the jtag port register is set, certain is that 1 JTAG output port that identifies this correspondence is occupied.
The idiographic flow of described gating is: the target mainboard of the commissioning of entry terminal examination order number, then obtain the current value of destination register and port register, and judgement target mainboard is in the value of the corresponding position of destination register:
● if corresponding position is 1, represents that certain concurrent user carries out the commissioning examination to this target mainboard, so the gating failure, returns to the busy signal of this target mainboard to monitor terminal;
● if corresponding position is 0, step-by-step search port register:
■ records this port numbers when in the discovery port register, a certain position is 0, stop search; Number build the control signal of cross bar switch network according to port numbers and mainboard, transmit control signal to the cross bar switch network on backboard, and the corresponding position of destination register and port register is put respectively 1, notify simultaneously the port of jtag controller utilization correspondence to carry out this commissioning examination order; Otherwise the gating failure is returned to the busy signal of port to monitor terminal and is built.
The present invention further provides a kind of device that is used for realizing above-mentioned method of testing, it comprises:
Jtag controller is positioned on the monitoring mainboard;
The JTAG gate is positioned on the monitoring mainboard, and the destination register of some is set according to the number of mainboard to be measured in described JTAG gate, and certain is 1 and identifies the mainboard to be measured of this correspondence of gating, otherwise this position is 0; The jtag port register of monitoring mainboard is set in described JTAG gate, and certain is that 1 JTAG output port that identifies this correspondence is occupied; Arrange in described JTAG gate from the gating module, describedly calculate optimum commissioning examination JTAG circuit from the gating module according to input target mainboard number, commissioning examination order and commissioning examination concurrency, to determine monitoring mainboard JTAG output port;
Cross bar switch network module is positioned on backboard, and described cross bar switch network module is connected with the JTAG gate by control signal wire, changes the break-make of each switch in the cross bar switch network according to control signal.
Described jtag controller customizes jtag controller and JTAG output port according to commissioning examination concurrency, mainboard number to be measured on the monitoring mainboard.
Described JTAG output port number tries concurrency less than or equal to mainboard number to be measured and less than the commissioning that the monitoring mainboard can bear.
Compared with prior art, the invention has the advantages that:
1, the present invention dynamically realizes multiple JTAG cabling mode by JTAG gate and cross bar switch network module in commissioning examination process, comprises serial, parallel and serial parallel mixing, has greatly improved the dirigibility of commissioning examination.
2, the present invention effectively reduces the number of backboard cabling, takes full advantage of limited JTAG circuit, realizes maximum boundary scan degree of parallelism according to concurrent demand, and load that can balance JTAG circuit.
3, the present invention than the serial boundary scan cabling mode, has higher commissioning examination efficient.The present invention can be concurrent difference mainboard to be measured is carried out different commissioning examination orders, improved the efficient of commissioning examination.
Description of drawings
Fig. 1 is the logical organization schematic diagram of commissioning electricity testing device of the present invention.
Fig. 2 is the schematic flow sheet of gating method of the present invention.
Fig. 3 is the schematic diagram of cross bar switch network module in the present invention.
Embodiment
Below with reference to Figure of description and specific embodiment, the present invention is described in further details.
Of the present invention towards super computer system from gating boundary scan commissioning method for testing, calculate optimum commissioning examination JTAG circuit according to input target mainboard number, commissioning examination order and commissioning examination concurrency, to determine monitoring mainboard JTAG output port and to send control signal; Utilize the control signal of the cross bar switch network reception JTAG gate on backboard, change the break-make of each switch in the cross bar switch network according to control signal, complete gating and utilize the JTAG output port of gating to carry out commissioning examination order.
When carrying out gating, the destination register of some is set according to the number of mainboard to be measured, certain is 1 and identifies the mainboard to be measured of this correspondence of gating, otherwise this position is 0; Simultaneously, the jtag port register is set, certain is that 1 JTAG output port that identifies this correspondence is occupied.
Referring to Fig. 2, in this example, the idiographic flow of gating is: the target mainboard of the commissioning of entry terminal examination order number, then obtain the current value of destination register and port register, and judgement target mainboard is in the value of the corresponding position of destination register:
● if corresponding position is 1, represents that certain concurrent user carries out the commissioning examination to this target mainboard, so the gating failure, returns to the busy signal of this target mainboard to monitor terminal;
● if corresponding position is 0, step-by-step search port register:
■ records this port numbers when in the discovery port register, a certain position is 0, stop search; Number build the control signal of cross bar switch network according to port numbers and mainboard, transmit control signal to the cross bar switch network on backboard, and the corresponding position of destination register and port register is put respectively 1, notify simultaneously the port of jtag controller utilization correspondence to carry out this commissioning examination order; Otherwise the gating failure is returned to the busy signal of port to monitor terminal and is built.
As shown in Figure 1, the present invention further provides a kind of towards super computer system from gating boundary scan commissioning electricity testing device, comprise being positioned at jtag controller and the JTAG gate of monitoring on mainboard, being positioned at the cross bar switch network module on backboard.
Jtag controller is on the monitoring mainboard, and the number of definite JTAG output port.That is, customize jtag controller and JTAG output port according to commissioning examination concurrency, mainboard number to be measured on the monitoring mainboard.As better mode, require JTAG output port number less than or equal to mainboard number to be measured, and try concurrency less than the commissioning that the monitoring mainboard can bear.
The JTAG gate in the JTAG gate, arranges the destination register of some according to the number of mainboard to be measured on the monitoring mainboard, certain is 1 and identifies the mainboard to be measured of this correspondence of gating, otherwise this position is 0; Simultaneously, the jtag port register of monitoring mainboard is set in the JTAG gate, certain is that 1 JTAG output port that identifies this correspondence is occupied.Can calculate optimum commissioning examination JTAG circuit according to input target mainboard number, commissioning examination order and commissioning examination concurrency from the gating module in the JTAG gate, to determine monitoring mainboard JTAG output port.
Cross bar switch network module according to the JTAG output port quantity of monitoring mainboard and the mainboard number to be measured in subrack, builds the cross bar switch network module that the JTAG circuit forms on backboard on backboard.Referring to Fig. 3, for example, on the monitoring mainboard, 4 road JTAG output ports are arranged, 16 mainboards to be measured are arranged in subrack, build 4 * 16 cross bar switch network module on backboard, each road JTAG is 5 signal line, comprises TDI, TDO, TMS, TCK and enable signal.Cross bar switch network module is connected with the JTAG gate by control signal wire, changes the break-make of each switch in the cross bar switch network according to control signal.
In concrete the application, when the monitoring mainboard started, the JTAG gate was at first with destination register and the zero clearing of jtag port register.After the commissioning runin is begun, with mainboard to be measured in user command number input from the gating module, select idle JTAG output port, and according to the value of destination register and jtag port register, transmit control signal by the cross bar switch network module on the control signal wire toward back plate, with in closed cross bar switch network module to inductive switch, complete gating; Simultaneously, the notice jtag controller utilizes the JTAG output port of gating to carry out commissioning examination order.When the commissioning examination order of having completed terminal, jtag controller will notify the JTAG gate that the response bit of destination register and jtag port register is discharged, to prepare to receive new order.
Be only below the preferred embodiment of the present invention, protection scope of the present invention also not only is confined to above-described embodiment, and all technical schemes that belongs under thinking of the present invention all belong to protection scope of the present invention.Should be pointed out that for those skilled in the art, the some improvements and modifications not breaking away under principle of the invention prerequisite should be considered as protection scope of the present invention.
Claims (6)
- One kind towards super computer system from gating boundary scan commissioning method for testing, it is characterized in that, calculate optimum commissioning examination JTAG circuit according to input target mainboard number, commissioning examination order and commissioning examination concurrency, to determine monitoring mainboard JTAG output port and to send control signal; Utilize the control signal of the cross bar switch network reception JTAG gate on backboard, change the break-make of each switch in the cross bar switch network according to control signal, complete gating and utilize the JTAG output port of gating to carry out commissioning examination order.
- According to claim 1 towards super computer system from gating boundary scan commissioning method for testing, it is characterized in that, when carrying out gating, the destination register of some is set according to the number of mainboard to be measured, certain is 1 and identifies the mainboard to be measured of this correspondence of gating, otherwise this position is 0; Simultaneously, the jtag port register is set, certain is that 1 JTAG output port that identifies this correspondence is occupied.
- According to claim 2 towards super computer system from gating boundary scan commissioning method for testing, it is characterized in that, the idiographic flow of gating is: the target mainboard of terminal input commissioning examination order number, then obtain the current value of destination register and port register, judgement target mainboard is in the value of the corresponding position of destination register:● if corresponding position is 1, represents that certain concurrent user carries out the commissioning examination to this target mainboard, so the gating failure, returns to the busy signal of this target mainboard to monitor terminal;● if corresponding position is 0, step-by-step search port register:■ records this port numbers when in the discovery port register, a certain position is 0, stop search; Number build the control signal of cross bar switch network according to port numbers and mainboard, transmit control signal to the cross bar switch network on backboard, and the corresponding position of destination register and port register is put respectively 1, notify simultaneously the port of jtag controller utilization correspondence to carry out this commissioning examination order; Otherwise the gating failure is returned to the busy signal of port to monitor terminal and is built.
- 4. one kind is used for realizing the described device from gating boundary scan commissioning method for testing of any one in claim 1～3, it is characterized in that, comprising:Jtag controller is positioned on the monitoring mainboard;The JTAG gate is positioned on the monitoring mainboard, and the destination register of some is set according to the number of mainboard to be measured in described JTAG gate, and certain is 1 and identifies the mainboard to be measured of this correspondence of gating, otherwise this position is 0; The jtag port register of monitoring mainboard is set in described JTAG gate, and certain is that 1 JTAG output port that identifies this correspondence is occupied; Arrange in described JTAG gate from the gating module, describedly calculate optimum commissioning examination JTAG circuit from the gating module according to input target mainboard number, commissioning examination order and commissioning examination concurrency, to determine monitoring mainboard JTAG output port;Cross bar switch network module is positioned on backboard, and described cross bar switch network module is connected with the JTAG gate by control signal wire, changes the break-make of each switch in the cross bar switch network according to control signal.
- 5. device according to claim 4 is characterized in that: described jtag controller customizes jtag controller and JTAG output port according to commissioning examination concurrency, mainboard number to be measured on the monitoring mainboard.
- 6. device according to claim 5 is characterized in that: described JTAG output port number tries concurrency less than or equal to mainboard number to be measured and less than the commissioning that the monitoring mainboard can bear.
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