CN106802388B - A kind of test module of hybrid digital-analog integrated circuit - Google Patents
A kind of test module of hybrid digital-analog integrated circuit Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
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Abstract
A kind of test module of hybrid digital-analog integrated circuit belongs to semiconductor hybrid digital-analog integrated circuit design for Measurability field.Under the premise of not influencing circuit basic function; in the limited situation of number of pins; by increasing mode controlling unit, input pin Multiplexing Unit, output pin Multiplexing Unit, DAC data bypass unit; it is big to solve existing hybrid digital-analog integrated circuit test design difficulty; test not comprehensive enough problem; the present invention can be with lower design complexities and design time cost; improve the flexibility of the test design of hybrid digital-analog integrated circuit; it realizes express delivery positioning failure, guarantees the validity and completeness of chip testing.
Description
Technical field
The present invention relates to a kind of test modules of hybrid digital-analog integrated circuit, and belonging to semiconductor hybrid digital-analog integrated circuit can
The property surveyed design field is mainly used for the test design of the limited semiconductor hybrid digital-analog integrated circuit of number of pins.
Background technique
With being constantly progressive for method of designing integrated circuit and technology, during designing and manufacturing caused by it is various
Problem result in chip testing difficulty and cost it is higher and higher, measurability problem, which has become, improves product reliability and finished product
One very important factor of rate.Test cost sharply increases, and traditional test method, which seems, to be difficult to be competent at.
In recent years, IC industry high speed prosperity and development, it is higher and higher for the functional density requirement of system, it is traditional
By promoting manufacturing process, optimum design method can no longer meet system compact, integrated the method for realizing high integration
Change, the urgent need of low-power consumption.Therefore, by a variety of points including number, simulation, analog-digital converter and digital analog converter etc.
The vertical integrated hybrid digital-analog integrated circuit designing technique on a single chip of unit, becomes system and reduces volume, promote integrated level, mention
High performance key point.The adequacy of hybrid digital-analog integrated circuit, test is undoubtedly key for the reliability application of system
In key.Therefore, the design for Measurability research of hybrid digital-analog integrated circuit all has in terms of theoretical research and engineering practice
Value very outstanding.
Hybrid digital-analog integrated circuit had both included digital logic portion or had included analog logic part, and contained number
Signal and analog signal are with functional relation tight association.Digital logic portion and analog logic part exist with DAC and ADC respectively
The particularity of the interaction of signal, Digital Analog Hybrid Circuits structure brings huge difficulty to the test of circuit, this is mainly reflected in
Below 3 aspect:
(1) controllability of hybrid digital-analog integrated circuit and observability degree be not high.For example the output signal of ADC is number
The input of logic can not export I/O pin by outside and directly be observed the response of ADC, so being difficult to ADC logic
And its prime analog circuit realizes observability.The input signal of DAC, cannot be by external defeated from the output of Digital Logic
Enter I/O pin and apply excitation, so DAC logic and the controllability degree of following stage analog circuit are very low.On the whole, circuit
The accessibility of digital-to-analog device becomes very low, increases the difficulty of test, it is difficult to promote the coverage rate of test.
(2) it is unable to fault location.If mixed signal module is tested as a whole, analog portion and number
There is mutually constraint between part, when output result is not inconsistent with expected, that is, shows that cannot position is there are when failure inside circuit
The failure of analog circuit or the failure of digital circuit.
(3) it sees on the whole, for plate grade application, simplifies encapsulation and require, reduce packaging cost, Digital Analog Hybrid Circuits are general
Only limited I/O pin number, reduces the controllability and observability of circuit, as a consequence it is hardly possible to directly carry out test and swash
Encourage application and response analysis.
Summary of the invention
Technology of the invention solves the problems, such as: overcoming the deficiencies of the prior art and provide a kind of hybrid digital-analog integrated circuit
Test module, improve hybrid digital-analog integrated circuit controllability and observability degree, can directly carry out test and excitation
Application and response analysis, and positioning failure, guarantee the validity and completeness of chip testing.
The technical solution of the invention is as follows: a kind of test module of hybrid digital-analog integrated circuit, comprising: scheme control list
Member, input pin Multiplexing Unit, output pin Multiplexing Unit and DAC data bypass unit；
Mode controlling unit: according to externally input mode control signal chip_mode1, chip_mode0, ADC is generated
Test mode signal adc_mode, scan testing mode signal scan_mode, functional mode signal func_mode and DAC are surveyed
Mode signal dac_mode is tried, and by scan testing mode signal scan_mode, functional mode signal func_mode and DAC
Test mode signal dac_mode, which is exported, gives input pin Multiplexing Unit, by ADC test mode signal adc_mode, sweep test
Mode signal scan_mode and functional mode signal func_mode, which is exported, gives output pin Multiplexing Unit, and functional mode is believed
Number func_mode and DAC test mode signal dac_mode, which is exported, gives DAC data bypass unit；
Input pin Multiplexing Unit: the input signal DIN of hybrid digital-analog integrated circuit is received, according to from scheme control
Scan testing mode signal scan_mode, the functional mode signal func_mode and DAC test mode signal dac_ of unit
Mode determines that the fuction output signal func_do of input pin Multiplexing Unit, Scan out scan_do, DAC test are defeated
Signal dac_do out；
Output pin Multiplexing Unit: the output signal adc_di of ADC, the fuction output signal of digital function logic are received
The Scan out scan_di of func_di and digital function logic, according to the ADC test from mode controlling unit
Mode signal adc_mode, functional mode signal func_mode and scan testing mode signal scan_mode determine output
The output signal DOUT of pin multiplexing unit, and export outward, the output signal DOUT is for judging that the first analog functuion is patrolled
It collects and whether the Functional Design of ADC, the Functional Design of digital function logic, the Scan Design of digital function logic is correct；
DAC data bypass unit: fuction output data func_data, the input pin multiplexing of digital function logic are received
The DAC test output signal dac_do of unit, according to the functional mode signal func_mode from mode controlling unit, with
And DAC test mode signal adc_mode, determine the output data dac_data of DAC data bypass unit, which passes through DAC
DAC test result is exported outward with the second analog functuion logic, and the second analog functuion logic exports DAC test result outward
Whether the Functional Design for judging DAC and analog functuion logic is correct.
As mode control signal chip_mode1=0, chip_mode0=0, ADC test mode signal adc_mode=
0, scan testing mode signal scan_mode=0, functional mode signal func_mode=1, DAC test mode signal dac_
Mode=0, circuit work in functional mode；As mode control signal chip_mode1=0, chip_mode0=1, ADC is surveyed
Try mode signal adc_mode=0, scan testing mode signal scan_mode=0, functional mode signal func_mode=0,
DAC test mode signal dac_mode=1, circuit work in DAC test pattern；As mode control signal chip_mode1=1,
When chip_mode0=0, ADC test mode signal adc_mode=1, scan testing mode signal scan_mode=0, function
Mode signal func_mode=0, DAC test mode signal dac_mode=0, circuit work in ADC test pattern；Work as mode
When control signal chip_mode1=1, chip_mode0=1, ADC test mode signal adc_mode=0, scan testing mode
Signal scan_mode=1, functional mode signal func_mode=0, DAC test mode signal dac_mode=0, circuit work
In scan testing mode.
The input pin Multiplexing Unit determines that the fuction output signal func_do of input pin Multiplexing Unit, scanning are defeated
The principle of signal scan_do, DAC test output signal dac_do out are as follows: when scan testing mode signal scan_mode is 1,
Scan out scan_do is equal to input signal DIN, and other two is fixed level；As functional mode signal func_mode
When being 1, fuction output signal func_do is equal to input signal DIN, and other two is fixed level；When DAC test mode signal
When dac_mode is 1, DAC test output signal dac_do is equal to input signal DIN, and other two is fixed level.
The output pin Multiplexing Unit determines the principle of the output signal DOUT of output pin Multiplexing Unit are as follows: works as ADC
When test mode signal adc_mode is 1, output signal DOUT is equal to the output signal adc_di of ADC, and other two is to fix
Level；When functional mode signal func_mode is 1, output signal DOUT is equal to the fuction output signal of digital function logic
Func_di, other two are fixed level；When scan testing mode signal scan_mode is 1, output signal DOUT is equal to
The Scan out scan_di of digital function logic, other two are fixed level.
The DAC data bypass unit determines the principle of the output data dac_data of DAC data bypass unit are as follows: works as function
When energy mode signal func_mode is 1, output data dac_data is equal to the fuction output data func_ of digital function logic
data；When DAC test mode signal dac_mode is 1, output data dac_data is equal to the DAC of input pin Multiplexing Unit
Test output signal dac_do.
The present invention has the beneficial effect that compared with prior art
(1) present invention by two scheme control pins chip_mode1, chip_mode0 realize normal mode of operation and
The switching of test pattern, under different test patterns, analog functuion logic and digital function logic are mutually indepedent, mutually not shadow
It rings.
(2) circuit is divided into four kinds of modes: func_mode, dac_mode, adc_ by mode controlling unit by the present invention
Mode, scan_mode, only one each mode is effective, can positioning failure be quickly digital function logic or simulation function
It can logic.
(3) present invention can pass through input pipe under dac_mode mode in the case where not increasing chip exterior port
Foot Multiplexing Unit and DAC data bypass unit, are directly input to DAC module for port and test, improve controllability；?
Under adc_mode mode, by output pin Multiplexing Unit, direct ADC module is output to circuit output port, improves considerable
The property surveyed；Under scan_mode mode, by input pin Multiplexing Unit, port is directly input to digital function logic, is improved
Digital function logic by output pin Multiplexing Unit is directly output to circuit output port by controllability, is improved considerable
The property surveyed.Greatly reduce the demand brought by chip testing to I/O pin number.
Detailed description of the invention
Fig. 1 is hybrid digital-analog integrated circuit schematic diagram；
Fig. 2 is the hybrid digital-analog integrated circuit schematic diagram comprising test module of the present invention；
Fig. 3 is the schematic diagram of mode controlling unit of the present invention；
Fig. 4 is the schematic diagram of input pin Multiplexing Unit of the present invention；
Fig. 5 is the schematic diagram of output pin Multiplexing Unit of the present invention；
Fig. 6 is the schematic diagram of DAC data bypass unit of the present invention.
Specific embodiment
It is as shown in Figure 1 hybrid digital-analog integrated circuit schematic diagram.It is illustrated in figure 2 the digital-to-analogue comprising test module of the present invention
Hydrid integrated circuit schematic diagram.Test module of the invention includes: mode controlling unit, input pin Multiplexing Unit, efferent duct
Foot Multiplexing Unit and DAC data bypass unit.
Mode controlling unit: according to externally input mode control signal chip_mode1, chip_mode0, ADC is generated
Test mode signal adc_mode, scan testing mode signal scan_mode, functional mode signal func_mode and DAC are surveyed
Mode signal dac_mode is tried, and by scan testing mode signal scan_mode, functional mode signal func_mode and DAC
Test mode signal dac_mode, which is exported, gives input pin Multiplexing Unit, by ADC test mode signal adc_mode, sweep test
Mode signal scan_mode and functional mode signal func_mode, which is exported, gives output pin Multiplexing Unit, and functional mode is believed
Number func_mode and DAC test mode signal dac_mode, which is exported, gives DAC data bypass unit.
As shown in figure 3, mode controlling unit by two phase inverters IV1, IV2 and four and door AND1, AND2, AND3,
AND4 composition；The input terminal of phase inverter IV1 and phase inverter IV2 are separately connected chip_mode0 and chip_mode1；With door AND1
Input terminal be separately connected the output end of phase inverter IV1 and IV2, output end connects func_mode；With the input terminal point of door AND2
Not Lian Jie phase inverter IV1 output end and chip_mode1, output end connect dac_mode；Connect respectively with the input terminal of door AND3
The output end and chip_mode0 of phase inverter IV2 are connect, output end connects adc_mode；It is separately connected with the input terminal of door AND4
Chip_mode1 and chip_mode0, output end connect scan_mode.
As mode control signal chip_mode1=0, chip_mode0=0, ADC test mode signal adc_mode=
0, scan testing mode signal scan_mode=0, functional mode signal func_mode=1, DAC test mode signal dac_
Mode=0, circuit work in functional mode；As mode control signal chip_mode1=0, chip_mode0=1, ADC is surveyed
Try mode signal adc_mode=0, scan testing mode signal scan_mode=0, functional mode signal func_mode=0,
DAC test mode signal dac_mode=1, circuit work in DAC test pattern；As mode control signal chip_mode1=1,
When chip_mode0=0, ADC test mode signal adc_mode=1, scan testing mode signal scan_mode=0, function
Mode signal func_mode=0, DAC test mode signal dac_mode=0, circuit work in ADC test pattern；Work as mode
When control signal chip_mode1=1, chip_mode0=1, ADC test mode signal adc_mode=0, scan testing mode
Signal scan_mode=1, functional mode signal func_mode=0, DAC test mode signal dac_mode=0, circuit work
In scan testing mode.
The truth table of mode controlling unit is as shown in table 1.
1 mode controlling unit truth table of table
| chip_mode1 | chip_mode0 | func_mode | dac_mode | adc_mode | scan_mode |
| 0 | 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 0 | 0 |
| 1 | 0 | 0 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 1 |
Input pin Multiplexing Unit: the input signal DIN of hybrid digital-analog integrated circuit is received, according to from scheme control
Scan testing mode signal scan_mode, the functional mode signal func_mode and DAC test mode signal dac_ of unit
Mode determines that the fuction output signal func_do of input pin Multiplexing Unit, Scan out scan_do, DAC test are defeated
Signal dac_do out.
As shown in figure 4, input pin Multiplexing Unit by nine Port Multiplier MUX11, MUX12, MUX13, MUX21, MUX22,
MUX23, MUX31, MUX32, MUX33 composition.0 data input pin and 1 data input pin of Port Multiplier MUX11, connects and fixes 0 or 1,
Select the output dac_mode of termination mode control unit.1 data input pin of MUX12, which connects, fixes 0 or 1, the connection of 0 input terminal
The output of MUX11 selects the output func_mode of termination mode control unit.0 input terminal of Port Multiplier MUX13 connects MUX12
Output, 1 input terminal connect DIN, select termination mode control unit output scan_mode.0 data of Port Multiplier MUX21
Input terminal, 1 data input pin connect and fix 0 or 1, select the output scan_mode of termination mode control unit.1 number of MUX22
0 or 1 is fixed according to input termination, 0 input terminal connects the output of MUX21, selects the output func_ of termination mode control unit
mode.The output of the 0 input terminal connection MUX22 of Port Multiplier MUX23,1 input terminal connect DIN, select termination mode control unit
Output dac_mode.0 data input pin, 1 data input pin of Port Multiplier MUX31 connects and fixes 0 or 1, selects termination mode control
The output dac_mode of unit processed.1 data input pin of MUX32, which connects, fixes 0 or 1, and 0 input terminal connects the output of MUX31, selection
The output scan_mode of termination mode control unit.The output of the 0 input terminal connection MUX32 of Port Multiplier MUX33,1 input terminal connect
DIN is met, the output func_mode of termination mode control unit is selected.
The fuction output signal func_do of input pin Multiplexing Unit, Scan out scan_do, DAC test output
The determination principle of signal dac_do are as follows: when scan testing mode signal scan_mode is 1, Scan out scan_do etc.
In input signal DIN, other two is fixed level；When functional mode signal func_mode is 1, fuction output signal
Func_do is equal to input signal DIN, and other two is fixed level；When DAC test mode signal dac_mode is 1, DAC
Test output signal dac_do is equal to input signal DIN, and other two is fixed level.
The truth table of input pin Multiplexing Unit is as shown in table 2.
2 input pin Multiplexing Unit truth table of table
Output pin Multiplexing Unit: the output signal adc_di of ADC, the fuction output signal of digital function logic are received
The Scan out scan_di of func_di and digital function logic, according to the ADC test from mode controlling unit
Mode signal adc_mode, functional mode signal func_mode and scan testing mode signal scan_mode determine output
The output signal DOUT of pin multiplexing unit, and export outward, the output signal DOUT is for judging that the first analog functuion is patrolled
It collects and whether the Functional Design of ADC, the Functional Design of digital function logic, the Scan Design of digital function logic is correct.
As shown in figure 5, output pin Multiplexing Unit is made of three Port Multipliers MUX1, MUX2, MUX3.Port Multiplier MUX1's
0 data input pin, which connects, fixes 0 or 1, and 1 data input pin meets adc_di, selects the output adc_mode of termination mode control unit.
The output of the 0 input terminal connection MUX1 of Port Multiplier MUX2,1 data input pin meet scan_di, select termination mode control unit
Export scan_mode.The output of the 0 input terminal connection MUX2 of Port Multiplier MUX3,1 input terminal connect func_di, selection termination mould
The output func_mode of formula control unit.The data output end of MUX3 meets the output end DOUT of output pin Multiplexing Unit.
Output pin Multiplexing Unit determines the principle of the output signal DOUT of output pin Multiplexing Unit are as follows: when ADC is tested
When mode signal adc_mode is 1, output signal DOUT is equal to the output signal adc_di of ADC, and other two is fixed level；
When functional mode signal func_mode is 1, output signal DOUT is equal to the fuction output signal func_ of digital function logic
Di, other two are fixed level；When scan testing mode signal scan_mode is 1, output signal DOUT is equal to digital function
The Scan out scan_di of energy logic, other two is fixed level.
The truth table of output pin Multiplexing Unit is as shown in table 3.
3 output pin Multiplexing Unit truth table of table
DAC data bypass unit: fuction output data func_data, the input pin multiplexing of digital function logic are received
The DAC test output signal dac_do of unit, according to the functional mode signal func_mode from mode controlling unit, with
And DAC test mode signal adc_mode, determine the output data dac_data of DAC data bypass unit, which passes through DAC
DAC test result is exported outward with the second analog functuion logic, and the second analog functuion logic exports DAC test result outward
Whether the Functional Design for judging DAC and analog functuion logic is correct.
As shown in fig. 6, DAC data bypass unit is made of two Port Multipliers MUXM1, MUXM2.0 number of Port Multiplier MUXM1
0/1,1 data input pin is fixed according to input termination and meets TEST_DATA, selects the output dac_mode of termination mode control unit.
The output of the 0 input terminal connection MUXM1 of Port Multiplier MUXM2,1 data input pin meet FUNC_DATA, select termination mode control single
The output func_mode of member.Dac_data connects the data output end of MUXM2.
The determination principle of the output data dac_data of DAC data bypass unit are as follows: as functional mode signal func_mode
When being 1, output data dac_data is equal to the fuction output data func_data of digital function logic；When DAC test pattern is believed
When number dac_mode is 1, output data dac_data is equal to the DAC test output signal dac_do of input pin Multiplexing Unit.
The design procedure of test module of the present invention is as follows:
(1) increase by two new chip ports: chip_mode1, chip_ in the design top layer of hybrid digital-analog integrated circuit
Mode controlling unit is added to the top layer of design as two inputs of mode controlling unit by mode0；
(2) input pin Multiplexing Unit is added after the input PAD unit of design top layer, needed for determining under scan_mode
Input control signal number and internal DAC circuit bit wide, the maximum value of the two is required input pin Multiplexing Unit
Number；
(3) output pin Multiplexing Unit is added before the output PAD unit of design top layer, needed for determining under scan_mode
Output signal number and internal adc circuit bit wide, the maximum value of the two is required output pin Multiplexing Unit number；
(4) DAC data bypass unit is added before DAC circuit；
(5) connected by way of Manual Override code according to connection relationship as shown in Figure 2 in design top layer
It connects.
It is big for hybrid digital-analog integrated circuit design for Measurability difficulty, not comprehensive enough problem is tested, the invention proposes
Hybrid digital-analog integrated circuit test module, the test module can complete number with lower design complexities and design time cost
The test of mould hydrid integrated circuit designs, and improves the controllability and observability degree of hybrid digital-analog integrated circuit, Neng Gouzhi
The application of row test and excitation and response analysis, and positioning failure are tapped into, guarantees the validity and completeness of chip testing.
Unspecified part of the present invention belongs to common sense well known to those skilled in the art.
Claims (5)
1. a kind of test module of hybrid digital-analog integrated circuit, characterized by comprising: mode controlling unit, input pin multiplexing
Unit, output pin Multiplexing Unit and DAC data bypass unit；
Mode controlling unit: according to externally input mode control signal chip_mode1, chip_mode0, ADC test is generated
Mode signal adc_mode, scan testing mode signal scan_mode, functional mode signal func_mode and DAC test mould
Formula signal dac_mode, and scan testing mode signal scan_mode, functional mode signal func_mode and DAC are tested
Mode signal dac_mode, which is exported, gives input pin Multiplexing Unit, by ADC test mode signal adc_mode, scan testing mode
Signal scan_mode and functional mode signal func_mode, which is exported, gives output pin Multiplexing Unit, by functional mode signal
Func_mode and DAC test mode signal dac_mode, which is exported, gives DAC data bypass unit；
Input pin Multiplexing Unit: the input signal DIN of hybrid digital-analog integrated circuit is received, according to from mode controlling unit
Scan testing mode signal scan_mode, functional mode signal func_mode and DAC test mode signal dac_mode,
Determine fuction output signal func_do, Scan out scan_do, DAC test output signal of input pin Multiplexing Unit
dac_do；
Output pin Multiplexing Unit: the output signal adc_di of ADC, the fuction output signal func_ of digital function logic are received
The Scan out scan_di of di and digital function logic, according to the ADC test pattern letter from mode controlling unit
Number adc_mode, functional mode signal func_mode and scan testing mode signal scan_mode determine that output pin is multiple
It with the output signal DOUT of unit, and exports outward, the output signal DOUT is for judging the first analog functuion logic and ADC
Functional Design, the Functional Design of digital function logic, the Scan Design of digital function logic it is whether correct；
DAC data bypass unit: fuction output data func_data, the input pin Multiplexing Unit of digital function logic are received
DAC test output signal dac_do, according to the functional mode signal func_mode and DAC from mode controlling unit
Test mode signal adc_mode, determines the output data dac_data of DAC data bypass unit, which passes through DAC and the
Two analog functuion logics export DAC test result outward, and the second analog functuion logic exports DAC test result outward and is used for
Judge whether the Functional Design of DAC and analog functuion logic is correct.
2. a kind of test module of hybrid digital-analog integrated circuit according to claim 1, it is characterised in that: work as scheme control
When signal chip_mode1=0, chip_mode0=0, ADC test mode signal adc_mode=0, scan testing mode signal
Scan_mode=0, functional mode signal func_mode=1 and DAC test mode signal dac_mode=0, circuit work
In functional mode；As mode control signal chip_mode1=0, chip_mode0=1, ADC test mode signal adc_
Mode=0, scan testing mode signal scan_mode=0, functional mode signal func_mode=0 and DAC test pattern
Signal dac_mode=1, circuit work in DAC test pattern；As mode control signal chip_mode1=1, chip_mode0
When=0, ADC test mode signal adc_mode=1, scan testing mode signal scan_mode=0, functional mode signal
Func_mode=0 and DAC test mode signal dac_mode=0, circuit work in ADC test pattern；When scheme control is believed
When number chip_mode1=1, chip_mode0=1, ADC test mode signal adc_mode=0, scan testing mode signal
Scan_mode=1, functional mode signal func_mode=0 and DAC test mode signal dac_mode=0, circuit work
In scan testing mode.
3. a kind of test module of hybrid digital-analog integrated circuit according to claim 1, it is characterised in that: the input pipe
Foot Multiplexing Unit determines that the fuction output signal func_do of input pin Multiplexing Unit, Scan out scan_do, DAC are surveyed
Try the principle of output signal dac_do are as follows: when scan testing mode signal scan_mode is 1, Scan out scan_do
Equal to input signal DIN, other two is fixed level；When functional mode signal func_mode is 1, fuction output signal
Func_do is equal to input signal DIN, and other two is fixed level；When DAC test mode signal dac_mode is 1, DAC
Test output signal dac_do is equal to input signal DIN, and other two is fixed level.
4. a kind of test module of hybrid digital-analog integrated circuit according to claim 1, it is characterised in that: the efferent duct
Foot Multiplexing Unit determines the principle of the output signal DOUT of output pin Multiplexing Unit are as follows: as ADC test mode signal adc_
When mode is 1, output signal DOUT is equal to the output signal adc_di of ADC, and other two is fixed level；When functional mode is believed
When number func_mode is 1, output signal DOUT is equal to the fuction output signal func_di of digital function logic, and other two is
Fixed level；When scan testing mode signal scan_mode is 1, output signal DOUT is equal to the scanning of digital function logic
Output signal scan_di, other two are fixed level.
5. a kind of test module of hybrid digital-analog integrated circuit according to claim 1, it is characterised in that: the DAC number
The principle of the output data dac_data of DAC data bypass unit is determined according to by-pass unit are as follows: as functional mode signal func_
When mode is 1, output data dac_data is equal to the fuction output data func_data of digital function logic；When DAC tests mould
When formula signal dac_mode is 1, output data dac_data is equal to the DAC test output signal dac_ of input pin Multiplexing Unit
do。
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| CN111381148B (en) * | 2018-12-29 | 2023-02-21 | 华润微集成电路(无锡)有限公司 | System and method for realizing chip test |
| CN111030691B (en) * | 2019-12-30 | 2023-04-18 | 思瑞浦微电子科技（苏州）股份有限公司 | Reliability verification method and system based on analog-to-digital converter |
| CN115078968B (en) * | 2022-06-15 | 2024-06-25 | 上海类比半导体技术有限公司 | Chip test circuit, self-test chip and chip test system |
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