CN103066192B - Semiconductor light emitting light source and manufacture the method for this light source and semiconductor luminous chip - Google Patents

Semiconductor light emitting light source and manufacture the method for this light source and semiconductor luminous chip Download PDF

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CN103066192B
CN103066192B CN201310008638.5A CN201310008638A CN103066192B CN 103066192 B CN103066192 B CN 103066192B CN 201310008638 A CN201310008638 A CN 201310008638A CN 103066192 B CN103066192 B CN 103066192B
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substrate
weld pad
pad
semiconductor
light emitting
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CN103066192A (en
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李刚
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SHENZHEN DADAO SEMICONDUCTOR CO., LTD.
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李刚
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
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    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
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    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
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    • H01L2924/181—Encapsulation
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Led Device Packages (AREA)

Abstract

The present invention relates to a kind of semiconductor light emitting light source and manufacture the method for this light source and semiconductor luminous chip.This semiconductor light emitting light source comprises substrate; Substrate first surface is provided with and comprises the first weld pad insulated from each other and the conducting channel of the second weld pad; The first pad that substrate is connected with the first weld pad, the second pad be connected with the second weld pad; At least be provided with semiconductor lamination on the first weld pad surface, the first semiconductor laminated conductive layer surface has a metal level, and layer on surface of metal is close to the first weld pad surface and is connected; Second conductive layer surface has a current extending, and current extending conducts electricity with the second weld pad or another the first weld pad and is connected; The first semiconductor laminated and corresponding weld pad, the second weld pad, current extending are arranged on the packaging body institute sealed envelope of substrate first surface by one, and the first pad and the second pad are positioned at outside packaging body.This semiconductor light emitting light-source structure is simple, manufacturing process is short, significantly can promote comprehensive yield, reduce manufacturing cost.

Description

Semiconductor light emitting light source and manufacture the method for this light source and semiconductor luminous chip
Technical field
The present invention relates to a kind of semiconductor light emitting light source, comprise the lamp plate, lamp bar, lamppost etc. that use in LED, COB, semiconductor lamp, relate to a kind of semiconductor light emitting light-source structure and manufacture method thereof further.
Background technology
Along with the lifting of semiconductor light emitting efficiency, the decline of manufacturing cost and the raising in useful life, its range of application has contained the fields such as display, backlight and illumination.
As shown in Figure 1, be the structural representation of existing a kind of LED, comprise base plate for packaging 1, p weld pad 2, metal level 3, supporting substrate 4, p-type electric-conducting layer 5, luminescent layer 6, N-shaped conductive layer 7, current extending 8, n-electrode 9, interconnecting lead 10, fluorescence coating 10a, n weld pad 11, p pad 13a, connection metal 12a, n pad 13b, connection metal 12b, packaging body 14 and die bond layer 15 etc.
P-type electric-conducting layer 5, luminescent layer 6, N-shaped conductive layer 7 form usually said semiconductor laminated; Described semiconductor laminated and metal level 3, supporting substrate 4, current extending 8, n-electrode 9 form usually said semiconductor luminous chip; Described semiconductor luminous chip and base plate for packaging 1, p weld pad 2, interconnecting lead 10, fluorescence coating 10a, n weld pad 11, p pad 13a, connection metal 12a, n pad 13b, connection metal 12b, packaging body 14 and die bond layer 15 form usually said LED(and are also referred to as light emitting semiconductor device).
In the division of labor of current semiconductor lighting industry, semiconductor luminous chip is manufactured by chip enterprise, by light emitting semiconductor devices such as LED and COB shown in encapsulation enterprise shop drawings 1, finally by light fixture enterprise the light emitting semiconductor device that encapsulation enterprise manufactures is applied in the lamp plate of various lighting, lamp bar, lamppost and goes.
The manufacture process of the semiconductor luminous chip shown in Fig. 1 generally includes: at the luminous lamination of sapphire, carborundum or silicon epitaxy substrate surface (not shown) epitaxial semiconductor, comprise GaN/InGaN based semiconductor light emitting lamination, AlInGaP based semiconductor light emitting lamination, GaN/AlGaN based semiconductor light emitting lamination etc.; Then, metal level 3 is prepared on p-type electric-conducting layer 5 surface that whole epitaxial wafer is exposed; Be pasted onto described supporting substrate 4(ground floor substrate by semiconductor laminated together with epitaxial substrate by described metal level 3) surface (first time die bond operation); Then, adopt laser lift-off, the method for the thinning rear chemical corrosion of grinding or chemical stripping removes monoblock epitaxial substrate; Then, the mode of chemical corrosion and/or dry etching is adopted to etch the semiconductor laminated surface after removing epitaxial substrate, expose the N-shaped conductive layer 7 for the preparation of current extending, and structuring N-shaped conductive layer 7 is surperficial, makes it to form taper rough surface or convex-concave surface; In the described preparation of structuring N-shaped conductive layer 7 surface described current extending 8, n-electrode 9; Cut described supporting substrate 4 obtain be separated semiconductor luminous chip be supplied to encapsulation enterprise use.
The diameter of current epitaxial wafer is 2 cun and 4 cun.As previously mentioned, prior art first whole epitaxial wafer is pasted described supporting substrate 4 surface, after completing chip technology, then cut described supporting substrate 4 and obtain semiconductor luminous chip, the epitaxial substrate minimizing technology of this usual employing exists serious technical bottleneck to be all the time difficult to solve.During as adopted laser-stripping method, epitaxial substrate and semiconductor laminated between produce vapour, the particularly vapour of middle section, be difficult to be drained fast and effectively by the micro gap between semiconductor laminated and substrate, the gas that causes expands and localized hyperthermia and thermal stress thereof can cause whole semiconductor laminatedly to break.During as adopted chemical peeling, fresh corrosive liquid and the corrosion product of generation are difficult to mutually be exchanged by the micro gap between semiconductor laminated and substrate and flow, the thickness in corrosion gap is radially difficult to control evenly, though the means such as heating, ultrasonic vibration can improve liquidity, semiconductor laminated breaking can be caused.Adopt the method for the thinning rear chemical corrosion of grinding, although can the problem that between semiconductor laminated and substrate, micro gap causes be solved, but particularly uniformity controlling is very difficult for the thinning THICKNESS CONTROL of grinding, and too thin meeting causes semiconductor laminated breaking, and too thick meeting causes the chemical corrosion time tediously long.Described problem, along with the continuous increase of epitaxial wafer diameter, will become severeer, causes that manufacturing process is complicated, yield is low, high in cost of production problem.
In the manufacture process of the LED shown in Fig. 1, comprise further: prepare the LED supporting substrate 1(second layer substrate including p weld pad 2, n weld pad 11, connection metal 12a, connection metal 12b, n pad 13b, p pad 13a, die bond layer 15 shown in Fig. 1); The semiconductor luminous chip be made up of metal level 3, supporting substrate 4, p-type electric-conducting layer 5, luminescent layer 6, N-shaped conductive layer 7, current extending 8, n-electrode 9 is fixed on (second time die bond operation) on supporting substrate 1; Complete interconnecting lead 10, semiconductor luminous chip n-electrode 9 is conducted electricity mutually with n weld pad 11 and is connected (usually said bonding wire or routing technique); At semiconductor laminated surrounding coating fluorescence coating 10a, then encapsulating solidification obtain packaging body 14 after obtain usually said LED.
Go if described LED will be applied in semiconductor lamp, in semiconductor lamp enterprise, need the method with Reflow Soldering or wave-soldering, described LED is welded to (third layer substrate and for the third time die bond operation) in PCB substrate, is made into the lamp plate of various sizes shape, lamp bar or lamppost.
Obviously easily see, described semiconductor light emitting is stacked in different enterprise and experienced by three different die bond operations, employ three layers of different substrate, final being just applied in semiconductor lamp is gone, not only manufacturing process is long, process procedure is many, waste a large amount of raw and auxiliary material, relate to the semiconductor manufacturing equipment using numerous complicated costliness, and overall yield is low, finally make semiconductor luminous chip and semiconductor light emitting light source, comprise the lamp plate in above-described light emitting semiconductor device (LED and COB) and semiconductor lamp, lamp bar, the manufacturing cost of lamppost etc. remains high, limit to their range of application.
Further, as shown in Figure 1, long from the semiconductor laminated heat conduction path experienced to base plate for packaging 1 basal surface, comprise supporting substrate 4, metal level 3, die bond layer 15, p weld pad 2 and base plate for packaging 1.The approach of process is long, interface is many, is unfavorable for semiconductor laminated heat radiation, thus has influence on the light efficiency of light source, and light decay also can be caused to accelerate, the problems such as shortening in useful life.
Obviously, there is defect and the deficiency of essence in the manufacture process of semiconductor luminous chip itself and existing semiconductor light emitting light source in its structure and manufacture method.
Summary of the invention
The technical problem to be solved in the present invention is, provides a kind of semiconductor light emitting light source that can shorten manufacturing process, reduce process procedure.
Another technical problem that the present invention will solve is, provides a kind of semiconductor light emitting light source manufacture method that can shorten manufacturing process, reduce process procedure.
Another technical problem that the present invention will solve is, provide a kind of can Simplified flowsheet, promote the manufacture method of semiconductor luminous chip of yield.
The technical solution adopted for the present invention to solve the technical problems is: construct a kind of semiconductor light emitting light source, comprise a substrate, described substrate has first surface and second surface; Be provided with at least one conducting channel at the first surface of described substrate, described conducting channel comprises at least one first weld pad and at least one second weld pad; Described first weld pad and the second weld pad insulated from each other, described substrate has first pad be connected with described first weld pad at least, has second pad be connected with described second weld pad at least;
At least be provided with semiconductor lamination on described first weld pad surface, describedly semiconductor laminatedly at least comprise one first conductive layer, a luminescent layer and one second conductive layer; Described first conductive layer surface has a metal level, and described metal level directly contacts with described first conductive layer or have a reflector and/or a contact layer between described metal level and described first conductive layer; Described layer on surface of metal is close to described first weld pad surface and is connected; Described second conductive layer surface has a current extending; Described current extending conducts electricity with described second weld pad or another the first weld pad and is connected, or, be at least provided with one second electrode on described current extending surface, then conducted electricity with described second weld pad or another first weld pad described by described second electrode and be connected;
Described semiconductor laminated and corresponding described first weld pad, the second weld pad and current extending, or corresponding described first weld pad, the second weld pad, current extending and the second electrode are arranged on the packaging body institute sealed envelope of described substrate first surface by one, described first pad and the second pad are positioned at described substrate first surface outside described packaging body, described substrate side surfaces and/or described second substrate surface.
Preferably, described semiconductor laminated surrounding side wrap up by the insulating barrier.
Preferably, described first pad is arranged on described substrate first surface, described second substrate surface and/or described substrate side surfaces, and by being arranged on described substrate first surface, described second substrate surface and/or described substrate side surfaces and/or running through described packaging body and/or run through the first interconnecting metal of described substrate, conduct electricity with described first weld pad and be connected; Or described first pad is conduct electricity through described substrate and described first weld pad the first needle-like pad be connected;
Described second pad is arranged on described substrate first surface, described second substrate surface and/or described substrate side surfaces, and by being arranged on described substrate first surface, described second substrate surface and/or described substrate side surfaces and/or running through described packaging body and/or run through the second interconnecting metal of described substrate, conduct electricity with described second weld pad and be connected; Or described second pad is conduct electricity through described substrate and described second weld pad the second needle-like pad be connected.
Preferably, when the described substrate arranging described second weld pad, the second pad and the second interconnecting metal has conductive characteristic, at described second weld pad, the second pad be provided with a substrate insulating layer between the second interconnecting metal and described substrate; When the described substrate arranging described first weld pad, the first pad and the first interconnecting metal has conductive characteristic, at described first weld pad, the first pad be provided with a substrate insulating layer between the first interconnecting metal and described substrate or be set directly on described substrate.
Preferably, described current extending to be conducted electricity with described second weld pad or another first weld pad described by least one interconnect conductive layers and/or interconnecting lead and is connected; Or,
Have one second electrode at least on described current extending surface, described second electrode to be conducted electricity with described second weld pad or another first weld pad described by least one interconnect conductive layers and/or interconnecting lead and is connected.
Preferably, described substrate first surface is smooth planar surface or the smooth surface comprising concavo-convex platform.
Preferably, described packaging body comprises embedding body, preformed lens or preform lampshade;
Described embedding body is by casting glue solidified forming; Described casting glue comprise in epoxy resin, silicon rubber, silicones, the epoxy resin being mixed with fluorescent material and/or diffusant, silicon rubber, silicones one or more; Described embedding body forming mode comprise from shapings, pressing mold shapings, casting, in cofferdam filling shaping in one or more;
Described preformed lens and preform lampshade comprise in epoxy resin, silicon rubber, silicones, PMMA, PC, glass, transparent ceramic, the epoxy resin being mixed with fluorescent material and/or diffusant, silicon rubber, silicones, PMMA, PC, glass, transparent ceramic one or more.
The present invention also provides a kind of method manufacturing above-mentioned semiconductor light emitting light source, at least comprises the following steps:
S1: prepare semiconductor light emitting crystal grain: at extension substrate surface, semiconductor laminated described in epitaxial growth successively by the order of the second conductive layer, luminescent layer, the first conductive layer; With the first conductive layer surface that the whole epitaxial wafer of described metal level uniform fold is exposed; After epitaxial substrate described in thinning back side, to cut and/or the described epitaxial wafer that bursts apart becomes the semiconductor light emitting crystal grain of some separation; Described semiconductor light emitting crystal grain comprises described epitaxial substrate, described semiconductor laminated and described metal level;
S2: prepare substrate: prepare the corresponding conducting channel of one or more semiconductor light emitting light source at the first surface of substrate, or, after the first surface of the described substrate of tool conductive characteristic prepares described substrate insulating layer, then prepare the corresponding conducting channel of one or several semiconductor light emitting light sources at described surface of insulating layer; Described conducting channel comprises at least one first weld pad and at least one second weld pad; Prepare at least one first pad be connected with at least one first weld pad, and at least one second pad be connected with at least one second weld pad;
S3: connect semiconductor light emitting crystal grain and substrate: described semiconductor light emitting crystal grain is placed on the first weld pad surface, described layer on surface of metal and described first weld pad surface are close to mutually, and strong bonded conducting; The associated methods on described layer on surface of metal and described first weld pad surface comprises ultrasonic bonding, eutectic welds, Reflow Soldering, soldering, pressurizeing or heating one or more methods under pressurized conditions in bonding;
S4: remove substrate: after protecting exposed conducting channel, pad and semiconductor laminated side, remove the epitaxial substrate on described semiconductor light emitting crystal grain; The method removing epitaxial substrate on described semiconductor light emitting crystal grain comprise in chemical stripping, chemical corrosion, thinning post-chemical mechanical polishing, laser lift-off one or more;
S5: prepare current extending: adopt the mode of chemical corrosion and/or dry etching to etch the semiconductor laminated surface after removing described epitaxial substrate, expose the second conductive layer for the preparation of current extending, and structuring second conductive layer surface, make it to form taper rough surface or convex-concave surface; Described current extending is covered at described structuring second conductive layer surface;
S6: be electrically connected described current extending and the second weld pad: described current extending to be conducted electricity with described second weld pad or another the first weld pad by least one interconnect conductive layers and/or interconnecting lead and is connected; Or, after at least one second electrode of described current extending surface preparation, then to be conducted electricity with described second weld pad or another first weld pad described by least one interconnect conductive layers and/or interconnecting lead by described second electrode and be connected; Described interconnect conductive layers is the thin metal layer by sputtering or evaporation or chemical plating or electroplating deposition, and described interconnecting lead is the wire by ultrasonic bonding;
S7: prepare packaging body: adopt comprise following any one: a: around the first weld pad of described semiconductor laminated and correspondence, the second weld pad, current extending or current extending and the second electrode drop or coating casting glue, by the surface tension of casting glue to be shaped or pressing mold shaping Post RDBMS obtains embedding body; B: preformed lens or preform lampshade are arranged on described substrate first surface, semiconductor laminated and corresponding the first weld pad, the second weld pad, current extending or the current extending of the single semiconductor light emitting light source of its opening parcel composition and the second electrode, interconnect conductive layers or interconnecting lead, and seal described preformed lens or the junction surface between preform lampshade and described substrate first surface; Inject casting glue or inject the casting glue being mixed with fluorescent material and/or diffusant in described preformed lens or the cavity that formed between preform lampshade and described substrate first surface; C: embedding body shaping template is placed on described substrate first surface, injects casting glue or is mixed with the casting glue of fluorescent material and/or diffusant, slough embedding body shaping template after solidifying to form embedding body in template cavity; D: after the surrounding of semiconductor laminated and corresponding first weld pad of the single semiconductor light emitting light source of composition, the second weld pad, current extending or current extending and the second electrode, interconnect conductive layers or interconnecting lead arranges cofferdam, in cofferdam, fill casting glue or fill the casting glue being mixed with fluorescent material and/or diffusant, solidifying to form embedding body;
S8: prepare semiconductor light emitting light source: obtain the semiconductor light emitting light source be separated along line of cut cutting and/or the substrate burst apart containing multiple semiconductor light emitting light source.
Preferably, before S7 prepares packaging body, first described semiconductor laminated with the casting glue parcel being mixed with fluorescent material, form fluorescence coating after solidification.
The present invention also provides a kind of method manufacturing semiconductor luminous chip, at least comprises the following steps:
S1: prepare semiconductor light emitting crystal grain: at extension substrate surface, by the order epitaxial growth semiconductor lamination successively of the second conductive layer, luminescent layer, the first conductive layer; With the first conductive layer surface that the whole epitaxial wafer of a metal level uniform fold is exposed; Described metal level directly contacts with described first conductive layer or have a reflector and/or a contact layer between described metal level and described first conductive layer;
S2: after epitaxial substrate described in thinning back side, cuts and/or the described epitaxial wafer that bursts apart becomes the semiconductor light emitting crystal grain of some separation; Described semiconductor light emitting crystal grain comprises described epitaxial substrate, described semiconductor laminated and described metal level;
S3: prepare substrate: at the first surface of substrate or prepare the corresponding conducting channel of one or more semiconductor luminous chip after the first surface of described substrate arranges an insulating barrier; At least one first pad that described conducting channel comprises at least one first weld pad and is connected with at least one first weld pad; Described substrate first surface is smooth planar surface or the smooth surface comprising concavo-convex platform;
S4: connect semiconductor light emitting crystal grain and substrate: described semiconductor light emitting crystal grain is placed on the first weld pad surface, described layer on surface of metal and described first weld pad surface are close to mutually, and strong bonded conducting; The associated methods on described layer on surface of metal and described first weld pad surface comprises ultrasonic bonding, eutectic welds, Reflow Soldering, soldering, pressurizeing or heating one or more methods under pressurized conditions in bonding;
S5: remove substrate: after protecting exposed conducting channel and semiconductor laminated side, remove the epitaxial substrate on described semiconductor light emitting crystal grain; The method removing epitaxial substrate on described semiconductor light emitting crystal grain comprise in chemical stripping, chemical corrosion, thinning post-chemical mechanical polishing, laser lift-off one or more;
S6: prepare current extending: adopt the mode of chemical corrosion and/or dry etching to etch the semiconductor laminated surface after removing described epitaxial substrate, expose the second conductive layer for the preparation of current extending, and structuring second conductive layer surface, make it to form taper rough surface or convex-concave surface; A current extending is covered at described structuring second conductive layer surface; At at least one second electrode of described current extending surface preparation;
S7: prepare semiconductor luminous chip: obtain the semiconductor luminous chip be separated along line of cut cutting and/or the substrate burst apart containing multiple semiconductor luminous chip.
Implement the present invention and there is following beneficial effect: semiconductor light emitting light source of the present invention can be used as lamp plate, lamp bar in light emitting semiconductor device (comprising LED and COB etc.) and semiconductor lamp, lamppost etc., there is structure simple, highly versatile, widely used feature; Significantly can shorten the manufacturing process from epitaxial wafer to semiconductor light emitting light source, reduce process procedure; Chip, encapsulation and light fixture manufacturing process and operation organic combination are integrated, significantly can not only reduce the use amount of raw and auxiliary material, significantly reduce use kind and the quantity of costly semiconductor manufacturing equipment, more can significantly promote comprehensive yield, reduce manufacturing cost; It is simple, practical that epitaxial substrate after integration removes technique, yield is high, can avoid because epitaxial wafer diameter increases the adverse effect brought manufacturing process completely, can effectively overcome is out at present prolongs the various problem and technical bottleneck that face in substrate removal process, reduces the manufacturing cost of semiconductor laminated and even whole semiconductor light emitting light source; Semiconductor light emitting light source internal thermally conductive pathways involved in the present invention is short, and link and the interface of experience are few, and the capacity of heat transmission is strong, thermal resistance is low.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the invention will be further described, in accompanying drawing:
Fig. 1 is a kind of schematic diagram of common semiconductor light emitting light-source structure;
Fig. 2 is the schematic diagram of the first embodiment of the present invention's semiconductor light emitting light source of the present invention;
Fig. 3 is the schematic diagram of the second embodiment of the present invention's semiconductor light emitting light source of the present invention;
Fig. 4 is the schematic diagram of the 3rd embodiment of the present invention's semiconductor light emitting light source of the present invention;
Fig. 5 is the schematic diagram of the 4th embodiment of the present invention's semiconductor light emitting light source of the present invention;
Fig. 6 is the schematic diagram of the 5th embodiment of the present invention's semiconductor light emitting light source of the present invention;
Fig. 7 is the schematic diagram of the first embodiment of the present invention's semiconductor luminous chip of the present invention.
Embodiment
As shown in Figure 2, it is the first embodiment of semiconductor light emitting light source of the present invention, comprise insulated substrate 21, p weld pad 22a, n weld pad 22b, metal level 23, p-type electric-conducting layer 24a, luminescent layer 24b, N-shaped conductive layer 24c, current extending 25, n-electrode 25a, interconnecting lead 26, fluorescence coating 27, embedding body 28, adjacent semiconductor illuminating source embedding body 28a, 28b, semiconductor laminated surrounding insulating barrier 29, needle-like p pad 210a, needle-like n pad 210b, substrate insulating layer 211, line of cut position 220a, 220b etc.
In the present embodiment, the first conductive layer, the first weld pad, the first pad are respectively p-type electric-conducting layer 24a, p weld pad 22a, needle-like p pad 210a; Second conductive layer, the second weld pad, the second pad, the second electrode are N-shaped conductive layer 24c, n weld pad 22b, needle-like n pad 210b, n-electrode 25a respectively.Substrate can adopt insulated substrate 21, comprises ceramic substrate, glass substrate, crystallite glass substrate, plastic base or composite construction substrate.This insulated substrate 21 is provided with at least one conducting channel for semiconductor laminated power supply, comprises p weld pad 22a, n weld pad 22b etc.
By comprising silk screen printing, plating, chemical plating, thick-film technique, thin-film technique prepare p weld pad 22a, n weld pad 22b at the first surface of insulated substrate 21.The Au being applicable to carry out ultra-sonic welded with metal level 23 can be prepared on p weld pad 22a top layer, carry out the AuSn of eutectic weldering, carry out the Ag of Reflow Soldering, carry out the Au pressurizeing or heat pressure bonding, or carry out the Ni of soldering.Same, can prepare on n weld pad 22b top layer and be applicable to the Au that interconnecting lead 26 carries out ultra-sonic welded.This p weld pad 22a, n weld pad 22b can be single or multiple lift structure, and spendable material comprises Cu, Ti, Cr, Ni, Ag, Al, W, Au, Pt, Pd and alloy etc. thereof.
In the present embodiment, this first surface is the smooth planar surface of preparation on insulated substrate 21; Understandable, also can prepare smooth surface with concavo-convex platform as first surface on insulated substrate 21.
This metal level 23 can adopt single or multiple lift structure, prepares the spendable material of metal level 23 comprises in Cr, Cu, Ti, Al, Ni, W, Pt, Pd, Ag, Au, AuSn, Mo and alloy thereof one or more.
Generally include between metal level 23 and p-type electric-conducting layer 24a and can form low-resistance with p-type electric-conducting layer 24a and the contact layer made of transparent ITO, ZnO, NiO, the heavily doped low resistance semiconductor etc. that there is identical conduction model with conductive layer, or comprising can Ag, Al, DBR(Bragg mirror of good reflective character) etc. the reflector that formed, this reflector can be single or multiple lift structure.Further, an ITO, ZnO also can be set between this reflector and p-type electric-conducting layer 24a, contact layer that NiO, the heavily doped low resistance semiconductor etc. that has identical conduction model with conductive layer are made, to form low resistance contacts.
The Au being applicable to carry out ultrasonic bonding with p weld pad 22a can be prepared in metal level 23 top layer that contacts with p weld pad 22a, carry out the AuSn of eutectic weldering, carry out the Ag of Reflow Soldering, carry out the Au pressurizeing or heat pressure bonding, or carry out the Ni of soldering, thus the pressure mode such as bonding or soldering can be added by ultrasonic bonding, eutectic weldering, Reflow Soldering, pressurization or heating and be fixedly connected on p weld pad 22a.
Then after thinning epitaxial substrate, the epitaxial wafer being coated with metal level 23 is cut into some semiconductor light emitting crystal grain, again semiconductor laminated, the metal level 23 be made up of p-type electric-conducting layer 24a, luminescent layer 24b and N-shaped conductive layer 24c, together with the epitaxial substrate used during epitaxial semiconductor lamination, i.e. semiconductor light emitting crystal grain, is placed on p weld pad 22a.P weld pad 22a surface is close on metal level 23 surface, adds the mode of pressure bonding, soldering, metal level 23 and p weld pad 22a are interconnected by comprising ultrasonic bonding, eutectic weldering, Reflow Soldering, pressurization or heating.
Usually when preparing semiconductor light emitting crystal grain, insulating barrier 29 is deposited in semiconductor laminated surrounding side, whole semiconductor laminated surrounding side wrap is got up, thus can effectively prevent in whole semiconductor light emitting light source preparation process, between N-shaped conductive layer 24c and p-type electric-conducting layer 24a, there is short circuit and electric leakage, promote process rate and light source reliability.The material preparing the use of this insulating barrier 29 comprises SiO 2, Si 3n 4, Al 2o 3, AlN, TiO 2, pottery or the insulating material such as glass.
After protecting exposed all metal surfaces and semiconductor laminated side; the mode comprising chemical stripping or the thinning rear chemical corrosion of grinding or laser lift-off is adopted to remove epitaxial substrate; and then by comprising the method etching semiconductor stack surface of chemical corrosion and/or dry etching (comprising ICP); exposed section is for the preparation of the N-shaped conductive layer 24c of current extending 25; and make N-shaped conductive layer 24c surface structuration by the mode of chemical corrosion and/or dry etching; form the coarse or convex-concave surface of taper, to increase forward light extraction efficiency.
On N-shaped conductive layer 24c surface by comprising electron beam evaporation plating, the mode of magnetron sputtering prepares current extending 25, this current extending 25 can be single or multiple lift structure, comprise ITO, ZnO, NiO, or directly adopt the semiconductor layer of heavily doped low-resistance n-type conductive layer 24c as current extending 25.
In the present embodiment, by comprise chemical plating, electron beam evaporation plating, magnetron sputtering mode current extending 25 surface preparation n-electrode 25a; Connect n-electrode 25a and n pad 22b by the mode comprising ultrasonic bonding with interconnecting lead 26, form conduction and connect.Understandable, n-electrode 25a also can be connected on another p pad 22a or n pad 22b by interconnecting lead 26, thus make two or more semiconductor laminated between form the relation of serial or parallel connection.
N-electrode 25a generally includes Ti, Cr, Pt, Pd layer that can form strong bond with current extending 25 and can carry out Au, Ag, Cu layer of ultrasonic bonding with interconnecting lead 26.Wherein, n-electrode 25a is as the second electrode, and can be single or multiple lift structure, spendable material comprises Cu, Ti, Cr, Ni, Ag, Al, W, Au, Pt, Pd and alloy etc. thereof; And interconnecting lead 26 can use conductive threads such as comprising Ag silk, Au silk, Cu silk or B alloy wire.
After removing the protective layer of exposed metal surface and semiconductor laminated side; by comprise electron beam evaporation plating, magnetron sputtering, plasma-enhanced chemical vapor deposition PECVD (PECVD), spin-coating glass (Silica) mode prepare substrate insulating layer 211 on insulated substrate 21 surface, thus better can ensure the insulation between p weld pad 22a and n weld pad 22b.This substrate insulating layer 211 comprises SiO 2, Si 3n 4, Al 2o 3, TiO 2, pottery, glass etc.
Further, around semiconductor laminated periphery can also by comprise drip be coated with, the mode of spraying applies epoxy resin, silica gel, silicones containing fluorescent material, form a glimmering gel coating in semiconductor laminated surrounding and top, after solidification, form fluorescence coating 27.
First pad of the present embodiment is the first needle-like pad, and the second pad is the second needle-like pad, and as shown in Figure 2, this first needle-like pad is needle-like p pad 210a, and the second needle-like pad is needle-like n pad 210b.Needle-like p pad 210a and needle-like n pad 210b is inserted pre-in the through hole of substrate 21, and be through to p weld pad 22a and n weld pad 22b respectively, form conduction to connect, thus can be connected in power supply circuits by needle-like p pad 210a and needle-like n pad 210b, be whole semiconductor light emitting light source access power supply.
The first semiconductor laminated and corresponding weld pad, the second weld pad, current extending are arranged on the packaging body institute sealed envelope of the first surface of substrate by one.In the present embodiment, around semiconductor laminated drop casting glue, and wrap whole semiconductor laminated and fluorescence coating 27, and current extending 25, n-electrode 25a, interconnecting lead 26, p weld pad 22a, the junction of p weld pad 22a and p pad 210a, the junction etc. of n weld pad 22b and n weld pad 22b and n pad 210b, spherical embedding body is obtained as packaging body from shaping solidification by utilizing casting glue surface tension, or utilize prefabricated pressing mold to be pressed on casting glue, slough prefabricated pressing mold after solidification and obtain the embedding body identical with pressing mold cavity shape as packaging body, thus complete the making of whole semiconductor light emitting light source.Wherein, this casting glue can be one or more in epoxy resin, silicon rubber, silicones, further, can also mix fluorescent material and/or diffusant, enrich light-out effect in casting glue.
Finally, the direct insertion semiconductor light emitting light source of band embedding body can be obtained along line of cut 220a, 220b cutting and/or the insulated substrate 21 that bursts apart.In figure, 28a, 28b are the embedding bodies of the adjacent semiconductor light emitting light source simultaneously made on insulated substrate 21.
Introduce the method manufacturing above-mentioned semiconductor light emitting light source below, comprise the following steps:
Prepare semiconductor light emitting crystal grain: at extension substrate surface, by the order epitaxial semiconductor lamination successively of N-shaped conductive layer 24c, luminescent layer 24b, p-type electric-conducting layer 24a.At exposed p-type electric-conducting layer 24a surface coverage metal level 23; After thinning back side epitaxial substrate, cut the semiconductor light emitting crystal grain that the epitaxial wafer that bursts apart becomes some separation.This semiconductor light emitting crystal grain comprises epitaxial substrate, semiconductor laminated and metal level, and its shape comprises the one in square, rectangle, hexagonal rhombus, other polygon; The surface area of semiconductor light emitting crystal grain is less than 500 square millimeters.
Can contact layer be prepared between metal level 23 and p-type electric-conducting layer 24a, thus between metal level 23 with p-type electric-conducting layer 24a, form low resistance contacts be connected.Further, can also reflector be prepared between metal level 23 and described contact layer, thus can reflection ray, improve light extraction efficiency.
In the preparation of semiconductor light emitting crystal grain, can along the line of cut between semiconductor light emitting crystal grain, preparation one is through to groove that is semiconductor laminated and epitaxial substrate interface from semiconductor laminated surface or metal level 23 surface.Line of cut is positioned at groove central authorities, and recess width is greater than cutting width, in groove, be filled with inorganic insulating material, and inorganic insulating material comprises SiO 2, Si 3n 4, Al 2o 3, AlN, TiO 2, glass or pottery, fill method comprises electron beam evaporation, magnetron sputtering, plasma-enhanced chemical vapor deposition PECVD (PECVD), spin-coating glass (Silica).
Prepare substrate: prepare the corresponding conducting channel of one or more semiconductor light emitting light source at the first surface of insulated substrate 21.In the present embodiment, the first surface that this conducting channel is included in insulated substrate 21 prepares p weld pad 22a and the n weld pad 22b of mutually insulated.And preparation and the first pad of being electrically connected respectively of p weld pad 22a and n weld pad 22b and the second pad; In the present embodiment, this first pad and the second pad are respectively needle-like p pad 210a and needle-like n pad 210b.
Connect semiconductor light emitting crystal grain and substrate: the semiconductor light emitting crystal grain of preparation is placed on p weld pad 22a surface, and metal level 23 surface is close to mutually with p weld pad 22a surface, and strong bonded conducting.Metal level 23 surface and p weld pad 22a surface associated methods comprises ultrasonic bonding, eutectic welds, Reflow Soldering, soldering or pressurizeing or heating one or more modes under pressurized conditions in bonding.
Remove substrate: after completing being fixedly connected with of semiconductor light emitting crystal grain and substrate, protect exposed conducting channel, pad and semiconductor laminated side, then remove epitaxial substrate.Remove the adoptable method of epitaxial substrate and comprise chemical stripping, chemical corrosion, thinning post-chemical mechanical polishing or laser lift-off etc.
Prepare current extending: adopt the mode of chemical corrosion and/or dry etching to etch the semiconductor laminated surface after removing epitaxial substrate, expose the N-shaped conductive layer 24c for the preparation of current extending 25, and structuring N-shaped conductive layer 24c is surperficial, make it to form taper rough surface or convex-concave surface; And prepare current extending 25 on structuring N-shaped conductive layer 24c surface.
Electrical connection current extending 25 and n weld pad 22b: current extending 25 is conducted electricity with n weld pad 22b or another p weld pad 22a and is connected.In the present embodiment, connect n-electrode 25a and n pad 2b by interconnecting lead 26, form conduction and connect.
Prepare packaging body: around p weld pad 22a, n weld pad 22b of semiconductor laminated and correspondence, current extending 25 drop or coating casting glue, surface tension by casting glue obtains embedding body from shaping or pressing mold shaping Post RDBMS, thus completes the making of whole semiconductor light emitting light source.
Understandable; before preparing packaging body; after the protective layer of metal surface and semiconductor laminated exposed sides can also be removed; by comprise electron beam evaporation plating, magnetron sputtering, plasma-enhanced chemical vapor deposition PECVD (PECVD), spin-coating glass (Silica) mode prepare substrate insulating layer 211 on insulated substrate 21 surface, thus better can ensure the insulation between p weld pad 22a and n weld pad 22b.This substrate insulating layer 211 comprises SiO 2, Si 3n 4, Al 2o 3, TiO 2, pottery, glass etc.
Further, around semiconductor laminated periphery can also by comprise drip be coated with, the mode of spraying applies epoxy resin, silica gel, silicones containing fluorescent material, form a fluorescent glue coating in semiconductor laminated surrounding and top, after solidification, form fluorescence coating 27.
Prepare semiconductor light emitting light source: obtain the semiconductor light emitting light source be separated along line of cut cutting and/or the insulated substrate 21 burst apart containing multiple semiconductor light emitting light source.
Apply semiconductor light emitting light source of the present invention and manufacture method, directly can be fixed on the p weld pad 22a of insulated substrate 21 by metal level 23 by semiconductor laminated, and preparation has the insulated substrate 21 of needle-like p pad 10a and needle-like n pad 10b, can directly as lamp plate, lamp bar, the substrate of lamppost etc., chip manufacturing is carried out without the need to said needs in prior art, LED, forward the flow processs such as lamp applications to again, significantly can shorten the manufacturing process from epitaxial wafer to semiconductor light emitting light source, reduce process procedure and the device category that must use and quantity, chip manufacturing and the manufacture of semiconductor light emitting light source and light fixture manufacture are organically combined, significantly can not only reduce the use amount of raw and auxiliary material, more can significantly promote comprehensive yield, reduce manufacturing cost.
In addition, semiconductor light emitting light source internal thermally conductive pathways involved in the present invention is short, is directly passed to p weld pad 22a by metal level 23, then is distributed by insulated substrate 21, and link and the interface of experience are few, and the capacity of heat transmission is strong, thermal resistance is low; Semiconductor light emitting light source manufacture method involved in the present invention can be avoided, because of the adverse effect of epitaxial wafer diameter increase to manufacturing process, effectively can overcoming the various problem and technical bottleneck that face in substrate removal process at present completely.
As shown in Figure 3, be the second embodiment of semiconductor light emitting light source of the present invention, comprise insulated substrate 31, p weld pad 32, metal level 33, semiconductor laminated 34, current extending 35, interconnect conductive layers 36, semiconductor laminated surrounding insulating barrier 37, n weld pad 38, fluorescence coating 39, embedding body 310, p pad 310a, p interconnecting metal 311a, n pad 310b, n interconnecting metal 311b, line of cut position 320a, 320b, 320c.
Comprise with the embodiment difference of Fig. 2: replace n-electrode 25a and interconnecting lead 26 by by the interconnect conductive layers 36 comprising electron beam evaporation plating, prepared by magnetron sputtering, chemical plating mode, eliminate the preparation process of n-electrode 25a.Described interconnect conductive layers is single or multiple lift structure; Prepare that the spendable material of described interconnect conductive layers comprises in Cu, Ti, Cr, Ni, Ag, Al, W, Au, Pt, Pd and alloy thereof one or more.
Adopt interconnect conductive layers 36 to replace wire interconnecting lead 26 can avoid completely rupturing the inefficacy caused because of interconnecting lead 26, can significantly promote cold-and-heat resistent impact capacity and shock resistance.In addition, needle-like p pad 310a, n pad 310b is replaced respectively by sheet p pad 310a, n pad 310b being suitable for surface mount welding.This p pad 310a, n pad 310b be arranged on insulated substrate 31 away from semiconductor laminated 34 second surface, and, utilize p interconnecting metal 311a to run through this insulated substrate 31 p pad 310a is conducted electricity with p weld pad 32 to be connected, utilize n interconnecting metal 311b to run through this insulated substrate 31 and n pad 310b is conducted electricity with n weld pad 38 be connected.In addition, pour into casting glue by plane and replace the sealing of partial points drip irrigation.The casting glue poured into by plane solidifies and after cutting, can obtain block labeling type semiconductor illuminating source.Other structures and manufacture method substantially identical with Fig. 2 embodiment, therefore not repeat.
As shown in Figure 4, it is the semiconductor light emitting light source of the third embodiment of the present invention, comprise insulated substrate 41, p weld pad 42a, n weld pad 42b, metal level 43, semiconductor laminated 44, current-diffusion layer 45, n-electrode 46, interconnecting lead 47, preformed lens 48, the cavity 49 between preformed lens 48 and insulated substrate 41, lens pin 410, lens pin jack 411, p pad 412a, n pad 412b, interconnecting metal 413a, 413b, semiconductor laminated surrounding side insulation layer 414, substrate insulating layer 415, line of cut position 420a, 420b.
Comprise with Fig. 2,3 illustrated embodiment differences: preformed lens 48 or preform lampshade replace the embedding body 28(Fig. 2 be shaped by casting glue) and embedding body 310(Fig. 3).The material that preformed lens 48 or preform lampshade use comprise in epoxy resin, silicon rubber, silicones, PMMA, PC, glass, transparent ceramic one or more.Further, in preformed lens or preform lampshade, be mixed with fluorescent material and/or diffusant, or in preformed lens or preform lampshade coated inner wall, spraying or paste a fluorescence coating and/or diffusant, to improve light extraction efficiency.
As shown in Figure 4, can the prefabricated lens pin jack 411 matched with the lens pin 410 of preformed lens 48 or the groove matched with the port of preformed lens 48 on insulated substrate 41 surface, make preformed lens 48 can scioptics pin jack 411 or groove together with insulated substrate 41 locating fastener so that the bonding and sealing of preformed lens 48 and substrate joint portion.
Before placement lens 48, by coating fluorescent glue parcel semiconductor laminated 44, lens 48 can be placed again after solidifying to form fluorescence coating.Place after lens 48, can pour into filling glue by glue filling opening prefabricated on substrate 41 and steam vent in cavity 49, comprise silica gel, silicon rubber or be mixed with silica gel, the silicon rubber of fluorescent material and/or diffusant.After perfusion, sealing glue filling opening and steam vent.
Other structures and the manufacture method of the present embodiment semiconductor light emitting light source are substantially identical with Fig. 2, Fig. 3 embodiment, therefore do not repeat.
As shown in Figure 5, it is the 4th embodiment of semiconductor light emitting light source of the present invention, comprise insulated substrate 51, p weld pad 52a, n weld pad 52b, metal level 53, semiconductor laminated 54, current extending 55, n-electrode 56, interconnecting lead 57, fluorescence coating 58, embedding body 59, the template 510 of casting, template pin 511, template pin jack 512, p pad 513a, n pad 513b, interconnecting metal 514a, 514b, semiconductor laminated surrounding side insulation layer 515, substrate insulating layer 516, line of cut position 520a, 520b.
Be with the embodiment difference shown in Fig. 2, Fig. 3: the present embodiment adopts that casting replaces drop from being shaped, pressing mold is shaped and plane is poured into and is shaped, its advantage can obtain different embedding bodies 59, as convex, spill etc. by design template 510 cavity shape.
Its manufacture process comprises and is snapped in template pin jack 512 by template 510 by template pin 511, and then in template 510 inner chamber, inject casting glue by glue filling opening prefabricated on the substrate 51, empty chamber air is discharged by steam vent.After filling template cavity, sealing glue filling opening and steam vent.After casting glue solidification, slough template 10.
The p pad of the embodiment shown in Fig. 2, Fig. 3, Fig. 4 and Fig. 5 and n pad are all arranged on opposite side or the opposite side surface of substrate, also can be arranged on described substrate first surface, be positioned at the outside of embedding body or lens or lampshade.Casting glue or lens or the semiconductor laminated of lampshade parcel can be single or several, and carry out mutual series, parallel by inner conductive circuit or connection in series-parallel connects.
As shown in Figure 6, be the 5th embodiment of semiconductor light emitting light source of the present invention, comprise electrically-conductive backing plate 61, substrate insulating layer 62, p weld pad 63, metal level 64, semiconductor laminated 65, current extending 66, interconnect conductive layers 67, n weld pad 68, cofferdam 69, semiconductor laminated surrounding side insulation layer 610, fluorescence coating 611, embedding body 612, surface insulation layer 613, n interconnecting metal 68a, n pad 68b, p interconnecting metal 63a, p pad 63b, line of cut position 620a, 620b.
The difference of the present embodiment and other embodiments is: adopt electrically-conductive backing plate 61 to replace insulated substrate.Described metal substrate comprises iron substrate, ferroalloy substrate, copper base, copper alloy substrate, aluminium base, aluminium alloy base plate, molybdenum substrate, molybdenum alloy substrate.In order to arrange multiple semiconductor laminated 65 on electrically-conductive backing plate, mutually can to go here and there again and semiconductor laminated simultaneously, having a substrate insulating layer 62 at substrate surface.This electrically-conductive backing plate 61 can for metal substrate or other there is the substrate of conductive characteristic, the operable material of metal substrate comprise in iron, ferroalloy, copper, copper alloy, aluminium, aluminium alloy, molybdenum, molybdenum alloy one or more.
The p weld pad 63, n weld pad 68 etc. of conducting channel are arranged on the surface of substrate insulating layer 62.Show schematically the states of two semiconductor laminated 65 series connection in figure, a semiconductor laminated current extending is connected on another semiconductor laminated p weld pad 63 by interconnect conductive layers 67, forms series connection.Certainly, if substrate can as the pole in semiconductor laminated being interconnected, then semiconductor laminatedly accordingly can directly be placed on substrate surface or be set directly on the weld pad of substrate surface, thus make semiconductor laminated formation be connected in parallel state.
With Fig. 2, embodiment illustrated in fig. 3 unlike: in the present embodiment, first surround semiconductor laminated 65 and corresponding weld pad, current extending etc. with cofferdam 69, then in cofferdam, pour into casting glue or fill the casting glue being mixed with fluorescent material and/or diffusant, after solidification, forming the embedding body structure in band cofferdam.Other structures of the present embodiment semiconductor light emitting light source and manufacture method substantially identical with other embodiments above-mentioned, therefore not repeat.
Understandable, by simplifying said method, can also semiconductor luminous chip be prepared, as shown in Figure 7, at least comprise the following steps:
Prepare semiconductor light emitting crystal grain: at extension substrate surface, by the order epitaxial semiconductor lamination successively of N-shaped conductive layer 74c, luminescent layer 74b, p-type electric-conducting layer 74a.At exposed p-type electric-conducting layer 74a surface coverage metal level 73; After epitaxial substrate described in thinning back side, to cut and/or the described epitaxial wafer that bursts apart becomes the semiconductor light emitting crystal grain of some separation.This semiconductor light emitting crystal grain comprises epitaxial substrate, semiconductor laminated and metal level, and its shape comprises the one in square, rectangle, hexagonal rhombus, other polygon; The surface area of semiconductor light emitting crystal grain is less than 500 square millimeters.
Prepare substrate: prepare the corresponding conducting channel of one or more semiconductor luminous chip at the first surface of electrically-conductive backing plate 71.In the present embodiment, the first surface that this conducting channel is included in electrically-conductive backing plate 71 prepares the p weld pad 72a of mutually insulated.
Connect semiconductor light emitting crystal grain and substrate: the semiconductor light emitting crystal grain of preparation is placed on p weld pad 72a surface, and metal level 73 surface is close to mutually with p weld pad 72a surface, and strong bonded conducting.Metal level 73 surface and p weld pad 72a surface associated methods comprises ultrasonic bonding, eutectic welds, Reflow Soldering, soldering or pressurizeing or heating one or more modes under pressurized conditions in bonding.
Remove substrate: after protecting exposed conducting channel, pad and semiconductor laminated side, remove the epitaxial substrate on described semiconductor light emitting crystal grain, can the method for choice for use comprise in chemical stripping, chemical corrosion, thinning post-chemical mechanical polishing, laser lift-off one or more;
Prepare current extending: adopt the mode of chemical corrosion and/or dry etching to etch the semiconductor laminated surface after removing epitaxial substrate, expose the N-shaped conductive layer 74c for the preparation of current extending 75, and structuring N-shaped conductive layer 74c is surperficial, make it to form taper rough surface or convex-concave surface; And prepare current extending 75 on structuring N-shaped conductive layer 74c surface; At described current extending surface preparation the second electrode 75a.
Prepare semiconductor luminous chip: obtain the semiconductor luminous chip be separated along line of cut cutting and/or the substrate burst apart containing multiple semiconductor luminous chip.
Understandable, each technical characteristic of the various embodiments described above can combination in any to use and unrestricted.
The foregoing is only embodiments of the invention; not thereby the scope of the claims of the present invention is limited; every utilize specification of the present invention and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present invention.

Claims (10)

1. a manufacture method for semiconductor light emitting light source, is characterized in that, at least comprises the following steps:
S1: prepare semiconductor light emitting crystal grain: at extension substrate surface, semiconductor laminated described in epitaxial growth successively by the order of the second conductive layer, luminescent layer, the first conductive layer; With the first conductive layer surface that the whole epitaxial wafer of metal level uniform fold is exposed; After epitaxial substrate described in thinning back side, to cut and/or the described epitaxial wafer that bursts apart becomes the semiconductor light emitting crystal grain of some separation; Described semiconductor light emitting crystal grain comprises described epitaxial substrate, described semiconductor laminated and described metal level;
S2: prepare substrate: prepare the corresponding conducting channel of one or more semiconductor light emitting light source at the first surface of substrate, or, after the first surface of the described substrate of tool conductive characteristic prepares described substrate insulating layer, then prepare the corresponding conducting channel of one or several semiconductor light emitting light sources at described surface of insulating layer; Described conducting channel comprises at least one first weld pad and at least one second weld pad; Prepare at least one first pad be connected with at least one first weld pad, and at least one second pad be connected with at least one second weld pad;
S3: connect semiconductor light emitting crystal grain and substrate: described semiconductor light emitting crystal grain is placed on the first weld pad surface, described layer on surface of metal and described first weld pad surface are close to mutually, and strong bonded conducting; The associated methods on described layer on surface of metal and described first weld pad surface comprises ultrasonic bonding, eutectic welds, Reflow Soldering, soldering, pressurizeing or heating one or more methods under pressurized conditions in bonding;
S4: remove substrate: after protecting exposed conducting channel, pad and semiconductor laminated side, remove the epitaxial substrate on described semiconductor light emitting crystal grain; The method removing epitaxial substrate on described semiconductor light emitting crystal grain comprise in chemical stripping, chemical corrosion, thinning post-chemical mechanical polishing, laser lift-off one or more;
S5: prepare current extending: adopt the mode of chemical corrosion and/or dry etching to etch the semiconductor laminated surface after removing described epitaxial substrate, expose the second conductive layer for the preparation of current extending, and structuring second conductive layer surface, make it to form taper rough surface or convex-concave surface; Described current extending is covered at described structuring second conductive layer surface;
S6: be electrically connected described current extending and the second weld pad: described current extending to be conducted electricity with described second weld pad or another the first weld pad by least one interconnect conductive layers and/or interconnecting lead and is connected; Or, after at least one second electrode of described current extending surface preparation, then to be conducted electricity with described second weld pad or another first weld pad described by least one interconnect conductive layers and/or interconnecting lead by described second electrode and be connected; Described interconnect conductive layers is the thin metal layer by sputtering or evaporation or chemical plating or electroplating deposition, and described interconnecting lead is the wire by ultrasonic bonding;
S7: prepare packaging body; In described S7, employing comprise following any one: a: around the first weld pad of described semiconductor laminated and correspondence, the second weld pad, current extending or current extending and the second electrode drop or coating casting glue, by the surface tension of casting glue to be shaped or pressing mold shaping Post RDBMS obtains embedding body; B: preformed lens or preform lampshade are arranged on described substrate first surface, semiconductor laminated and corresponding the first weld pad, the second weld pad, current extending or the current extending of the single semiconductor light emitting light source of its opening parcel composition and the second electrode, interconnect conductive layers or interconnecting lead, and seal described preformed lens or the junction surface between preform lampshade and described substrate first surface; Inject casting glue or inject the casting glue being mixed with fluorescent material and/or diffusant in described preformed lens or the cavity that formed between preform lampshade and described substrate first surface; C: embedding body shaping template is placed on described substrate first surface, injects casting glue or is mixed with the casting glue of fluorescent material and/or diffusant, slough embedding body shaping template after solidifying to form embedding body in template cavity; D: after the surrounding of semiconductor laminated and corresponding first weld pad of the single semiconductor light emitting light source of composition, the second weld pad, current extending or current extending and the second electrode, interconnect conductive layers or interconnecting lead arranges cofferdam, in cofferdam, fill casting glue or fill the casting glue being mixed with fluorescent material and/or diffusant, solidifying to form embedding body;
S8: prepare semiconductor light emitting light source: obtain the semiconductor light emitting light source be separated along line of cut cutting and/or the substrate burst apart containing multiple semiconductor light emitting light source.
2. manufacture method according to claim 1, is characterized in that, before S7 prepares packaging body, first described semiconductor laminated with the casting glue parcel being mixed with fluorescent material, forms fluorescence coating after solidification.
3. the semiconductor light emitting light source that manufacture method according to claim 1 is obtained, it is characterized in that, comprise a substrate, described substrate has first surface and second surface; Be provided with at least one conducting channel at the first surface of described substrate, described conducting channel comprises at least one first weld pad and at least one second weld pad; Described first weld pad and the second weld pad insulated from each other, described substrate has first pad be connected with described first weld pad at least, has second pad be connected with described second weld pad at least;
At least be provided with semiconductor lamination on described first weld pad surface, describedly semiconductor laminatedly at least comprise one first conductive layer, a luminescent layer and one second conductive layer; Described first conductive layer surface has a metal level, and described metal level directly contacts with described first conductive layer or have a reflector and/or a contact layer between described metal level and described first conductive layer; Described layer on surface of metal is close to described first weld pad surface and is connected; Described second conductive layer surface has a current extending; Described current extending conducts electricity with described second weld pad or another the first weld pad and is connected, or, be at least provided with one second electrode on described current extending surface, then conducted electricity with described second weld pad or another first weld pad described by described second electrode and be connected;
Described semiconductor laminated and corresponding described first weld pad, the second weld pad and current extending, or corresponding described first weld pad, the second weld pad, current extending and the second electrode are arranged on the packaging body institute sealed envelope of described substrate first surface by one, described first pad and the second pad are positioned at described substrate first surface outside described packaging body, described substrate side surfaces and/or described second substrate surface.
4. semiconductor light emitting light source according to claim 3, is characterized in that, described semiconductor laminated surrounding side wrap up by the insulating barrier.
5. the semiconductor light emitting light source according to claim 3 or 4, it is characterized in that, described first pad is arranged on described substrate first surface, described second substrate surface and/or described substrate side surfaces, and by being arranged on described substrate first surface, described second substrate surface and/or described substrate side surfaces and/or running through described packaging body and/or run through the first interconnecting metal of described substrate, conduct electricity with described first weld pad and be connected; Or described first pad is conduct electricity through described substrate and described first weld pad the first needle-like pad be connected;
Described second pad is arranged on described substrate first surface, described second substrate surface and/or described substrate side surfaces, and by being arranged on described substrate first surface, described second substrate surface and/or described substrate side surfaces and/or running through described packaging body and/or run through the second interconnecting metal of described substrate, conduct electricity with described second weld pad and be connected; Or described second pad is conduct electricity through described substrate and described second weld pad the second needle-like pad be connected.
6. semiconductor light emitting light source according to claim 5, it is characterized in that, when the described substrate arranging described second weld pad, the second pad and the second interconnecting metal has conductive characteristic, at described second weld pad, the second pad be provided with a substrate insulating layer between the second interconnecting metal and described substrate; When the described substrate arranging described first weld pad, the first pad and the first interconnecting metal has conductive characteristic, at described first weld pad, the first pad be provided with a substrate insulating layer between the first interconnecting metal and described substrate or be set directly on described substrate.
7. the semiconductor light emitting light source according to claim 3 or 4, is characterized in that, described current extending to be conducted electricity with described second weld pad or another first weld pad described by least one interconnect conductive layers and/or interconnecting lead and is connected; Or,
Have one second electrode at least on described current extending surface, described second electrode to be conducted electricity with described second weld pad or another first weld pad described by least one interconnect conductive layers and/or interconnecting lead and is connected.
8. the semiconductor light emitting light source according to claim 3 or 4, is characterized in that, described substrate first surface is smooth planar surface or the smooth surface comprising concavo-convex platform.
9. the semiconductor light emitting light source according to claim 3 or 4, is characterized in that, described packaging body comprises embedding body, preformed lens or preform lampshade;
Described embedding body is by casting glue solidified forming; Described casting glue comprise in epoxy resin, silicon rubber, silicones, the epoxy resin being mixed with fluorescent material and/or diffusant, silicon rubber, silicones one or more; Described embedding body forming mode comprise from shapings, pressing mold shapings, casting, in cofferdam filling shaping in one or more;
Described preformed lens and preform lampshade comprise in epoxy resin, silicon rubber, silicones, PMMA, PC, glass, transparent ceramic, the epoxy resin being mixed with fluorescent material and/or diffusant, silicon rubber, silicones, PMMA, PC, glass, transparent ceramic one or more.
10. manufacture a method for semiconductor luminous chip, it is characterized in that, at least comprise the following steps:
S1: prepare semiconductor light emitting crystal grain: at extension substrate surface, by the order epitaxial growth semiconductor lamination successively of the second conductive layer, luminescent layer, the first conductive layer; With the first conductive layer surface that the whole epitaxial wafer of a metal level uniform fold is exposed; Described metal level directly contacts with described first conductive layer or have a reflector and/or a contact layer between described metal level and described first conductive layer;
S2: after epitaxial substrate described in thinning back side, cuts and/or the described epitaxial wafer that bursts apart becomes the semiconductor light emitting crystal grain of some separation; Described semiconductor light emitting crystal grain comprises described epitaxial substrate, described semiconductor laminated and described metal level;
S3: prepare substrate: at the first surface of substrate or prepare the corresponding conducting channel of one or more semiconductor luminous chip after the first surface of described substrate arranges an insulating barrier; At least one first pad that described conducting channel comprises at least one first weld pad and is connected with at least one first weld pad; Described substrate first surface is smooth planar surface or the smooth surface comprising concavo-convex platform;
S4: connect semiconductor light emitting crystal grain and substrate: described semiconductor light emitting crystal grain is placed on the first weld pad surface, described layer on surface of metal and described first weld pad surface are close to mutually, and strong bonded conducting; The associated methods on described layer on surface of metal and described first weld pad surface comprises ultrasonic bonding, eutectic welds, Reflow Soldering, soldering, pressurizeing or heating one or more methods under pressurized conditions in bonding;
S5: remove substrate: after protecting exposed conducting channel and semiconductor laminated side, remove the epitaxial substrate on described semiconductor light emitting crystal grain; The method removing epitaxial substrate on described semiconductor light emitting crystal grain comprise in chemical stripping, chemical corrosion, thinning post-chemical mechanical polishing, laser lift-off one or more;
S6: prepare current extending: adopt the mode of chemical corrosion and/or dry etching to etch the semiconductor laminated surface after removing described epitaxial substrate, expose the second conductive layer for the preparation of current extending, and structuring second conductive layer surface, make it to form taper rough surface or convex-concave surface; A current extending is covered at described structuring second conductive layer surface; At at least one second electrode of described current extending surface preparation;
S7: prepare semiconductor luminous chip: obtain the semiconductor luminous chip be separated along line of cut cutting and/or the substrate burst apart containing multiple semiconductor luminous chip.
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