CN102955123A - Examination method for different-party IP (internet protocol) containing client party chip antenna effect - Google Patents
Examination method for different-party IP (internet protocol) containing client party chip antenna effect Download PDFInfo
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- CN102955123A CN102955123A CN2011102402513A CN201110240251A CN102955123A CN 102955123 A CN102955123 A CN 102955123A CN 2011102402513 A CN2011102402513 A CN 2011102402513A CN 201110240251 A CN201110240251 A CN 201110240251A CN 102955123 A CN102955123 A CN 102955123A
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Abstract
The invention discloses an examination method for different-party IP (internet protocol) containing client party chip antenna effect. The method includes following steps: step one, identifying all input and output interfaces in an IP module layout; step two, selecting the input and output interface used for generating final data; step three, taking the input and output interface as a starting point to extract out all lines related to the antenna effect along the lines connecting every interface from top to bottom; step four, enabling the extracted lines to generate a GDSII formatted file capable of being read by a user layout tool and providing the file for a client; and step five, synthesizing the GDSII formatted file into a main chip by the client for physical layout verification of the final data. By the method, data which can be directly used for antenna design rule examination by a client party can be generated, and a design company can perform antenna effect examination close to an entity through tools before the data are given out, so that repeat data modification caused by violation of design rules by the client can be avoided.
Description
Technical field
The present invention relates to a kind of inspection method of chip, be specifically related to a kind of inspection method that contains customer's antenna component effect of different side IP.
Background technology
In the process that chip (Wafer) is made, because make the relation that PLASM (plasma) injects, a large amount of charge accumulateds may be transferred to by the conductor layer that expose on the Wafer surface gate leve zone, cause the gate leve oxide film impaired, affect the yield rate of device, this phenomenon is called as " antenna effect ".
For avoiding antenna effect, generally after physical layout is finished, utilize Software tool that chip is carried out Antenna (antenna) DRC (Design Rule Check) and check.But the supplier of IP (a kind of chip unit) module is for the protection to one's own side's intellecture property; generally can not provide complete IP module domain normally carrying out with the assurance customer authentication to design corporation; and only provide the right to use of this IP module; therefore use the design corporation of the opposing party IP module can only obtain only to comprise such IP module interface (Port) information file and can't obtain inner concrete domain; can't carry out to full chip layout the inspection of Antenna; this will very likely can cause sending data (tapeout), and find a large amount of antenna mistakes (Antenna Violation) behind the synthetic partial data of Foundry (foundries).
For addressing the above problem, following two kinds of solutions are proposed:
1, the IP module supplier is drawn diode (Diode) that Port adds ground connection in each of the IP module that provides and is used for the electric charge of releasing, and can guarantee that like this circuit that links to each other with these interfaces does not have the Antenna problem.
The shortcoming of this method is to affect very much the area of IP module, so be not widely used.
2, the IP module supplier utilizes Abstract (a kind of dbase) instrument of similar Cadence company to extract and is similar to following text:
This document is Antenna LEF (Library Exchange Format storehouse Interchange Format) text, and it has recorded the antenna effect information of IP module, and this document can be by (the Place﹠amp of automatic placement and routing; Route) instrument reads, and makes design corporation carry out Antenna by it on placement-and-routing's instrument and checks.
The shortcoming of this method is possible cause the result of contradiction.Antenna LEF can only be applied in placement-and-routing's instrument, but the data that placement-and-routing's instrument produces not are final data.Must use DRC (Design Rule Check) instrument to carry out Antenna DRC to final data before the tapeout of design corporation checks again.And both are because the data that read are different, cause possibly the result of DRC also different, cause the client at a loss as to what to do, as shown in Figure 1.
In addition, some client can use domain instrument that the result of placement-and-routing is revised again after placement-and-routing, and the domain of having revised can't check in placement-and-routing's instrument with Antenna LEF.
Summary of the invention
Technical matters to be solved by this invention provides a kind of inspection method that contains customer's antenna component effect of different side IP, it can not offer under the prerequisite of the complete IP module of client domain at the IP module supplier, makes the client can guarantee that when final data provides the Antenna problem of one's own side's chip is repaired.
For solving the problems of the technologies described above, the technical solution of inspection method that the present invention contains customer's antenna component effect of different side IP is:
May further comprise the steps:
The first step is identified all IO interface in the IP module domain, comprises title, the positional information of interface;
Described recognition methods is: employing Perl program reads the physics GDSII domain of IP module in binary mode, by the Text mark in each stratum, the invoked information of this stratum and each stratum of Hash structure storage IP module physical layout; Go out top layer in this GDSII domain by the Hash Structure Calculation, the Text information in the top layer is fed back to user interface, the Text information in the top layer is the IO interface in the IP module domain.
Second step according to the size of information security situation and generated data, is used for generating the used IO interface (Port) of final data at user interface by user's input selection;
In the 3rd step, take selected IO interface as starting point, from top to down all extracts the circuit relevant with antenna effect along the circuit that connects each interface;
Concrete grammar is: the Text graph block of each interface of generating virtual extracts the relevant circuit with Antenna that is connected with these virtual graph blocks.
The 4th step generated a GDSII formatted file that can be read by user's domain instrument with the circuit that crawls out, and this document only comprises the relevant information of antenna, offers the client;
In the 5th step, the client is synthesized to this GDSII formatted file in the master chip when doing the inspection of physical layout antenna effect, can carry out the physical layout checking of final data.
The technique effect that the present invention can reach is:
The present invention can generate a customer can be directly used in the data that the Antenna Design rule checks, make the design corporation can be by the antenna effect inspection of instrument near entity before providing data, thereby avoid the client repeatedly to revise because of the data of violating design rule and causing.
The information that only comprises fraction IP in the GDSII formatted file that the present invention generates both can have been protected the intellecture property of IP module supplier, the risk that the antenna effect that can make design corporation evade design chips is again brought.
Description of drawings
The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments:
Fig. 1 is the process flow diagram of the inspection method of prior art antenna effect;
Fig. 2 is the process flow diagram of the inspection method of the present invention's customer's antenna component effect of containing different side IP.
Embodiment
As shown in Figure 2, the present invention contains the inspection method of customer's antenna component effect of different side IP, may further comprise the steps:
The first step, all IO interface (Port) in the identification IP module domain comprise the information such as title, position of interface;
Employing Perl program reads the physics GDSII domain of IP module in binary mode, by Text (text) mark in each stratum, the invoked information of this stratum and each stratum of Hash structure storage IP module physical layout;
Go out top layer (Topcell) in this GDSII domain by the Hash Structure Calculation, the Text information among the Topcell is fed back to user interface, the Text information among the Topcell is the IO interface (Port) in the IP module domain;
Second step according to the size of information security situation and generated data, is used for generating the used IO interface (Port) of final data at user interface by user's input selection;
This IO interface (Port) is and generates needed each interface of IP Antenna GDS;
In the 3rd step, take selected IO interface (Port) as starting point, from top to down all extracts the circuit relevant with antenna (Antenna) effect along the circuit (Net) that connects each interface (Port);
Concrete grammar is: the Text graph block of each interface of generating virtual extracts the relevant circuit (such as metal, hole layer, Gate zone) with Antenna that is connected with these virtual graph blocks;
The 4th step generated a GDSII formatted file that can be read by user's domain instrument with the circuit that crawls out, and this document only comprises the relevant information of antenna (Antenna), offers the client;
In the 5th step, the client is synthesized to this GDSII formatted file in the master chip when doing the inspection of physical layout antenna effect, can carry out the physical layout checking of final data.
The IP Antenna GDSII data that the present invention generates can be designed company and be synthesized in the final physical layout and verify, thereby have evaded the defective of using Antenna Lef to cause.
The present invention makes IP supplier needn't revise the requirement that IP just can adapt to antenna effect.
The present invention is used for when physical layout is verified client's antenna (Antenna) problem being verified (Verify).
Claims (3)
1. an inspection method that contains customer's antenna component effect of different side IP is characterized in that, may further comprise the steps:
The first step is identified all IO interface in the IP module domain, comprises title, the positional information of interface;
Second step according to the size of information security situation and generated data, is used for generating the used IO interface (Port) of final data at user interface by user's input selection;
In the 3rd step, take selected IO interface as starting point, from top to down all extracts the circuit relevant with antenna effect along the circuit that connects each interface;
The 4th step generated a GDSII formatted file that can be read by user's domain instrument with the circuit that crawls out, and this document only comprises the relevant information of antenna, offers the client;
In the 5th step, the client is synthesized to this GDSII formatted file in the master chip when doing the inspection of physical layout antenna effect, can carry out the physical layout checking of final data.
2. the inspection method that contains customer's antenna component effect of different side IP according to claim 1, it is characterized in that, the recognition methods of the described first step is: employing Perl program reads the physics GDSII domain of IP module in binary mode, by the Text mark in each stratum, the invoked information of this stratum and each stratum of Hash structure storage IP module physical layout; Go out top layer in this GDSII domain by the Hash Structure Calculation, the Text information in the top layer is fed back to user interface, the Text information in the top layer is the IO interface in the IP module domain.
3. the inspection method that contains customer's antenna component effect of different side IP according to claim 1, it is characterized in that, the concrete grammar in described the 3rd step is: the Text graph block of each interface of generating virtual extracts the relevant circuit with Antenna that is connected with these virtual graph blocks.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110240251.3A CN102955123B (en) | 2011-08-19 | 2011-08-19 | Examination method for different-party IP (internet protocol) containing client party chip antenna effect |
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| CN201110240251.3A CN102955123B (en) | 2011-08-19 | 2011-08-19 | Examination method for different-party IP (internet protocol) containing client party chip antenna effect |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105574246A (en) * | 2015-12-14 | 2016-05-11 | 上海华虹宏力半导体制造有限公司 | IP module merging method of layout |
| CN106815384A (en) * | 2015-12-02 | 2017-06-09 | 北京华大九天软件有限公司 | A kind of LEF storehouses and the method for GDS storehouses obstacle figure layer comparison check |
| CN107122567A (en) * | 2017-05-23 | 2017-09-01 | 上海华虹宏力半导体制造有限公司 | Module carries out antenna effect inspection method before being incorporated to |
| CN108897933A (en) * | 2018-06-15 | 2018-11-27 | 北方电子研究院安徽有限公司 | A kind of method of quick elimination antenna effect |
| CN112257382A (en) * | 2020-10-29 | 2021-01-22 | 海光信息技术股份有限公司 | Physical verification method, system, device and storage medium for chip design |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106815384A (en) * | 2015-12-02 | 2017-06-09 | 北京华大九天软件有限公司 | A kind of LEF storehouses and the method for GDS storehouses obstacle figure layer comparison check |
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| CN108897933A (en) * | 2018-06-15 | 2018-11-27 | 北方电子研究院安徽有限公司 | A kind of method of quick elimination antenna effect |
| CN112257382A (en) * | 2020-10-29 | 2021-01-22 | 海光信息技术股份有限公司 | Physical verification method, system, device and storage medium for chip design |
| CN112257382B (en) * | 2020-10-29 | 2023-07-21 | 海光信息技术股份有限公司 | Physical verification method, system, device and storage medium for chip design |
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| CN102955123B (en) | 2014-10-08 |
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