CN105574246A - IP module merging method of layout - Google Patents
IP module merging method of layout Download PDFInfo
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- CN105574246A CN105574246A CN201510925820.6A CN201510925820A CN105574246A CN 105574246 A CN105574246 A CN 105574246A CN 201510925820 A CN201510925820 A CN 201510925820A CN 105574246 A CN105574246 A CN 105574246A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
Abstract
The invention discloses an IP module merging method of a layout. The IP module merging method comprises the following steps: analyzing input layout data, and outputting names of all units in the layout data into a set A; extracting names of all IP module data in an IP module database in a set B, and outputting all same elements in the sets A and B to form a set C; taking the IP module data corresponding to the names of various elements in the set C as the IP module data to be merged, and obtaining all absolute paths of the IP module data to be merged according to matching of metal level information of the layout data and unit names of various elements in the set C; and invoking various IP module data according to the absolute paths, and automatically merging the invoked IP module data into the layout data. According to the invention, automatic merging of the IP module data of the layout can be realized; furthermore, automatic detection can be carried out; and the working efficiency and the merging correctness can be greatly increased.
Description
Technical field
The present invention relates to a kind of SIC (semiconductor integrated circuit) method of manufacturing technology, particularly relate to a kind of intellecture property (IntellectualProperty, IP) module synthesis (merge) method.
Background technology
IP module a kind ofly pre-designed has certain integrated circuit, device or parts determining to act on even through checking.The IP module of production firm (Foundary) independent development mostly can be called in custom chip data and layout data, need to only have physical library Interchange Format file (Libraryexchangeformat in the unit module of synthesis IP module in the layout data that client uses, LEF), the LEF main definitions physical message of unit module, as cellar area size, geometric configuration, the physical messages such as wiring layer, unit module does not have internal circuit, and needing the unit module synthesizing IP module to be equivalent to one only has link information and without the IP black box of internal circuit.Before flow, need IP module to synthesize in the layout data that (or be called be incorporated to) provide to client, complete Data Synthesis needs to be operated by the slip-stick artist of Foundary.Here client refers to the design side of chip, and production firm carries out the concrete production of chip after receiving the trust of client; The form of layout data and IP module data is all GDS form.
In existing IP module synthetic method, need the layout data import library using domain instrument raw data and client to be provided, then the data message table provided according to client collects the module type, quantity etc. that need synthesis, wherein can list by IPName (title) or Number (numbering) the IP module that client needs employing production firm in the data message table that provides of client.Afterwards, visually on domain to confirm, from IP module database, then import IP module data in the layout data of client, IP module data and client version diagram data are manually spliced.As Fig. 1, it is the domain schematic diagram in the IP module synthetic method of existing domain; First existing method needs to adopt domain instrument to form domain 101 as Virtuoso or Laker instrument imports layout data, wherein marking region shown in 102 is the unit module needing to carry out the synthesis of IP module, before the synthesis of IP module, the slip-stick artist of production firm needs the data message table provided according to client in domain 101, find unit module corresponding to mark 102, carries out visual confirmation; Import IP module data afterwards, then manually splice.Known existing this method, need to adopt visual method to carry out confirming and adopt manual method to splice, and need to adopt domain instrument that layout data is converted to domain, require a great deal of time and carry out synthesis and the inspection of data with energy, the correctness of manual handle and visual examination cannot be ensured again.
Summary of the invention
Technical matters to be solved by this invention is the IP module synthetic method of domain, and the IP module data that can realize domain synthesizes automatically, and can automatically detect, the correctness that can greatly increase work efficiency and synthesize.
For solving the problems of the technologies described above, the IP module synthetic method of domain provided by the invention comprises the steps:
The layout data of step one, parsing input, exports the title of all unit in described layout data to set A.
In step 2, extraction IP module database, the title of all IP module datas is to integrated B, all elements in described set A is compared with each element of described set B respectively, described set A is exported with all identical elements in described set B and forms set C.
In step 3, described set C, the IP module data corresponding to title of each element is the described IP module data needing synthesis, and the metal hierarchical information according to described layout data obtains all absolute path of described IP module data in described IP module database needing synthesis with the unit name-matches of each element in set C.
Step 4, the absolute path of each described IP module data in described IP module database of synthesizing as required call in each described IP module data, are automatically synthesized in the unit of the identical described layout data of title by the described IP module data of calling in.
Further improvement also comprises the steps:
Step 5, textual form that the title of the quantity of the described IP module data used in building-up process, each described IP module data and substitute mode carried out export and as a result file so that subsequent examination.
Further improvement also comprises the steps:
Step 6, IP module synthesized after described layout data check, when unit needing to synthesize IP module all in described layout data are all synthetic and IP port (Pin) connects all correct, be then judged to be that this IP module synthetic operation is qualified; Otherwise, be judged to be that this IP module synthetic operation is defective.
Further improvement is, in step 2, all elements in described set A is done the comparison of fuzzy matching with each element of described set B respectively, described set A is exported with all identical elements in described set B and forms set C.
Further improvement is, calls in each described IP module data and automatically synthesized by the described IP module data of calling in step 4 with graphical user interface manner.
Further improvement is, on the basis of automatically synthesis, also comprise the manual adaptation step of IP module synthesis in step 4, manually adjustment comprises: in described layout data, increase IP module data, IP module data that IP module data that amendment is synthesized to described layout data and deletion are synthesized to described layout data.
Further improvement is, in step 4, only can synthesize a corresponding described IP module data in a unit of described layout data, plural described IP module data does not allow to be synthesized in the same unit of described layout data.
Further improvement is, in the automatic synthesis of step 4 when the title content of two unit in described layout data is identical but case sensitive time, produce a miscue information, and interrupt automatic synthesis program to guarantee the correctness of IP module synthetic operation.
Further improvement is, all records in the synthesis of IP module are preserved by the mode deriving configuration file, and described configuration file imports in synthesizing for the next time described IP module with same requirements fast.
Embodiment of the present invention method is by analytic layout data and the title of the unit in layout data is formed a set A, element in the set B of the title composition of the element in set A and IP module corresponding to IP module database is compared and the element composition set C that will bear the same name, set C determines in layout data the title needing the unit module carrying out IP synthesis, the data of known set C of the present invention only need the method by extracting and compare just can obtain, and these can complete automatically fast; Need to adopt domain instrument to import layout data relative to existing method and then form domain, in domain, adopt artificial visual to confirm to need the method for the unit module carrying out IP synthesis afterwards, the present invention can increase work efficiency greatly, and can reduce visual brought human error.
The present invention is after obtaining set C, all absolute path needing the described IP module data of synthesis are obtained with the unit name-matches of each element in set C by the metal hierarchical information according to layout data, call in each IP module data according to absolute path afterwards automatically to synthesize, so the present invention can realize the automatic synthesis of IP module, the method of manually splicing synthesis is needed to adopt relative to existing method, the present invention can increase work efficiency greatly, and can reduce human error.
In addition, the present invention the title of the quantity of the IP module data used in building-up process, each IP module data and substitute mode can be carried out textual form export and as a result file so that subsequent examination; Can check automatically in building-up process and carry out corresponding miscue; Configuration file can be produced preserve, the quick importing of the convenient synthesis of IP next time.
In a word, the IP module data that the present invention can realize domain synthesizes automatically, and can automatically detect, the correctness that can greatly increase work efficiency and synthesize.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 is the domain schematic diagram in the IP module synthetic method of existing domain;
Fig. 2 is the process flow diagram of the IP module synthetic method of embodiment of the present invention domain.
Embodiment
As shown in Figure 2, be the process flow diagram of the IP module synthetic method of embodiment of the present invention domain, the IP module synthetic method of embodiment of the present invention domain comprises the steps:
The layout data of step one, parsing input, exports the title of all unit (Cell) in described layout data to set A.Unit in described layout data comprises top layer unit (top-cell) and each subelement (sub-cell), and by Cell title (name) output set A, content is CellID, as A1, A2, A3, A4 ..., An.
In step 2, extraction IP module database, the title of all IP module datas is to integrated B.
Be preferably, the list that can provide from client extracts IP module (Module) title or IP design bag (designkits) name information, and this content preserved as set B, CellID is B1, B2, B3, B4 ..., Bn; Also be in set B, include all IP modules required in the IP module synthesis of client's domain.
All elements in described set A is compared with each element of described set B respectively, described set A is exported with all identical elements in described set B and forms set C.Or the record of each in set B is carried out comparison one by one with the full content of set A, and that finds CellName to match is labeled as True, otherwise is False, it is C1, C2, C3, C4 that the record of all True exports set C, CellID to ..., Cn.Also the common factor of set A and set B is namely got as set C.
In embodiments of the present invention, all elements in described set A is done the comparison of fuzzy matching with each element of described set B respectively, described set A is exported with all identical elements in described set B and forms set C.Carry out fuzzy matching can prevent from omitting, be explained as follows: because set A exports with identical elements all in set B and forms set C in the embodiment of the present invention, so set C is exactly the IP module that will synthesize; But there is kind of a situation to be in set A, have CELL_LEF (because in client version diagram data, IP name is lack of standardization), CELL is had in set B, actual CELL_LEF is equal to CELL (general and client confirms or judges voluntarily), so we can set set A and set B fuzzy matching during productive set C, the element of such C set just adds, and prevents from omitting.
In step 3, described set C, the IP module data corresponding to title of each element is the described IP module data needing synthesis, and the metal hierarchical information according to described layout data obtains all absolute path of described IP module data in IP module database needing synthesis with the unit name-matches of each element in set C.In the embodiment of the present invention, according to the standard routes that IP places, traversal searches each element in set C, when having eligible, records the destination path that IP places in LOG file, and when not having qualified situation, display ERROR information is with reminding user; The standard routes that wherein IP places is the root directory that IP module is placed in IP module database, and the destination path that IP places is the absolute path of described IP module data in IP module database.
Step 4, the absolute path of each described IP module data in IP module database of synthesizing as required call in each described IP module data, are automatically synthesized in the unit of the identical described layout data of title by the described IP module data of calling in.
Be preferably, call in each described IP module data with graphical user interface manner and the described IP module data of calling in is synthesized automatically.
The basis of automatically synthesis also comprises the manual adaptation step of IP module synthesis, and manually adjustment comprises: in described layout data, increase IP module data, IP module data that IP module data that amendment is synthesized to described layout data and deletion are synthesized to described layout data.Be preferably, above-mentioned increase IP (AddIP), amendment IP (ModifyIP) and deletion IP (DeleteIP) are all at the enterprising edlin of visualization interface.
Only can synthesize a corresponding described IP module data in a unit of described layout data, plural described IP module data does not allow to be synthesized in the same unit of described layout data.
In automatic synthesis when the title content of two unit in described layout data is identical but case sensitive time, produce a miscue information, and interrupt automatic synthesis program to guarantee the correctness of IP module synthetic operation
Step 5, textual form that the title of the quantity of the described IP module data used in building-up process, each described IP module data and substitute mode carried out export and as a result file so that subsequent examination.
Step 6, IP module synthesized after described layout data check, when unit needing to synthesize IP module all in described layout data are all synthetic and IPPin connects correct, be then judged to be that this IP module synthetic operation is qualified; Otherwise, be judged to be that this IP module synthetic operation is defective.
In the embodiment of the present invention, use domain merge algorithm IP module to be accurately synthesized in master chip layout data, and check each information (IP quantity, IP direction, IP interface message etc.).
All records in the synthesis of IP module are preserved by the mode deriving configuration file, and described configuration file imports in synthesizing for the next time described IP module with same requirements fast.
The application of embodiment of the present invention method fully achieves automatic synthesis to chip layout data IP module and inspection, and mistake is quoted to improper placement, generate journal file simultaneously, be convenient to slip-stick artist check, substantially reduce the supervision time, improve work efficiency, effectively reduce manually-operated fault rate.Visual operation interface is very easy to use, and actual measurement is got off, and an average layout data synthesizes 3 IP modules can be completed substantially within 2 minutes.
Above by specific embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (9)
1. an IP module synthetic method for domain, is characterized in that, comprise the steps:
The layout data of step one, parsing input, exports the title of all unit in described layout data to set A;
In step 2, extraction IP module database, the title of all IP module datas is to integrated B, all elements in described set A is compared with each element of described set B respectively, described set A is exported with all identical elements in described set B and forms set C;
In step 3, described set C, the IP module data corresponding to title of each element is the described IP module data needing synthesis, and the metal hierarchical information according to described layout data obtains all absolute path of described IP module data in described IP module database needing synthesis with the unit name-matches of each element in set C;
Step 4, the absolute path of each described IP module data in described IP module database of synthesizing as required call in each described IP module data, are automatically synthesized in the unit of the identical described layout data of title by the described IP module data of calling in.
2. the IP module synthetic method of domain as claimed in claim 1, is characterized in that, also comprise the steps:
Step 5, textual form that the title of the quantity of the described IP module data used in building-up process, each described IP module data and substitute mode carried out export and as a result file so that subsequent examination.
3. the IP module synthetic method of domain as claimed in claim 1 or 2, is characterized in that, also comprise the steps:
Step 6, IP module synthesized after described layout data check, when unit needing to synthesize IP module all in described layout data are all synthetic and IP port connects all correct, be then judged to be that this IP module synthetic operation is qualified; Otherwise, be judged to be that this IP module synthetic operation is defective.
4. the IP module synthetic method of domain as claimed in claim 1, it is characterized in that: in step 2, all elements in described set A is done the comparison of fuzzy matching with each element of described set B respectively, described set A is exported with all identical elements in described set B and forms set C.
5. the IP module synthetic method of domain as claimed in claim 1, is characterized in that: call in each described IP module data with graphical user interface manner in step 4 and automatically synthesized by the described IP module data of calling in.
6. the IP module synthetic method of domain as claimed in claim 5, it is characterized in that: the manual adaptation step also comprising the synthesis of IP module in step 4 on the basis of automatically synthesis, manually adjustment comprises: in described layout data, increase IP module data, IP module data that IP module data that amendment is synthesized to described layout data and deletion are synthesized to described layout data.
7. the IP module synthetic method of domain as claimed in claim 1, it is characterized in that: in step 4, only can synthesize a corresponding described IP module data in a unit of described layout data, plural described IP module data does not allow to be synthesized in the same unit of described layout data.
8. the IP module synthetic method of domain as claimed in claim 1, it is characterized in that: in the automatic synthesis of step 4 when the title content of two unit in described layout data is identical but case sensitive time, produce a miscue information, and interrupt automatic synthesis program to guarantee the correctness of IP module synthetic operation.
9. the IP module synthetic method of domain as claimed in claim 1, it is characterized in that: all records in the synthesis of IP module are preserved by the mode deriving configuration file, described configuration file imports in synthesizing for the next time described IP module with same requirements fast.
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| CN106874543A (en) * | 2017-01-04 | 2017-06-20 | 上海华虹宏力半导体制造有限公司 | The LEF graphic processing methods of domain |
| CN107480481A (en) * | 2017-09-12 | 2017-12-15 | 成都锐成芯微科技股份有限公司 | A kind of method that watermark is automatically generated on IP |
| CN110321640A (en) * | 2019-07-05 | 2019-10-11 | 四川长虹电器股份有限公司 | A kind of domain DRC processing method of integrated circuit conversion process |
| CN112668667A (en) * | 2021-01-22 | 2021-04-16 | 上海华虹宏力半导体制造有限公司 | Method for scanning layout file |
| CN112668667B (en) * | 2021-01-22 | 2024-05-14 | 上海华虹宏力半导体制造有限公司 | Layout file scanning method |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106874543A (en) * | 2017-01-04 | 2017-06-20 | 上海华虹宏力半导体制造有限公司 | The LEF graphic processing methods of domain |
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| CN107480481A (en) * | 2017-09-12 | 2017-12-15 | 成都锐成芯微科技股份有限公司 | A kind of method that watermark is automatically generated on IP |
| CN107480481B (en) * | 2017-09-12 | 2020-11-10 | 成都锐成芯微科技股份有限公司 | Method for automatically generating watermark on IP |
| CN110321640A (en) * | 2019-07-05 | 2019-10-11 | 四川长虹电器股份有限公司 | A kind of domain DRC processing method of integrated circuit conversion process |
| CN112668667A (en) * | 2021-01-22 | 2021-04-16 | 上海华虹宏力半导体制造有限公司 | Method for scanning layout file |
| CN112668667B (en) * | 2021-01-22 | 2024-05-14 | 上海华虹宏力半导体制造有限公司 | Layout file scanning method |
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