CN112668667A - Method for scanning layout file - Google Patents

Method for scanning layout file Download PDF

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CN112668667A
CN112668667A CN202110088414.4A CN202110088414A CN112668667A CN 112668667 A CN112668667 A CN 112668667A CN 202110088414 A CN202110088414 A CN 202110088414A CN 112668667 A CN112668667 A CN 112668667A
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array
cell
character string
cell unit
layout file
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CN112668667B (en
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曹云
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

The invention provides a method for scanning a layout file, which comprises the following steps: constructing a first array and a second array; providing a layout file, scanning the layout file to obtain all CELL units, and putting all the CELL units into the first array, wherein each CELL unit has an identifier; executing a character string operation instruction to change the second array into an array character string, placing all CELL units in the first array into the array character string one by one, matching the identification of the CELL unit to be placed with the identification of the existing CELL unit in the array character string before placing one CELL unit into the array character string, and placing the CELL unit into the array character string if the matching fails; the invention improves the scanning efficiency of the layout file.

Description

Method for scanning layout file
Technical Field
The invention relates to the technical field of integrated circuit design, in particular to a method for scanning a layout file.
Background
The layout comprises device dimensions, topology definition of each layer and other related physical information data of the devices, and is a bridge for manufacturing the integrated circuit from the design. The designed layout data of the integrated circuit is converted into a data format that can be read and understood by the integrated circuit manufacturer. Currently, the industry standard Data format mainly includes a General Data Stream (GDS) format, and almost all integrated circuit layout design software can read and write GDS files. The GDS file contains all information of the layout, including libraries and all cells, and retains the hierarchical structure and process layer information in the design. That is, the GDS file is a file format of the circuit layout, and the contents of the layout can be opened and viewed through integrated circuit layout design software.
The integrated circuit manufacturer needs to scan the GDS file provided by the customer to list the CELL units with different IP numbers in the GDS file, so as to enable the subsequent customer to charge the user according to the CELL units with different IP numbers. The GDS file has multiple CELL units, each of which has an IP number, the same name and IP number of the same CELL unit are the same, and the different names and IP numbers of the different CELL units are different. In order to find all the CELL units with different IP numbers, in the prior art, all the CELL units are scanned step by step and compared one by one, and each scanned CELL unit is compared with the previously scanned CELL unit one by one to judge whether the CELL unit is the same as the previously scanned CELL unit.
Disclosure of Invention
The invention aims to provide a method for scanning a layout file, so as to improve the scanning efficiency of the layout file.
In order to achieve the above object, the present invention provides a method for scanning a layout file, including:
constructing a first array and a second array;
providing a layout file, scanning the layout file to obtain all CELL units, and putting all the CELL units into the first array, wherein each CELL unit has an identifier;
executing a character string operation instruction to change the second array into an array character string, placing all the CELL units in the first array into the array character string one by one, and matching the identification of the CELL unit to be placed with the identification of the existing CELL unit in the array character string before placing one CELL unit into the array character string each time; and if the matching fails, putting the CELL unit into the array character string, and if the matching succeeds, not putting the CELL unit into the array character string until the storage of all the CELL units is completed.
Optionally, the layout file is a GDS file.
Optionally, the CELL unit is a circuit module in the layout file.
Optionally, the identifier includes a name of the CELL unit.
Optionally, each CELL unit has an IP number, the same name and IP number of the CELL unit are the same, and the different names and IP numbers of the CELL units are different.
Optionally, whether the matching is successful or not is judged according to the name of the CELL unit and the name of the existing CELL unit in the array character string, if the name of the CELL unit is the same as the name of the existing CELL unit in the array character string, the matching is successful, and if the name of the CELL unit is different from the name of the existing CELL unit in the array character string, the matching is failed.
Optionally, a Match instruction is used to Match the identifier of the CELL unit to be placed with the identifier of the existing CELL unit in the array character string.
Optionally, when the CELL unit is placed in the array character, the CELL unit is matched with an array character string formed after the CELL unit is stored last time.
Optionally, when the first array and the second array are constructed, both the first array and the second array are empty arrays.
Optionally, the layout file is scanned using integrated circuit layout design software.
In the scanning method of the layout file provided by the invention, a first array and a second array are constructed; providing a layout file, scanning the layout file to obtain all CELL units, and putting all the CELL units into a first array, wherein each CELL unit has an identifier; executing a character string operation instruction to change the second array into an array character string, putting all the CELL units in the first array into the array character string one by one, and matching the identification of the CELL unit to be put with the identification of the existing CELL unit in the array character string before putting one CELL unit into the array character string each time; if the matching fails, placing the CELL unit into the array character string, if the matching succeeds, not placing the CELL unit into the array character string until the storage of all the CELL units is completed, so that the CELL units in the array character string are all different CELL units and have uniqueness; according to the method, the CELL unit and the array character string are subjected to one-time matching judgment, whether the unit identical to the CELL unit exists in the array character string is judged, repeated circulation is not needed for multiple times to carry out comparison one by one, the scanning time is greatly shortened, and the scanning speed of the layout file is improved.
Drawings
Fig. 1 is a flowchart of a scanning method for a layout file according to an embodiment of the present invention.
Detailed Description
A method FOR scanning a layout file comprises the steps of scanning all CELL units step by step in a FOR circulation mode, comparing the CELL units one by one, scanning the 1 st CELL unit by taking 10 CELL units as an example, and storing the 1 st CELL unit into an array because the 1 st CELL unit is a unique CELL unit and no repeated CELL unit exists due to the first scanning; scanning the 2 nd CELL unit, comparing the identifier of the 2 nd CELL unit with the identifier of the 1 st CELL unit to judge whether the identifiers are the same, if so, not putting the identifiers into an array, and if not, storing the identifiers into the array; scanning the 3 rd CELL unit, comparing the identifier of the 3 rd CELL unit with the identifier of the 1 st CELL unit and the identifier of the 2 nd CELL unit one by one to judge whether the identifiers are the same, if so, not putting the identifiers into an array, and if not, storing the identifiers into the array; scanning a 4 th CELL unit, comparing the identifier of the 4 th CELL unit with the identifier of the 1 st CELL unit, the identifier of the 2 nd CELL unit and the identifier of the 3 rd CELL unit one by one to judge whether the identifiers are the same, if so, not putting the identifiers into an array, and if not, storing the identifiers into the array; and sequentially scanning the 5 th CELL unit until reaching the 10 th CELL unit, then scanning the 10 th CELL unit, comparing the identifier of the 10 th CELL unit with the identifier of the 1 st CELL unit and the identifier of the 2 nd CELL unit until reaching the identifier of the 9 th CELL unit one by one to judge whether the identifiers are the same, if the identifiers are the same, not putting the identifiers into an array, and if the identifiers are different, storing the identifiers into the array, namely finishing the scanning of the 10 CELL units. From the above, it can be found that the more the following CELL units are, the more times of comparison one by one are needed, the longer the scanning time is, and when the number of the CELL units is large, the larger the scanning time is, and the lower the scanning efficiency is.
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Fig. 1 is a flowchart of the method provided in this embodiment. The embodiment provides a method for scanning a layout file to improve the scanning efficiency of the layout file, referring to fig. 1, including:
step S1: constructing a first array and a second array;
step S2: providing a layout file, scanning the layout file to obtain all CELL units, and putting all the CELL units into a first array, wherein each CELL unit has an identifier;
step S3: executing a character string operation instruction to change the second array into an array character string, putting all the CELL units in the first array into the array character string one by one, and matching the identification of the CELL unit to be put with the identification of the existing CELL unit in the array character string before putting one CELL unit into the array character string each time; if the matching fails, the CELL unit is put into the array character string, and if the matching succeeds, the CELL unit is not put into the array character string until all the CELL units are stored.
The scanning method for the layout file provided in this embodiment is described in detail below.
Step S1 is executed: a first array and a second array are constructed.
Specifically, two arrays are constructed, namely a first array and a second array, and the constructed first array and the constructed second array are both null arrays.
Step S2 is executed: providing a layout file, scanning the layout file to obtain all CELL units, and putting all the CELL units into a first array, wherein each CELL unit has an identifier.
Specifically, a layout file is provided, the layout file is a GDS file, the GDS file includes all information of the layout, the GDS file includes a library and all CELL units, the GDS file can be opened by integrated circuit layout design software to display the layout information, and the CELL units are circuit modules in the layout file. Each CELL unit is provided with an identification which comprises the name of the CELL unit, each CELL unit is provided with an IP number, the name and the IP number of the same CELL unit are the same, and the name and the IP number of different CELL units are different. The IP number of the CELL unit provides a payment basis for the user who needs to use the CELL unit subsequently, and the cost of different CELL units needs to be paid according to the number of IP numbers representing the number of different CELL units, so that the purpose of scanning is to obtain different sets of CELL units to ensure the uniqueness of the CELL units in the sets.
After the layout file is opened through integrated circuit layout design software, executing a program to scan the layout file so as to obtain all CELL units, wherein the CELL units comprise the same CELL unit and different CELL units, putting all the CELL units into a first array, and after all the CELL units are put into the first array, the first array only comprises all the CELL units.
Step S3 is executed: executing a character string operation instruction to change the second array into an array character string, putting all the CELL units in the first array into the array character string one by one, and matching the identification of the CELL unit to be put with the identification of the existing CELL unit in the array character string before putting one CELL unit into the array character string each time; if the matching fails, the CELL unit is put into the array character string, and if the matching succeeds, the CELL unit is not put into the array character string until all the CELL units are stored.
Specifically, since it is not known whether the first array has the same CELL CELLs, all the CELL CELLs in the first array need to be processed to ensure the uniqueness of the CELL CELLs in the set. And executing a character string operation instruction to change the second array into an array character string, putting all the CELL units in the first array into the array character string one by one, executing a Match instruction before putting the CELL units into the array character string each time, matching the identifiers of the CELL units to be put with the identifiers of the existing CELL units in the array character string once, and judging whether the CELL with the same identifier of the CELL units to be put exists in the array character string.
And matching is carried out through the names of the CELL units, the matching is successful if the names of the CELL units are the same, and the matching is failed if the names of the CELL units are different. If the matching fails, the CELL units are placed into the array character string, if the matching succeeds, the CELL units are not placed into the array character string, the next CELL unit is sequentially stored until all the CELL units are stored in a matched mode, and at the moment, the CELL units in the array character string are different CELL units and have uniqueness. In this embodiment, the matching is performed by the name of the CELL unit, but is not limited thereto, and may be other identifiers of the CELL unit.
The scanning process is the execution process of the method, the method can adopt SKILL language, C language or other languages to carry out programming design to form a program file, and then the program file is imported into the path of integrated circuit layout design software to run a program, so as to realize the scanning mode. According to the method, the CELL unit and the array character string are subjected to one-time matching judgment, whether the unit identical to the CELL unit exists in the array character string is judged, and the FOR circulation is not required to be repeated FOR multiple times to carry out comparison one by one, so that the scanning time is greatly shortened, and the scanning speed of the layout file is improved.
In order to more clearly understand the scanning method of the layout file provided by the invention, it is assumed that one layout file has 10 CELL units. Firstly, opening a layout file through integrated circuit layout design software, executing a scanning program, listing the 10 CELL units from the layout file, and putting the CELL units into a first array, wherein whether the CELL units in the first array have uniqueness is not determined at the moment.
Adopting a character string operation instruction to change a second array into an array character string, executing a Match instruction on a 1 st CELL unit and the array character string, judging whether the 1 st CELL unit is successfully matched with the array character string, wherein the array character string is empty, and putting the 1 st CELL unit into the array character string, wherein the array character string comprises the 1 st CELL unit; and executing the matching of the next CELL unit, executing a Match instruction on the 2 nd CELL unit and the array character string after the last CELL unit storage, judging whether the 2 nd CELL unit is successfully matched with the array character string after the last CELL unit storage, wherein the array character string contains the 1 st CELL unit, judging whether the 2 nd CELL unit is matched with the 1 st CELL unit through one-time matching, if the matching fails, putting the 2 nd CELL unit into the array character string after the last CELL unit storage, wherein the array character string contains the 1 st CELL unit and the 2 nd CELL unit, and if the matching is successful, not putting the 2 nd CELL unit into the array character string.
And sequentially executing the 3 rd CELL unit, the 4 th CELL unit and the 5 th CELL unit until the 10 th CELL unit is matched and stored, and when the CELL unit is placed into the array character, matching the CELL unit with the array character string formed after the CELL unit is stored into the last time. And when the 10 th CELL unit is matched and stored, executing a Match instruction on the 10 th CELL unit and the array character string formed after the 10 th CELL unit is stored into the CELL unit last time, and judging whether the 10 th CELL unit is successfully matched with the array character string formed after the 10 th CELL unit is stored into the CELL unit last time. If the last time the CELL unit is stored in the array character string formed after the CELL unit is stored in the array character string, executing one-time matching to judge whether the 10 th CELL unit is matched with the CELL unit in the array character string formed after the CELL unit is stored in the array character string last time, if the matching fails, putting the 10 th CELL unit into the array character string formed after the CELL unit is stored in the array character string last time, wherein the array character string comprises 6 CELL units, if the matching succeeds, the 10 th CELL unit is not put into the array character string, and at the moment, scanning of the 10 CELL units is completed so as to extract all different CELL units from the 10 CELL units to ensure the uniqueness of the CELL units in the set.
In summary, in the scanning method for the layout file provided by the invention, the first array and the second array are constructed; providing a layout file, scanning the layout file to obtain all CELL units, and putting all the CELL units into a first array, wherein each CELL unit has an identifier; executing a character string operation instruction to change the second array into an array character string, placing all the CELL units in the first array into the array character string one by one, before placing one CELL unit into the array character string each time, matching the identification of the CELL unit to be placed with the identification of the existing CELL unit in the array character string, if the matching fails, placing the CELL unit into the array character string, if the matching succeeds, not placing the CELL unit into the array character string until the storage of all the CELL units is completed, so that the CELL units in the array character string are all different CELL units and have uniqueness; according to the method, the CELL unit and the array character string are subjected to one-time matching judgment, whether the unit identical to the CELL unit exists in the array character string is judged, repeated circulation is not needed for multiple times to carry out comparison one by one, the scanning time is greatly shortened, and the scanning speed of the layout file is improved.
The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (10)

1. A method for scanning a layout file is characterized by comprising the following steps:
constructing a first array and a second array;
providing a layout file, scanning the layout file to obtain all CELL units, and putting all the CELL units into the first array, wherein each CELL unit has an identifier;
executing a character string operation instruction to change the second array into an array character string, placing all the CELL units in the first array into the array character string one by one, and matching the identification of the CELL unit to be placed with the identification of the existing CELL unit in the array character string before placing one CELL unit into the array character string each time; and if the matching fails, putting the CELL unit into the array character string, and if the matching succeeds, not putting the CELL unit into the array character string until the storage of all the CELL units is completed.
2. The method according to claim 1, wherein the layout file is a GDS file.
3. The method according to claim 1 or 2, wherein the CELL unit is a circuit module in the layout file.
4. The method of claim 1, wherein the identification comprises a name of the CELL.
5. The method as claimed in claim 4, wherein each CELL has an IP number, the same name and IP number of the same CELL are the same, and the different names and IP numbers of the CELL are different.
6. The method as claimed in claim 4, wherein the name of the CELL CELL and the name of the existing CELL CELL in the array character string are used to determine whether the matching is successful, if the name of the CELL CELL is the same as the name of the existing CELL CELL in the array character string, the matching is successful, and if the name of the CELL CELL is different from the name of the existing CELL CELL in the array character string, the matching is failed.
7. The method for scanning a layout file according to claim 1, wherein a Match instruction is used to Match the identifier of the CELL to be placed with the identifiers of the existing CELL in the array character string.
8. The method for scanning the layout file according to claim 1 or 7, wherein when the CELL unit is placed in the array character, the CELL unit is matched with an array character string formed after the CELL unit is last stored.
9. The method for scanning a layout file according to claim 1, wherein when the first array and the second array are constructed, both the first array and the second array are empty arrays.
10. The method according to claim 1, wherein the layout file is scanned using integrated circuit layout design software.
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CN109471960A (en) * 2018-11-13 2019-03-15 深圳市景旺电子股份有限公司 The method and device of intelligent recognition PCB data tool layer name
CN110442756A (en) * 2019-06-27 2019-11-12 平安科技(深圳)有限公司 Data verification method, device, computer equipment and storage medium
CN110866373A (en) * 2019-11-19 2020-03-06 北京华大九天软件有限公司 Method and device for quickly matching layout units

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100185996A1 (en) * 2007-03-26 2010-07-22 Farid El Yahyaoui Semiconductor layout scanning method and system
WO2013106989A1 (en) * 2012-01-16 2013-07-25 中国科学院北京基因组研究所 Method and device for matching character strings
CN103309882A (en) * 2012-03-13 2013-09-18 北京启明星辰信息技术股份有限公司 Method and system for matching character strings under multiple modes
CN106156380A (en) * 2015-03-31 2016-11-23 展讯通信(上海)有限公司 A kind of layout editing method and system
CN106855894A (en) * 2015-12-09 2017-06-16 展讯通信(上海)有限公司 The method and device of the positional information of memory cell in a kind of acquisition memory
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