CN102856432A - Surface passivation method of silicon chip - Google Patents
Surface passivation method of silicon chip Download PDFInfo
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- CN102856432A CN102856432A CN2012102841500A CN201210284150A CN102856432A CN 102856432 A CN102856432 A CN 102856432A CN 2012102841500 A CN2012102841500 A CN 2012102841500A CN 201210284150 A CN201210284150 A CN 201210284150A CN 102856432 A CN102856432 A CN 102856432A
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- silicon chip
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
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Abstract
A surface passivation method of a silicon chip relates to the technical field of detection of a solar photovoltaic silicon chip. The surface passivation method of the silicon chip comprises the steps of: putting the cleaned silicon ship into chemical polishing solution, and carrying out chemical polishing to remove a surface damage layer of the silicon ship, wherein the ratio of the polishing solution is that the ratio of hydrofluoric acid to nitric acid is 1 to (3-6); taking out the silicon chip from the polishing solution after 2-5 minutes and then rinsing the silicon chip by deionized water; putting the polished silicon chip into a plastic valve bag, absorbing the prepared passivation solution by a dropper and drip into the valve bag with the silicon chip, simultaneously, evenly coating the passivation solution on the surface of the silicon chip, wherein the ratio of the passivation solution is that the ratio of high-purity solid iodine to anhydrous alcohol is 1g to 50-100ml; and putting the silicon chip into a WT-2000 minority carrier life tester for testing after 10-20 minutes, and finally the minority carrier life is obviously improved. The surface passivation method has the beneficial effects that the problem of quality misjudgment caused by a large measurement error of minority carrier life of the silicon chip is solved; the recombination rate of the minority carrier life of the surface can be effectively reduced by surface passivation of the silicon chip; the minority carrier life is improved by 10-30 times; and the quality of the silicon chip is really reflected.
Description
Technical field
The invention belongs to photovoltaic silicon test field, be specifically related to a kind of method of silicon chip surface passivation and the preparation of passivating solution.
Background technology
Minority carrier life time is one of major parameter that characterizes the silicon crystal quality, and (minority carrier life time of the silicon chip of μ-PCD) record is effective minority carrier life time, and it comprises two parts: bluk recombination life-span and surface recombination life-span to use WT-2000 microwave photoconductance damped method.When silicon chip was very thin, the surface recombination life-span will be far smaller than the bluk recombination life-span, and the useful life that record this moment is approximately equal to the surface recombination life-span, so surface recombination is very large on the impact of minority carrier life time.During production because the oxide layer of silicon chip surface and the impact of impurity, if recombination-rate surface greater than 10cm/s, measured useful life will be very large with the body life time deviation, and quality judging is exerted an influence.In order to reduce the recombination rate of silicon chip surface, make the useful life of test trend towards body life time, need to carry out surface passivation to the silicon chip of test, to reduce surface recombination to the impact of useful life.
Summary of the invention
The invention provides a kind of silicon chip surface passivating method, solved the silicon chip minority carrier life time measure error problem that causes the quality erroneous judgement bigger than normal, carry out minority carrier lifetime, can reflect really the quality of silicon chip.
The objective of the invention is to realize by following scheme:
The silicon chip surface passivating method is characterized in that, may further comprise the steps: the silicon chip after a will clean is put into chemical brightening solution and was carried out chemical polishing 2~5 minutes, removes surface damage layer; Wherein, described polishing fluid proportioning is hydrofluoric acid: nitric acid=1:3~6, and described hydrofluoric acid concentration is 38~50%; Concentration of nitric acid is 55~70%; The b rinsing is clean; Described rinsing refers to carry out rinsing with deionized water; The c plastics valve bag of packing into slowly splashes into the passivating solution for preparing with dropper and to carry out passivation in the polybag, and passivation time is 10~20 minutes; The proportioning of described passivating solution is high purity solid iodine: absolute alcohol=1g:50~100ml; The purity of solid iodine is 99.5~99.9%; D with passivating solution equably beach put into WT-2000 and carry out minority carrier lifetime at silicon chip surface.
The present invention also can further realize by following scheme:
Described removal surface damage layer refers to that silicon chip surface single-sided corrosion thickness is 3~6 μ m.
Described deionization electrical conductivity of water is more than the 10 μ s/cm.
Described passivation requires silicon chip fully to contact with passivating solution.
Need the removal of bubbles in the polybag is clean before the described minority carrier lifetime.
The invention has the beneficial effects as follows: the silicon chip surface passivation can reduce surface recombination rate effectively, make the useful life of test trend towards body life time, reduced the deviation of useful life and body life time, effective minority carrier life time is 10~30 times before the passivation, reflects truly the quality of silicon chip.The method is simple to operate simultaneously, and a kind of method of convenient effective silicon chip minority carrier lifetime is provided for quality testing.
Embodiment
In order to make those skilled in the art person understand better the present invention program, and above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the present invention is further detailed explanation below in conjunction with embodiment.
Embodiment 1:
With the polycrystalline 156mm*156mm silicon chip after cleaning, put into chemical brightening solution, carry out chemical polishing to remove damaged layer on surface of silicon slice, wherein the proportioning of polishing fluid is hydrofluoric acid: nitric acid=1:3; Taking out from polishing fluid after 2 minutes, is that the rinsed with deionized water of 10 μ s/cm is clean with conductivity, and silicon chip single-sided corrosion thickness is 3 ± 0.3 microns; Silicon chip after the polishing is put into the plastics valve bag, drawing the passivating solution for preparing with dropper splashes in the valve bag that silicon chip is housed, simultaneously with passivating solution equably beach at silicon chip surface, wherein the proportioning of passivating solution is high purity solid iodine: absolute alcohol=1g:50ml, constantly stirs with glass bar to make solid iodine fully be dissolved in the alcohol; Passivation is clean and seal up sack with the removal of bubbles in the bag after 10 minutes, puts into the WT-2000 minority carrier lifetime tester and tests.
The test minority carrier life time is the silicon chip of 1.5 μ s before the passivation, and 18 μ s are brought up in test again after passivation.
Embodiment 2:
With the polycrystalline 156mm*156mm silicon chip after cleaning, put into chemical brightening solution, carry out chemical polishing to remove damaged layer on surface of silicon slice, wherein the proportioning of polishing fluid is hydrofluoric acid: nitric acid=1:6; Taking out from polishing fluid after 5 minutes, is that the rinsed with deionized water of 14 μ s/cm is clean with conductivity, and silicon chip single-sided corrosion thickness is 6 ± 0.3 microns; Silicon chip after the polishing is put into the plastics valve bag, drawing the passivating solution for preparing with dropper splashes in the valve bag that silicon chip is housed, simultaneously with passivating solution equably beach at silicon chip surface, wherein the proportioning of passivating solution is high purity solid iodine: absolute alcohol=1g:100ml, constantly stirs with glass bar to make solid iodine fully be dissolved in the alcohol; Passivation is clean and seal up sack with the removal of bubbles in the bag after 20 minutes, puts into the WT-2000 minority carrier lifetime tester and tests.
The test minority carrier life time is the silicon chip of 1.5 μ s before the passivation, and 24 μ s are brought up in test again after passivation.
Embodiment 3:
With the polycrystalline 156mm*156mm silicon chip after cleaning, put into chemical brightening solution, carry out chemical polishing to remove damaged layer on surface of silicon slice, wherein the proportioning of polishing fluid is hydrofluoric acid: nitric acid=1:5; Taking out from polishing fluid after 3 minutes, is that the rinsed with deionized water of 12 μ s/cm is clean with conductivity, and silicon chip single-sided corrosion thickness is 4 ± 0.3 microns; Silicon chip after the polishing is put into the plastics valve bag, drawing the passivating solution for preparing with dropper splashes in the valve bag that silicon chip is housed, simultaneously with passivating solution equably beach at silicon chip surface, wherein the proportioning of passivating solution is high purity solid iodine: absolute alcohol=1g:80ml, constantly stirs with glass bar to make solid iodine fully be dissolved in the alcohol; Passivation is clean and seal up sack with the removal of bubbles in the bag after 16 minutes, puts into the WT-2000 minority carrier lifetime tester and tests.
The test minority carrier life time is the silicon chip of 1.5 μ s before the passivation, again tests after the passivation and brings up to 20 μ s.
The above; be the specific embodiment of the present invention only, but protection scope of the present invention is not limited to this, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.
Claims (5)
1. the silicon chip surface passivating method is characterized in that, may further comprise the steps: the silicon chip after a will clean is put into chemical brightening solution and was carried out chemical polishing 2~5 minutes, removes surface damage layer; Wherein, described polishing fluid proportioning is hydrofluoric acid: nitric acid=1:3~6, and described hydrofluoric acid concentration is 38~50%; Concentration of nitric acid is 55~70%; The b rinsing is clean; Described rinsing refers to carry out rinsing with deionized water; The c plastics valve bag of packing into slowly splashes into the passivating solution for preparing with dropper and to carry out passivation in the polybag, and passivation time is 10~20 minutes; The proportioning of described passivating solution is high purity solid iodine: absolute alcohol=1g:50~100ml; The purity of solid iodine is 99.5~99.9%; D with passivating solution equably beach put into WT-2000 and carry out minority carrier lifetime at silicon chip surface.
2. silicon chip surface passivating method according to claim 1, it is characterized in that: described removal surface damage layer refers to that silicon chip surface single-sided corrosion thickness is 3~6 μ m.
3. silicon chip surface passivating method according to claim 1, it is characterized in that: described deionization electrical conductivity of water is more than the 10 μ s/cm.
4. silicon chip surface passivating method according to claim 1 is characterized in that: described passivation requires silicon chip fully to contact with passivating solution.
5. silicon chip surface passivating method according to claim 1 is characterized in that: need the removal of bubbles in the polybag is clean before the described minority carrier lifetime.
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106100583A (en) * | 2016-08-05 | 2016-11-09 | 无锡尚德太阳能电力有限公司 | The method judging PERC battery back of the body passivation film passivation quality |
CN107393820A (en) * | 2017-06-05 | 2017-11-24 | 长安大学 | A kind of surface passivation liquid and its application for the passivation of tellurium manganese cadmium plane of crystal |
CN109507559A (en) * | 2017-09-15 | 2019-03-22 | 上海新昇半导体科技有限公司 | A kind of test method and test device of silicon chip minority carrier life |
CN110943020A (en) * | 2019-12-16 | 2020-03-31 | 西安奕斯伟硅片技术有限公司 | Chemical passivation plastic packaging system |
CN113903827A (en) * | 2021-09-08 | 2022-01-07 | 宁波瑞元天科新能源材料有限公司 | Polishing and passivating method and device for cutting surface of solar cell |
CN114892267A (en) * | 2022-05-24 | 2022-08-12 | 中环领先半导体材料有限公司 | Method for optimizing epitaxial minority carrier lifetime |
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US5580828A (en) * | 1992-12-16 | 1996-12-03 | Semiconductor Physics Laboratory Rt | Method for chemical surface passivation for in-situ bulk lifetime measurement of silicon semiconductor material |
CN101162694A (en) * | 2007-11-16 | 2008-04-16 | 中国科学院电工研究所 | Chemical passivation method for measuring minority carrier lifetime of crystalline silicon |
CN101592469A (en) * | 2009-07-08 | 2009-12-02 | 中电电气(南京)光伏有限公司 | Silicon chip of solar cell damage layer thickness and minority carrier life time measuring method and device |
CN102364322A (en) * | 2011-06-30 | 2012-02-29 | 常州天合光能有限公司 | Surface treatment method for testing minority carrier lifetime of silicon wafer |
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2012
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US5580828A (en) * | 1992-12-16 | 1996-12-03 | Semiconductor Physics Laboratory Rt | Method for chemical surface passivation for in-situ bulk lifetime measurement of silicon semiconductor material |
CN101162694A (en) * | 2007-11-16 | 2008-04-16 | 中国科学院电工研究所 | Chemical passivation method for measuring minority carrier lifetime of crystalline silicon |
CN101592469A (en) * | 2009-07-08 | 2009-12-02 | 中电电气(南京)光伏有限公司 | Silicon chip of solar cell damage layer thickness and minority carrier life time measuring method and device |
CN102364322A (en) * | 2011-06-30 | 2012-02-29 | 常州天合光能有限公司 | Surface treatment method for testing minority carrier lifetime of silicon wafer |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106100583A (en) * | 2016-08-05 | 2016-11-09 | 无锡尚德太阳能电力有限公司 | The method judging PERC battery back of the body passivation film passivation quality |
CN107393820A (en) * | 2017-06-05 | 2017-11-24 | 长安大学 | A kind of surface passivation liquid and its application for the passivation of tellurium manganese cadmium plane of crystal |
CN107393820B (en) * | 2017-06-05 | 2019-12-13 | 长安大学 | surface passivation solution and application thereof in surface passivation of cadmium manganese telluride crystals |
CN109507559A (en) * | 2017-09-15 | 2019-03-22 | 上海新昇半导体科技有限公司 | A kind of test method and test device of silicon chip minority carrier life |
CN110943020A (en) * | 2019-12-16 | 2020-03-31 | 西安奕斯伟硅片技术有限公司 | Chemical passivation plastic packaging system |
CN110943020B (en) * | 2019-12-16 | 2022-07-29 | 西安奕斯伟材料科技有限公司 | Chemical passivation plastic packaging system |
CN113903827A (en) * | 2021-09-08 | 2022-01-07 | 宁波瑞元天科新能源材料有限公司 | Polishing and passivating method and device for cutting surface of solar cell |
CN113903827B (en) * | 2021-09-08 | 2024-03-15 | 宁波瑞元天科新能源材料有限公司 | Solar cell cutting surface polishing passivation method and device |
CN114892267A (en) * | 2022-05-24 | 2022-08-12 | 中环领先半导体材料有限公司 | Method for optimizing epitaxial minority carrier lifetime |
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