CN102832252A - Flexible indium gallium zinc oxide (IGZO) thin film transistor - Google Patents
Flexible indium gallium zinc oxide (IGZO) thin film transistor Download PDFInfo
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Abstract
The invention provides a flexible indium gallium zinc oxide (IGZO) thin film transistor which is of a bottom gate top contact type thin film transistor (TFT) structure and comprises a plastic substrate, a buffer protective layer, a gate electrode, a gate insulating layer, a source electrode, a drain electrode, an IGZO semiconductor layer and a protecting layer, wherein the plastic substrate is arranged at the bottommost layer of the thin film transistor; the buffer protective layer covers the plastic substrate; the trapezoid gate electrode is prepared at the central area of the upper part of the buffer protective layer by a direct current (DC) magnetron sputtering method; the upper part of the trapezoid gate electrode is covered with the gate insulating layer; the two ends of the gate insulating layer are respectively covered till the the buffer protective layer; the IGZO semiconductor layer is prepared at the upper part of the gate insulating layer by a magnetron sputtering method; and one ends of the source electrode and the drain electrode are respectively arranged at the two sides of the top of the semiconductor layer, and the other ends of the source electrode and the drain electrode are respectively positioned at the upper part of the gate insulating layer.
Description
Technical field
The present invention relates to microelectronics technology, more specifically, relate to a kind of IGZO (In-Ga-Zn-O) thin-film transistor.
Background technology
What compare industrialization is the liquid crystal display of substrate with glass, gentle, thin, light three significant characteristics that flexibility shows.The gentle flexible display that makes can the same bending of sensitive paper, even folding.Thin; The thickness of flat-panel monitor is generally greater than 3mm on the market, 2010 the end of the year LG company reported the thinnest LCD in the whole world, thickness is 2.6mm; Yet; The said firm released the e-book of A4 size in 2008, thickness has only 300 μ m, and the thickness of flexible display has only about 1/10th of traditional display thickness.Gently be glass substrate because conventional flat panel display adopts, and flexible display adopts be plastic film or thin stainless steel as substrate, so the quality of flexible display is about 1/5th of a conventional flat panel display quality.
Current, flexible substrate mainly contains three types, is respectively plastics (Plasic), thin glass (Thin Glass) and sheet metal (Metal Foil), carries out simple declaration in the face of these three kinds of materials down.
Thin glass: thickness is that the thin glass of 50-200 μ m has and performance like the glassy phase and advantage; Lower etc. like good barrier layer, good optical quality, price; Shortcoming is that substrate is highly brittle, and in the process of making, occurs the situation of breaking easily, in addition; Although thin glass has elasticity, still can not be crooked.
Sheet metal: the sheet metal of using at present mainly is a stainless steel material.Can stop penetrating of steam and gas at the bottom of the stainless steel lining, remove this, the thermal pressure that produces during the deposition inorganic layer can reduce, and owing to be sheet metal, the temperature that technology can be born can reach 900 ℃ (fusing point of sheet metal is about 1400 ℃).But; Its shortcoming is also very obvious; For example the metal surface must cover insulating barrier to prevent short circuit; Stainless steel thin slice transparent bad is that the TFT of substrate preparation only is suitable for the demonstration of reflection (like electrophoretic display) and emission type with this material, and the active matrix liquid crystal that is inappropriate for transmission-type shows and OLED is launched in traditional bottom; Sheet metal has elasticity preferably, but it is crooked with the degree of depth still can not to curl.In addition, show that the price of stainless steel thin slice is very expensive for large tracts of land.Simultaneously, the surface roughness of stainless steel thin slice is than higher, control the 5nm that realizes industrialization with interior be not that part is easy to thing.But show that for small size is flexible the stainless steel thin slice is a selection preferably.
Compare above-mentioned two kinds of materials, what more be hopeful to be applied to the industrialization field is plastic base.Plastics have rational mechanical performance, optical property and chemical characteristic; Film is soft, can realize rolling wheel formula processing (Roll to Roll), yet the stability of shape and high gas and the penetrance of steam are its two big defectives.Dimensional stability mainly is because the glass transformation temperature (Tg) of general transparent polymer film is not high; And want anti-300 ℃-330 ℃ high temperature in the technology of TFT industrialization; The swollen number system number of plastic hot is far longer than glass, therefore greater than 50ppm/ ℃; When temperature raise, the variation meeting of size was to bringing very big difficulty such as technologies such as aiming at exposure in the later stage work.In addition, the surface of plastic film exists some stains and defective.
Thin-film transistor is meant deposition layer of semiconductor film on substrate, goes out source, drain electrode through fabrication techniques such as photoetching, etchings, and grid and body form, and it is made up of gate insulation layer, active layer, gate electrode, source and drain electrode several sections.Fig. 1 is several frequently seen TFT structure, can be divided into two types: one type is top gate structure, claims just folded (Normal Staggered is called for short NS) structure again; One type is bottom grating structure, claims reciprocal cross folded (Inverted Staggered is called for short IS) structure again.Sedimentary sequence according to channel layer and source-drain electrode is different, and top grid, bottom grating structure have end contact and two kinds of forms of top contact again respectively.In the bottom gate top contact structure, can improve semiconductor structure and pattern through the interface of modifying insulating barrier, thereby improve the mobility of device.This fault of construction is that the photoetching process of source-drain electrode can pollute active layer.And in other a kind of bottom grating structure; The source-drain electrode photoetching process was carried out before the semiconductor layer deposition; Can not cause pollution to semiconductor layer; But electrode and insulating barrier exist step to be unfavorable for the injection of electric charge, and the exposed of active layer outside, need protective mulch to improve the stability of device usually.Top gate structure has requirements at the higher level to substrate, particularly requires in surface roughness and chemical stability.
Fig. 2 is the bottom gate top contact type TFT structure chart that the application adopts, and oxide IGZO is as active layer, and its principle is to control the conduction situation of raceway groove through the electric field strength between change grid and source-drain electrode.Oxide TFT is the N type semiconductor material, and for the N channel TFT, (VG>=Vth) produces the electronics thin layer on the interface between semiconductor layer and the insulating barrier, conducting channel just, the corresponding TFT ON state of residing state this moment when applying certain positive gate voltage; And when grid voltage is reduced to conducting channel and disappears, be high-impedance state between source-drain electrode, the resistance between raceway groove is very big, make source-drain current less (common≤10-12A), the OFF state of corresponding TFT.This with depletion field effect transistor in the inversion layer that forms similar, so the computing formula of metal-oxide-semiconductor field effect transistor can be applied in the transistor.
Since the Hosono of Tokyo polytechnical university in 2004 reports the flexible and transparent TFT based on the IGZO preparation for the first time.IGZO-TFT has received the concern of research institution and industrial quarters, and is being shown in Application for Field, especially the new display spare technology by developing.
As stated, IGZO-TFT is applied in the flat-panel display device as novel active driving circuit, but getting into the commercialization stage still needs and solve many problems, below the recapitulative problem of listing existence.
The repeatability of technology
The IGZO semiconductor layer is very responsive for the condition of technology, and particularly for oxygen, not only the oxygen flow in the deposition process, Ar flow and deposition power can produce influence greatly to the performance of device, and airborne steam and oxygen also can influence the performance of device.The preparation of most of a few days ago IGZO semiconductor layers is to adopt the magnetron sputtering preparation; So metallic atom influences the performance of device in the purity of target and the target than regular meeting; After target used a period of time, the component ratio of target material surface can change, thereby makes the device performance of prepared TFT change; Therefore, repeatability is the major issue that must solve before the industrialization production solving.
Insulating barrier and passivation layer are to the influence of IGZO
, contact with the IGZO semiconductor layer because there is the very H key of high concentration in it as the silicon nitride dielectric layer among application and the IGZO-TFT, H can change active layer carrier concentration as donor atom, makes mobility change; In like manner, also be because contain the higher H atom as the protective layer silicon nitride in non-crystalline silicon tft and the multi-crystal TFT, should not be applied in the oxide as protective layer.In order to make the IGZO-TFT device possess stability preferably, must control in insulating barrier and the protective layer H atomic quantity or seek suitable insulation layer and protective layer well.
The technological problems that the IGZO chemical property vivaciously causes
At present, most of IGZO-TFT devices adopt bottom grating structure, and lift-off technology is adopted in the preparation of the IGZO-TFT source-drain electrode of bottom grating structure; This technology is difficult to the figure below the preparation 2 μ m, and the production of this and industrialization is incompatible, and the suitability for industrialized production source-drain electrode adopts the method for dry etching usually; And the employing dry etching; Plasma is known from experience the IGZO film is produced bigger influence, even can make component failure, loses the fundamental characteristics of TFT.
TFT technology is to the transfer of flexible substrates on the hard substrate
Up to the present, can not find a kind of backing material in the current material had not only possessed glass properties but also had possessed frivolous characteristics such as gentle.This has just determined and can not simply directly copy to the depositing operation on the hard substrate on the flexible base, board.To plastic; The high temperature that common not ability is 300 ℃; This shortcoming decision insulating barrier can not (300 ℃-350 ℃) prepare under optimum process; Can not at high temperature anneal obtains more stable device performance, can only be optimized from device architecture, material, depositing operation, with obtained performance TFT device preferably.
Summary of the invention
For overcoming above-mentioned defective of the prior art, the present invention proposes a kind of flexible IGZO thin-film transistor.
This thin-film transistor adopts bottom gate top contact type TFT structure; Comprise plastic, buffer protection layer, delete electrode, gate insulation layer, source electrode and drain electrode, IGZO semiconductor layer and protective layer, wherein, cover the buffer protection layer on the plastic; The central upper portion zone of buffer protection layer adopts dc magnetron sputtering method to prepare trapezoidal gate electrode; Trapezoidal gate electrode top has covered gate insulation layer, and the two ends of gate insulation layer cover respectively to the buffer protection layer, adopts magnetically controlled sputter method to prepare the IGZO semiconductor layer on the top of gate insulation layer; The source, leak in the two poles of the earth the both sides that each end in extremely lays respectively at the top of semiconductor layer; The other end is positioned at the top of gate insulation layer, thereby semiconductor layer is covered by source electrode and drain electrode, only at the top of semiconductor layer; The middle passage that forms that the two poles of the earth are leaked in the source adopts PECVD to prepare protective layer on passage.
Through reducing depositing temperature, optimize the deposition power of protective layer and the thickness of silicon nitride dielectric layer, successfully prepare flexible IGZO-TFT device, performance is following: threshold voltage is 8V, on-off ratio is 5 * 10
7, saturated mobility is 7.8cm
2/ Vs, sub-threshold slope is 0.9V/dec; Device is placed on crooked 3min on the cylinder that radius of curvature is 10mm, and performance changes hardly; Protective layer is being brought into play important effect for the stability that keeps device.Device is placed in the air, does not have the device threshold voltage of protective layer that the drift of 7V nearly takes place; Simultaneously device obtains preferable performance through appropriate process annealing, when device at 200 ℃ of annealing 1h, the on-off ratio of device is from 10
3Be increased to 1.9 * 10
7, threshold voltage is increased to 14V from 4V, and mobility is from 0.45cm
2/ Vs is increased to 3.3cm
2/ Vs, the subthreshold value amplitude of oscillation reduces to 0.7V/decade from 10V/decade.
Description of drawings
Fig. 1 is several frequently seen TFT structural representation;
Fig. 2 is bottom gate top contact type TFT structure and fundamental diagram;
Fig. 3 is practical magnetic control sputtering system structural principle sketch map;
Fig. 4 is the deposition equation of PECVD depositing system operation principle sketch map and silicon nitride and silica;
Fig. 5 is a ME-3A type etching system schematic diagram;
Fig. 6 is a different materials to the requirement to water and oxygen of the absorption rate of water and oxygen and device;
Fig. 7 a is the electrode test structure;
Fig. 7 b illustrates the square resistance at two ends of the probe contacting metal electrode of universal instrument
Fig. 8 is before the annealing of Cr film and the change in resistance curve after the annealing;
Fig. 9 is IGZO-TFT device architecture and design parameter;
Figure 10 is the process chart of flexible IGZO-TFT device preparation;
Figure 11 is the cleaning sketch map of plastic;
Figure 12 is the graphical Lift-off process chart that adopts of source-drain electrode.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment a kind of flexible IGZO thin-film transistor provided by the invention is described in detail.
The preparation and the characteristic present thereof of flexible IGZO-TFT device architecture thin layer
The application's target is to seek suitable flexible substrate; Explore TFT each layer film material and preparation technology; Through the electrical property of making and test I GZO-TFT device example, analyze and update technological parameter, realize that three primary colors drive the TFT device that the microcapsules display unit requires; Above-mentioned work relates to equipment and comprises magnetic control sputtering system, plasma enhanced chemical vapor deposition (PECVD) system and reactive ion etching (RIE) system etc., following mask body introduction.
Magnetic control sputtering system
In this work, the gate electrode of TFT, source-drain electrode and semiconductor layer all are to adopt the dc magnetron sputtering method preparation.Introduce used sputtering system and basic sputter principle in the experiment below.
Magnetron sputtering is under a metastable vacuum state, to carry out; Cathode targets is to be processed by Coating Materials; Vacuum chamber feeds the argon gas of certain flow during sputter; Under the radio-frequency voltage effect of negative direct current high voltage or 13.56MHz between negative electrode and anode, produce glow discharge, glow discharge makes interelectrode ar atmo ionization form argon ion and electronics.Argon ion quickens the bombardment target under effect of electric field, sputter a large amount of target atom, is on the substrate that neutral target atom is deposited on anode surface to form film.And, under electric field action, quicken to fly to the effect that can receive magnetic field (Lorentz force) in the process of substrate for electronics, electronics is bound in moves in a circle near the plasma zone the target material surface; Because the electronic motion path is very long, in this process, constantly collides with ar atmo; Produce electronics and argon ion; Argon ion constantly bombards target, thereby realizes the characteristics of high speed deposition, and secondary electron plays the effect of keeping glow discharge.
The magnetic control platform that the application adopts is the SP-3 type magnetic control platform of Microelectronics Center, Academia Sinica's development, and Fig. 3 is its sketch map, and it mainly comprises cavity, power-supply system, gas extraction system, aerating system, heating system.Wherein power-supply system is divided into DC power supply and radio-frequency power supply, in the experiment is to adopt DC power supply, and does not use heating system during plated film, and normal temperature is realized plated film down.The technological operation flow process is following, closes cavity after setting-out finishes, and opens mechanical pump and low valve vacuumizes, and treats that vacuum degree reaches below the 7Pa; Close low valve, open high valve, after one minute; Open cooling water, start molecular pump, rotating speed was 600rpm when molecular pump was stablized; Treat that the vacuum degree in the cavity reaches 5 * 10-3Pa, the motor of opening in the cavity makes sample produce revolution (sample itself can be realized rotation simultaneously, can further improve the uniformity of film).In vacuum chamber, feed the Ar gas of certain flow then, the power control switch at opening operation panel interface and target control switch are regulated power, carry out the preparatory sputter of 10min-15min.After treating that preparatory sputter finishes, butterfly, setting-up time parameter, beginning sputter.Sputter is closed power supply and target control switch on the panel after accomplishing, and turns off source of the gas, stops molecular pump, and Guan Shui stops mechanical pump, venting, sampling.
Magnetron sputtering is compared with other film plating process has following advantage: adhesive force is good, uniformity is accomplished the large tracts of land film forming better, easily, can prepare the high-melting point metal film easily at normal temperatures; Preparation film good reproducibility etc., but it also exists such as the target price some shortcomings such as high and utilance is low.
Plasma activated chemical vapour deposition (PECVD) system
In the TFT structure, that resilient coating and insulating barrier adopt is SiNx, and that protective layer adopts is SiO2, and these two kinds of materials all are through plasma chemical vapor deposition system preparation (Plasma EnhancedChemical Vapor Deposition is called for short PECVD).PECVD utilizes the physical action of glow discharge to come a kind of chemical vapour deposition reaction of active population, is the film deposition techniques that integrates plasma glow discharge and chemical vapour deposition (CVD).In the deposition process, glow discharge produces plasma, but plasma inside does not have unified temperature, exists electron gas temperature, ion temperature and neutral particle temperature.So it seems from macroscopic view; This plasma temperature is not high, but its inside is in the state that is stimulated, and its electron energy is enough to make molecular scission; And cause having chemically active material (anakmetomeres, atom, ion, atomic group etc.) and produce; The chemical reaction that original needs at high temperature just can be carried out in the time of in being in plasma field, just can form solid film on substrate under lower temperature even at normal temperatures.
The PECVD depositing system that adopts among the application is an Oxford Instrument Plasma 80Plus system, and Fig. 4 is its operation principle sketch map and deposition SiN
x, SiO
2Chemical equation.Mainly may further comprise the steps with this equipment deposit film: (1) vacuumizes.In native system, two pump housings of mechanical pump and lobe pump are arranged altogether, treat that vacuum degree reaches the required base vacuum degree of experiment, generally be 2mTorr, just begin to carry out subsequent operation.(2) thin film deposition.Two parts are divided in this part, preplating film and formal plated film, and this step is the most key, through suitable deposition parameter is set, prepares quality film preferably.(3) gas circuit is cleaned.In deposition process, reactor chamber and gas circuit all can receive pollution in various degree, therefore all will clean before and after the deposition, guarantee the quality of deposit film on the one hand, guarantee the useful life of equipment on the other hand.
Reactive ion etching (RIE) system
Reactive ion etching (Reaction Ionic Etch is called for short RIE) is a kind of dry etching method.In the preparation process of TFT, be mainly used in SiN
xAnd SiO
2Etching, etching gas is SF
6And O
2The reactive ion etching system that the application adopts is the ME-3A type etching platform of Microelectronics Center, Academia Sinica's development, and Fig. 5 is the reaction cavity structural representation.The operation principle of RIE: generally; Top crown ground connection is as anode (general whole vacuum wall is ground connection also); Bottom electrode connects radio-frequency power supply as negative electrode, needs the substrate base of etching to be placed on the negative electrode, reacting gas according to certain working pressure from power on the pore of the utmost point charge into reative cell.Gas in the reaction cavity is added the radio-frequency voltage greater than the breakdown critical value, form highfield, under the highfield effect; Gas forms with glow discharge and produces energetic plasma; Plasma comprises ion, free radical (atom of free state, molecule or atomic group) and the electronics that is produced by inelastic collision, and they all have very strong chemism, can with the atom generation chemical reaction of the sample surfaces that is etched; Form volatile material, reach the purpose of etching sample.Simultaneously, because near the surface of the direction of an electric field vertical cathode the negative electrode, energetic ion is vertically beaten under certain working pressure to sample surfaces, carries out physical bombardment, makes etching also have good anisotropy.
The selection of backing material
Select the plastic material of company of Du Pont (Dupont) for use, model is Kapton E, and specification is respectively 50 μ m and 25 μ m, and wherein the former is used to prepare flexible device, and the latter prepares the exploration of flexible and transparent device.It has high glass transition (Tg=340 ℃); Lower thermal coefficient of expansion (when temperature in 50 ℃ of-200 ℃ of scopes, thermal coefficient of expansion is 16ppm/ ℃), better chemical stability (with preparation TFT in solution do not react); Better waterproof can be (for the thick KaptonE substrate of 50 μ m; The permeability of steam is 5mg/m2/day), in addition, also have advantages such as enough flexibilities and ability of anti-deformation.
The selection of insolated layer materials and preparation thereof
Moisture and air are thousands of times of glass substrate in the penetrance of general plastic.Moisture and airborne oxygen can produce very big influence to the performance of device.Fig. 6 is the absorption rates of various films to moisture and air.Can find out that pure plastic film is the requirement that can not satisfy the TFT device.In order to address this problem, generally be the inorganic thin film passivation layer that on plastic film, plates one deck or sandwich construction.Because TFT is such responsive not as OLED to air and influence of moisture, silica commonly used, silicon nitride, aluminium oxide etc. are as passivation layer.In the experiment, we select the separator of silicon nitride as device for use.Separator can also be optimized substrate surface for roughness except that can effectively stoping the infiltration of moisture and air, and through its sedimentary condition of control, can the stress of device be optimized.
The selection of gate material
Cr and Mo are the metal materials that is usually used in the TFT gate electrode; It has the fusing point height; Advantages such as good stability; But because the resistivity of Cr and Mo material big (about 30 μ Ω cm) generally is applied in the small-medium size display screen, but can't satisfies the requirement of the array of large scale TFT display screen to the gate signal delay.
Under the background of large-screen and high definition development, low resistive metal Al (3.3 μ Ω cm) and two kinds of materials of Cu (2.2 μ Ω cm) are shown one's talent, and become the first-selection of TFT gate electrode at display screen.Yet, no matter be pure Al or pure Cu material, there is deficiency, for example for pure Cu, fusing point is lower, and adhesiveness is relatively poor, and exists the Cu atom to phenomenons such as active layer diffusions; And for pure Al material, thermal stability is relatively poor, after the high-temperature process; Film surface is easy to generate the hillock phenomenon, possibly cause the short circuit between the electrode, poor chemical stability; Be prone to produce defective, and in the TFT manufacturing process, the Al atom can spread in active layer with the corrosive liquid reaction of other material; Make leakage current increase, be unfavorable for obtaining higher on-off ratio.
Through preparation alloy structure or double-decker, can improve pure Al and pure Cu such as poor stability, produce defectives such as hillock.But,, still can exist Al and Cu phenomenon to the semiconductor layer diffusion for the former.Therefore select for use Cr as the gate material structure.
The preparation of gate material
Individual layer Cr thin-film electro performance
According to the requirement of TFT parameter designing and the performance of laboratory equipment; Through optimizing power; Obtain the lower film of resistivity and on flexible substrate, prepare the electrode test structure shown in Fig. 7 a, with the square resistance (like Fig. 7 b) at the two ends of the probe contacting metal electrode of universal instrument.According to formula R=ρ L/S, can try to achieve the metallic resistance rate, as shown in Figure 8.
Can find out that the resistivity of Cr metallic film is very big, greater than 700 μ Ω cm; This is far longer than the resistivity (about 30 μ Ω cm) of pure Cr in the commercial production; Through initial analysis, possibly be that the reason owing to the following aspects causes first: the purity of Cr target is too low; The purity of the Cr target of experiment usefulness is 98%, produces 99.99% purity well below industry; Second: vacuum degree is too low during plated film, and the vacuum degree rank that coating system can reach can only be 10
-3Pa, vacuum degree is not high, in process of plating, can cause the Cr partial oxidation, makes resistivity increase.Because the grid metallic film need carry out pyroprocess in the PECVD system in the later stage of TFT technology, therefore the Cr film is carried out annealing test, to obtain to be applied to the resistivity of pure Cr in the TFT device, annealing temperature is 300 ℃, annealing time is 60min.Can find out that the resistivity after the annealing is littler than the resistivity before annealing.Can explain like this: anneal about 300 ℃, the atom of film surface obtains energy, and the mobility on surface strengthens; Make average crystal grain increase, crystal grain increases makes grain boundary reduce, and defect concentration reduces; The grain boundary potential barrier descends to the scattering of charge carrier, causes resistivity decreased.
The source-drain electrode material chosen
The same with the gate material requirement, low-resistivity also is the requirement of TFT to source-drain electrode, and in addition, it is that TFT is for important requirement of source-drain electrode material that source-drain electrode and semiconductor layer form good Ohmic contact.It can reduce the resistance between the drain-source, prevents to produce current-crowding effect.Through demonstration, Honsor research group sums up, and in the middle of existing material system, metal Ti and ITO are as IGZO-TFT source-drain electrode two kinds of materials preferably.The metal Ti material not only has the good adhesive force ability with the IGZO layer, and can reduce the contact resistance with active layer.The ITO material removes has lower resistivity, can also form ohmic contact preferably with the IGZO active layer, and have transparency preferably, and the application selects for use the ITO material as source-drain electrode.
The selection of insulating layer material
TFT has the requirement of the following aspects to gate insulation layer: good dielectric voltage withstand performance, high stability and and active layer between form good interfacial characteristics etc.In this application, select for use SiNx as insulating layer material.SiO2 compares with the customary insulation material, and SiNx is except that having suitable puncture voltage, and SiNx also has the following advantages: 1) relative dielectric constant is high, and the silicon dioxide of PECVD preparation is about 3.9, and the value of silicon nitride film is about 8; 2) silicon nitride is strong to alkali-metal blocking capability, can prevent effectively that alkali metal ion from passing through gate insulation layer and getting into raceway groove; 3) chemical stability of silicon nitride is high, and except hydrofluoric acid and hot phosphoric acid, it reacts with other soda acid hardly; 4) silicon nitride has better waterproof and gas permeation resistance, can effectively reduce the influence that gas and water vapor permeable cause device.
IGZO film preparation and sign
The film preparation of IGZO semiconductor film
The application adopts magnetically controlled DC sputtering to prepare the IGZO target, and wherein the IGZO target is provided by Jiangxi Hai Te new material Co., Ltd, the atomic ratio of target: In
2O
3-Ga
2O
3-ZnO=1: 1: 1 (mol ratio), purity: 99.99%.The IGZO film performance is prepared parameter influence, mainly comprises oxygen flow, deposition power, influences such as gas flow.In this application, mainly be the IGZO film that obtains to satisfy application requirements through the adjustment of oxygen flow.Concrete experiment condition is following: the Ar flow is 40sccm, and vacuum degree is 7 * 10
-3Pa, sputtering power are 200W, O
2Gas flow is respectively 0sccm, 5sccm, 10sccm, 15sccm, 20sccm, is substrate with glass.
The IGZO film performance characterizes
Membrane structure
Use the crystal structure of X-ray diffractometer (X-ray diffraction is called for short XRD) testing film, at different O
2Gas flow is the IGZO film of preparation down, can find out when scan angle and sweep to 100 ° when changing from 20 °, and film does not have the obvious diffraction peak, between 20 °-30 ° and about 60 ° two more weak envelopes are arranged, this shows that the IGZO film belongs to the amorphous pattern.
The transmitance of film
With the transmitance of spectrophotometer measurement film under wavelength 380nm-800nm, different O
2Prepared IGZO film is in the transmitance of visible region under the flow.Can find out, work as O
2When flow was 0sccm, IGZO film transmitance was minimum, and transmitance is more than 65%; Work as O
2When flow was increased to 20sccm from 5sccm, the transmitance of film was almost constant, and in the visible region, transmitance is greater than 75%, wavelength be about 600nm in, transmitance can reach 85%.This also prepares transparent transistors possibility is provided for the later stage.
The electrical property of film
In the structure that surface deposition one deck Al of IGZO film metal electrode constitutes, the test electrode dimensional parameters is following: thickness 100nm, and the spacing of two electrodes is 2cm, electrode size is 1cm * 1cm.The resistivity of prepared IGZO film is with O
2Changes in flow rate, thus it is clear that see, along with O
2The increase of flow, the resistivity of IGZO increases.Work as O
2Flow is increased to 20sccm from 0sccm, and film resiativity is increased to 6.9 * 105 Ω cm from 3.75 Ω cm.The IGZO film resiativity is described below with the physical mechanism that feeding O2 changes in flow rate changes: the conduction type and the ZnO of IGZO film are similar, and the O room is main charge carrier.Do not feeding O
2The time, the O room is a lot of in the semiconductor, and carrier concentration is just very high, and resistivity is just lower; When feeding a small amount of O
2The time, like O
2During from 1sccm to 10sccm, O
2Feeding filled up the O room in the semiconductor very soon, make the O room sharply reduce, semiconductor carriers concentration sharply reduces.In this experiment, work as O
2When content changes from 1sccm to 10sccm, conductivity 5 one magnitude that descended; And when feeding O2 when from 10sccm to 20sccm, changing, because the O room in the semiconductor filled up basically and finished, so the change in resistance of film and not obvious.Therefore, in the preparation process, can be through changing O
2Flow is to realize the control to IGZO thin-film electro performance.
The atomic ratio of film component
X-ray photoelectron spectroscopy (X-ray photoelectron spectrometer; The atomic ratio of the IGZO film that abbreviation XPS) prepares under the test Different Oxygen throughput; The atom content of each component of IGZO film that under the Different Oxygen throughput, prepares; Can see the IGZO film of preparation under the different O2 flows, it is not very greatly that the atomic ratio of In, Ga, Zn changes, and is approximately 10: 10: 3.The atomic ratio of preparation IGZO-TFT differs, and mainly contains following several kinds of ratio In: Ga: Zn=2.2: 2.2: 1.0, and 1.1: 1.1: 0.9,1: 0.9: 0.6 and 10: 10: 3.
The selection of passivation protection layer material and film preparation
Oxygen and steam are influential for IGZO-TFT, the main performance both ways: the one, and the oxygen room of airborne oxygen molecule filling semiconductor layer can make the resistivity of IGZO active layer increase.In IGZO-TFT, the electrical property of device is mainly by oxygen room decision, so the Performance Potential of IGZO-TFT must receive the influence of oxygen molecule in the atmosphere, and in addition, the oxygen molecule in the atmosphere can charged son, thereby also can influence the electrical property of device.The 2nd, the hydrone in the atmosphere can form the hole trap center at the IGZO interface, influence the threshold voltage of device.
In order to stop water in air and oxygen that device performance is impacted, on the IGZO active layer, plate layer protective layer.In the non-crystalline silicon tft that commercial product is used, protective layer generally is to adopt SiNx, prepares with the PECVD method.Yet, in IGZO-TFT, but can not use SiNx as protective layer, because preparation SiNx can contain a large amount of H atoms in the PECVD method, the H atom can make the electrical property of device change, even can to cause active layer be conductor from semiconductor variable.Certainly, if prepare silicon nitride, remain and to be used as protective layer through rf magnetron sputtering.
In conjunction with this laboratory condition, the application selects for use silicon dioxide as protective layer, prepares through the PECVD method; The process conditions that adopt are following: temperature: 200 ℃, and N2O:710sccm, 5%SiH4/N2:170sccm; Power: 20W, pressure: 1000mTorr, thickness: about 120nm.
Through exploration, obtain to satisfy the TFT device application and require electrode layer, insulating barrier and IGZO active layer thin film preparation process parameter single thin film preparation technology; And realize above-mentioned each layer film; Its performance is following: 1, and the gate electrode film: Cr film, average resistivity are 19.6 μ Ω cm; Resistivity after the annealing is 17.7 μ Ω cm, and the uniformity of film resiativity is ± 10%.2. insulating barrier: SiNx film, disruptive field intensity are 5.8MV/cm, and dielectric constant is 6.03.3. active layer: the IGZO film, present non crystalline structure, the transmitance of visible light reaches more than 80%, In: Ga: the atomic ratio of Zn is 10: 10: 3; Within the specific limits, the resistivity of film sharply increases along with the increase of oxygen flow.Other: SiNx is a resilient coating, realizes with the PECVD method; Select silicon dioxide as protective layer,, can regulate and control the total stress that device receives through Control Parameter.
Design of IGZO-TFT device architecture and preparation
TFT structure and technological process thereof
Select bottom gate top contact type TFT structure, the Thickness Design of its each thin layer is as shown in Figure 9, in actual fabrication process, can have certain error.
This flexibility IGZO thin-film transistor comprises plastic, buffer protection layer, deletes electrode, gate insulation layer, source electrode and drain electrode, IGZO semiconductor layer and protective layer, wherein; Cover the buffer protection layer on the plastic; The central upper portion zone of buffer protection layer adopts dc magnetron sputtering method to prepare gate electrode, and gate electrode top has covered gate insulation layer, and the two ends of gate insulation layer cover respectively to the buffer protection layer; The IGZO semiconductor layer is positioned at the top of gate insulation layer; The source, leak the two poles of the earth and lay respectively at the both sides at the top of semiconductor layer, thereby semiconductor layer is covered by source electrode and drain electrode, only at the top of semiconductor layer; The middle passage that forms that the two poles of the earth are leaked in the source adopts PECVD to prepare protective layer on passage.
Figure 10 has provided the preparation flow figure of the flexible IGZO-TFT that sets, in the middle of whole flow process, plates 6 layer films altogether, accomplishes 4 photoetching, does detailed introduction in the face of concrete processing step and technological parameter down:
1. the cleaning of flexible substrate.Kapton E substrate is placed in the beaker cleans,, be easy to flock together because film is thinner.So let Kapton E substrate be clipped in the middle cleaning of glass, glass is placed on the glass frame.Shown in figure 11, wash earlier the surface of Kapton E substrate with cleaning fluid, clean with flushing with clean water, then be placed in acetone, ethanol, the deionized water ultrasonic cleaning 30min respectively, this process repeats once; Then dry up substrate with nitrogen gun; Be placed on 250 ℃ the hot plate about baking 10min; Water that removal retains and organic solvent; And consider that plastic film in follow-up heat treatment process certain mechanical deformation can take place, the high annealing before using can make this phenomenon take place ahead of time, makes sample adapt to follow-up processing conditions.
2. use PECVD deposition SiNx separator.The preparation technology of SiNx separator is referring to table 1;
Table 1
The substrate that will carry out after separator is handled is fixed on the glass plate, to satisfy the needs of later stage technology.
3. the preparation of gate electrode figure.Adopt dc magnetron sputtering method to prepare Cr grid film.Through gluing, baking, photoetching are developed with the film for preparing for its deposition process parameters such as table 2., and etching generates gate electrode figure with the technology of removing photoresist.Wherein shown in gluing, baking, photoetching and the etching technics parameter list 3.The etching of Cr electrode is the ammonium ceric nitrate mixed solution, and proportioning is: 9ml perchloric acid+25g ammonium ceric nitrate+100ml deionized water, etch period is approximately 25s.After electrode pattern prepares, use the acetone ultrasonic depolymerization, then with ethanol and washed with de-ionized water, every kind of solvent supersonic 6min-8min.
Table 2
Table 3
The technological parameter of gluing
| Order | Rotating speed (rpm) | Time (s) |
| 1 (low speed) | 300 | 3 |
| 2 (at a high speed) | 3000 | 40 |
The baking process parameter
| Baking temperature (℃) | The preceding baking time (s) | The back baking time (s) |
| 105 | 90 | 90 |
Exposure, developing process parameter
4. the preparation of gate insulation layer.Gate insulation layer adopts the SiNx material.Deposition process parameters is as shown in table 4 below.
Table 4
5.IGZO the preparation of semiconductor layer.Semiconductor layer IGZO adopts the magnetron sputtering preparation, has studied the influence to device performance of oxygen flow and power in the preparation process respectively.Deposition process parameters is as shown in table 5; The IGZO film for preparing prepares figure through gluing, photoetching, development and etching technics; Etching liquid adopts the proportioning liquid of concentrated hydrochloric acid (36.5%) and deionized water; Concrete ratio is 36.5%HCl: H2O=1: 3 (volume ratios), etch period probably are 10s-15s.
Table 5
6. the preparation of source-drain electrode; Source-drain electrode adopts the ITO material; Prepare film through magnetron sputtering, table 6 is the deposition process parameters of ito thin film, and is different with the graphic method that other each layer film forms; Source-drain electrode is to adopt lift-off technology to prepare electrode pattern, and concrete technological process is shown in figure 12.
Table 6
7. protective layer preparation.Protective layer adopts the SiO2 film of PECVD preparation.
8. the etching of insulating barrier and protective layer.Insulating barrier and protective layer adopt the RIE dry etch process, and after etching was intact, cleaning was removed photoresist, and carries out the test of electrical property then.
Flexible IGZO-TFT device preparation and technological parameter are to the influence of device performance
Preparation temperature is to device architecture and performance impact
Prepare in the process at IGZO-TFT, the temperature when the preparation process temperature is meant deposition SiNx, we select 270 ℃ for use as the embryo deposit temperature.When depositing temperature is 270 ℃, device does not only show the electrical property curve of IGZO-TFT, and film can break or come off on substrate.The main cause of film breaks is that film receives bigger stress.Following surface analysis prepares in the process at flexible TFT, and stress is to the influence of device, and the proposition solution.
According to formula δ s=-δ fdf/ds, wherein, δ s is the suffered power of substrate, and δ f is that the TFT film is stressed, and df is the thickness of TFT film, and ds is the thickness of substrate.Can find out that generally speaking, the thickness of substrate is much larger than the thickness of film, so the power that receives much larger than substrate of the power that receives of film, why normally this also is film breaks.
According to Hooke's law, δ=Y ε, wherein, δ is the power that object receives, Y is a Young's modulus, the deformation that the ε object takes place.For same material, generally speaking, Young's modulus is certain, so stressed similar shape becomes direct ratio.In TFT preparation of devices process, the deformation that is produced can be formulated:
ε m=ε 0+ ε th+ ε ch, wherein, ε 0 builds the deformation that pressure produces in being; ε th is the deformation that thermal expansion produces, and in the deposition process of TFT device, mainly shows the deposition of silicon nitride layer; Can be formulated the variation that thermal expansion causes; ε th=(af-as) * (Troom-Tsubstrate), wherein af is the thermal coefficient of expansion of silicon nitride, as is the thermal coefficient of expansion of substrate; ε ch is moistening (humidity) pressure that do not match; ε ch=(β s-β f) * %RH; β representes the moistening coefficient of expansion; %RH is relative moistening percentage (refers to sample from atmosphere, take in the vacuum tank or from vacuum tank, take the variation of deformation in the atmosphere), and generally speaking, ε ch can ignore.
From above-mentioned analysis, in the process of flexible TFT preparation, the main cause that film comes off or breaks be thermal pressure with in build pressure, therefore can take following some solution;
1. reduce the thermal pressure of film.Thermal pressure is the pressure that when the deposited silicon nitride insulating barrier, produces, and its size is by the temperature decision of deposition SiNx, and the temperature that is deposited together is directly proportional; Therefore, reducing depositing temperature, is the effective way that reduces thermal pressure; And because the reduction of temperature can make SiNx insulation property variation; Therefore the degradation that directly causes device, reduces temperature and need take all factors into consideration.
2. reduction film thickness.At the SiNx of uniform temp deposit film, thicker, film breaks more easily, therefore, also can reduce the probability of film breaks through the thickness that reduces deposit film.
3. optimization deposition power.In the process of deposit film, film mainly is the influence of building pressure and thermal expansion stresses in receiving, if temperature is certain, substrate is certain, and the pressure of heat coupling is exactly certain, and can control total pressure through the process conditions of regulation and control deposition this moment.Generally speaking, most of film breaks are that thermal expansion is pressure normally because of pressure rather than pulling force, can regulate final pressure through the SiNx power of regulation and control deposition.According to literature survey, for the power of PECVD deposition SiNx, power is big more; The pressure that film receives is big more, and when the power minimizing, pressure reduces; When power reduces to one regularly; What show is pulling force, and like this, the following preparation of PECVD middle low power SiNx receives pressure suffered under pulling force and the higher-wattage and offsets.Make the substrate stress balance.Yet on the other hand, the power of deposition SiNx reduces, and makes adhesiveness and the insulation property variation of film therefore also need combine the consideration of two aspects.
To sum up discuss, the device architecture failure to preparing down at 270 ℃ can be optimized from the structure of the following aspects to device:
1. reduce temperature high deposition.Depositing temperature is from initial 270 ℃ be reduced to the later stage 240 ℃.
2. reduce the deposition power of protective layer.Power is reduced to 10W from 20W.
3. reduce the thickness of SiNx insulating barrier.Deposit thickness is reduced to about 130nm from 200nm.
Through behind the above-mentioned process parameter optimizing, the phenomenon of breaking or coming off can not appear in the TFT device of preparing, device, and device exhibits is exported saturated performance preferably, and source-drain electrode and semiconductor layer can form ohmic contact preferably, do not have the current crowding phenomenon; Device exhibits goes out threshold performance preferably, and threshold voltage is 8V, and on-off ratio is 5 * 10
7, drain-source current was 1.0 * 10 when device was 20V at gate source voltage
4A, calculating saturated mobility is 7.8cm2/Vs, sub-threshold slope is 0.9V/dec.
Active layer prepares in the process oxygen flow to the influence of device performance
In the deposition process parameters of IGZO semiconductor layer, oxygen flow is an important parameters.In order to understand the influence of oxygen flow to device performance, we are identical in other parameter of setting, and oxygen flow changes from 0sccm to 8sccm.
Can see not having under the situation of aerating oxygen from the result of performance characterization, the device electrical performance of preparation is better, and threshold voltage is 9V, and mobility can reach 7cm
2/ Vs, and for the device that at oxygen flow is preparation under the 8sccm, the threshold voltage of device reaches 24V, mobility and ON state current are lower.This mainly be oxygen flow within the specific limits, flow is big more, O rooms more among the IGZO are filled up, and make carrier concentration low more, carrier concentration is low more, is not easy to form accumulation layer more, makes threshold voltage increase.Carrier concentration is lower in addition, and the thinner thickness of the feasible accumulation layer that forms causes resistivity to increase; Simultaneously, because oxygen concentration is higher, may make the variation that contacts of IGZO semiconductor layer and ITO electrode layer; Cause contact resistance to increase; All-in resistance increases, and drain-source voltage is constant, makes ON state current reduce.
For protective layer, topmost effect is the drift that reduces threshold voltage, and for the serious drift of threshold voltage.For IGZO-TFT, the absorption of hydrone and oxygen is to cause threshold voltage that the main cause of drift takes place.Yet these two kinds of materials are opposite for the threshold voltage influence of device, and to the IGZO layer, the oxygen room has been filled up in the oxygen molecule diffusion; Be equivalent to electronics and receive main effect, form depletion layer in the IGZO bed boundary, therefore make threshold voltage move to the direction that increases; And, as the electron trap center, form accumulation layer at its interface at the IGZO boundary layer for hydrone; Accumulation layer makes electronics move to back bias voltage, and the direction that promptly reduces towards threshold voltage moves.According to report, when not having the barrier layer, the hydrone role is bigger than oxygen molecule, makes threshold voltage reduce; And, stoped the diffusion of hydrone to semiconductor layer when having added the silicon dioxide barrier layer, can make threshold voltage increase in theory.This is opposite with our resulting conclusion; Through analyzing; Might be because the protective layer of IGZO-TFT adopts the silicon dioxide of PECVD systems produce,, in the silicon dioxide of this method preparation, can contain a certain amount of hydrogen atom at the silicon dioxide of systems produce; The diffusion of hydrogen atom makes the carrier concentration of semiconductor layer increase, thereby makes threshold voltage reduce.
Annealing temperature is to the influence of device performance
Suitable annealing can improve the electrical property and the stability of device.Generally speaking, the IGZO-TFT optimum annealing temperature is about 350 ℃-400 ℃, yet flexible substrate can't be born so high temperature, thus we to select annealing temperature for use be 100 ℃, 150 ℃, 200 ℃ and 250 ℃.Can find out that device can not show TFT performance preferably under 100 ℃ the condition of not annealing and anneal; And other three with reference under the annealing temperature; Output performance and the transfer performance of TFT are better, analyze as follows: the saturated poor-performing of curve of output has multiple reason possibly cause this situation to occur; Normally because the carrier concentration of semiconductor layer is too high; Adding under the situation of grid voltage, can not make charge carrier be deposited in semiconductor layer and the residing interface of insulating barrier fully, making that device can not be saturated; And can find out that from transfer curve under the condition that does not have annealing, the device off-state current reaches 10
-7A is much larger than 10 of annealing
-11A-10
-12A, this is explanation indirectly also, and the carrier concentration of the semiconductor layer that not have to anneal is too high, and the conductivity of semiconductor layer is higher, makes that off-state current is bigger in the transfer curve.Along with the increase in temperature of annealing, the electrical property of device takes a turn for the better, and when the temperature of annealing is higher than 150 ℃, device exhibits is exported transfer performance preferably; Can explain like this that temperature raises, make that on the one hand the O atom in the silicon dioxide obtains energy; Acceleration is diffused among the IGZO, because the charge carrier of IGZO is the oxygen room, so; Along with the injection of the O atom of silicon dioxide, the carrier concentration of IGZO reduces, and resistivity increases; On the other hand, the H atom diffusion forms and is led in semiconductor layer among the insulating barrier SiNx, makes carrier concentration reduce, and off-state current can reach 10
-11Below the A; And for the device of 100 ℃ of annealing, because the temperature of annealing is lower, so the diffusion velocity of O atom is slower; The suitable oxygen room of having filled up the IGZO semiconductor layer; So compare the situation that does not have annealing, taking a turn for the better appears in the performance of device, but is not so good as device in 150 ℃ of performances of perhaps being showed more than 150 ℃ of annealing temperature.Therefore, different annealing temperatures is different to the influence of device performance, and in the technology in later stage, we select annealing temperature for use is 200 ℃.
The test of flexible device bending property
Important characteristic of flexible device can keep device performance constant under case of bending exactly.Bending property for test component that can be quantitative is placed on flexible device on the semicolumn of certain radius of curvature, and is crooked through certain hour, carries out the device performance test more again.In the experiment prepared flexible IGZO-TFT device is placed on the curvature cylinder that radius of curvature is 10mm, uses semiconductor analysis appearance test component front and back electrical property situation.
Bending parameters is: radius of curvature is 10mm, and the duration is 3min, can find out, the electrical property of device does not almost change, this explanation, and the device of preparation possesses bending property preferably, can bear the bending of R >=10mm at least and keeps device performance constant.
The bending property of device and the thickness of flexible substrate have confidential relation, and substrate is thick more, and the power that device receives is big more; Be not easy bending more, the thickness of substrate is thin more, and is easier to be crooked; And crooked limit radius has a relation with outwardly-bent with curving inwardly, and film curves inwardly the power that receives tension force (Tensile stress), and the outwardly-bent power that receives is pressure (compressivestress); For identical radius of curvature, pressure can be greater than tension force.Device buckling failure, great majority are that insulating barrier SiNx breaks and causes, and mainly contain following reason, and insulating barrier is thicker on the one hand, and in the TFT device, the film of insulating barrier almost is the thickest; The area of insulating barrier is bigger on the other hand, almost covers the full wafer sample; At last, SiNx itself is harder, and is frangible.
What should explain at last is; Above embodiment is only in order to describe technical scheme of the present invention rather than the present technique method is limited; The present invention can extend to other modification, variation, application and embodiment on using, and therefore thinks that all such modifications, variation, application, embodiment are in spirit of the present invention and teachings.
Claims (9)
1. a flexible IGZO thin-film transistor comprises plastic, buffer protection layer, deletes electrode, gate insulation layer, source electrode and drain electrode; It is characterized in that this thin-film transistor also comprises IGZO semiconductor layer and protective layer, wherein cover the buffer protection layer on the plastic; The central upper portion zone of buffer protection layer adopts dc magnetron sputtering method to prepare gate electrode, and gate electrode top has covered gate insulation layer, and the two ends of gate insulation layer cover respectively to the buffer protection layer; The IGZO semiconductor layer is positioned at the top of gate insulation layer; The source, leak the both sides that the two poles of the earth lay respectively at the top of semiconductor layer, semiconductor layer is covered by source electrode and drain electrode, only at the top of semiconductor layer; The middle passage that forms that the two poles of the earth are leaked in the source adopts PECVD to prepare protective layer on passage.
2. flexible IGZO thin-film transistor as claimed in claim 1 is characterized in that, the thickness of said plastic is 50 μ m.
3. flexible IGZO thin-film transistor as claimed in claim 2 is characterized in that, buffer protection layer and gate insulation layer adopt silicon nitride.
4. flexible IGZO thin-film transistor as claimed in claim 3 is characterized in that, said gate electrode adopts the Cr material.
5. flexible IGZO thin-film transistor as claimed in claim 4 is characterized in that, the ITO material is adopted in source electrode, drain electrode.
6. flexible IGZO thin-film transistor as claimed in claim 5 is characterized in that, protective layer adopts the SiO of PECVD preparation
2Film.
7. flexible IGZO thin-film transistor as claimed in claim 1 is characterized in that, in the flexible IGZO thin-film transistor process of preparation, depositing temperature is from initial 270 ℃ be reduced to the later stage 240 ℃; The deposition power of protective layer is reduced to 10W from 20W; The deposit thickness of SiNx insulating barrier is reduced to 130nm from 200nm.
8. flexible IGZO thin-film transistor as claimed in claim 4 is characterized in that, gate electrode Cr film: average resistivity is 19.6 μ Ω cm, and the resistivity after the annealing is 17.7 μ Ω cm, and the uniformity of film resiativity is ± 10%.
9. flexible IGZO thin-film transistor as claimed in claim 1 is characterized in that the IGZO film presents non crystalline structure, and the transmitance of visible light reaches more than 80%, In: Ga: the atomic ratio of Zn is 10: 10: 3.
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| CN 201120338446 Expired - Fee Related CN202285237U (en) | 2011-06-15 | 2011-09-09 | Flexible semi-transparent indium gallium zinc oxide (IGZO) thin-film transistor |
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| CN2011102671384A Pending CN102831850A (en) | 2011-06-15 | 2011-09-09 | Device for detecting IGZO (Indium Gallium Zinc Oxide)-TFT (Thin Film Transistor) drive characteristics |
| CN 201120338472 Expired - Fee Related CN202404869U (en) | 2011-06-15 | 2011-09-09 | Apparatus for detecting IGZO-TFT driving characteristic |
| CN 201120338485 Expired - Fee Related CN202307906U (en) | 2011-06-15 | 2011-09-09 | Metal-insulating layer-metal (MIM) structure device for testing SiNx insulating layer |
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| CN2011102672118A Pending CN102832252A (en) | 2011-06-15 | 2011-09-09 | Flexible indium gallium zinc oxide (IGZO) thin film transistor |
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| CN102832257A (en) | 2012-12-19 |
| CN102832251A (en) | 2012-12-19 |
| CN102832131A (en) | 2012-12-19 |
| CN202404869U (en) | 2012-08-29 |
| CN202285237U (en) | 2012-06-27 |
| CN102832103A (en) | 2012-12-19 |
| CN102831850A (en) | 2012-12-19 |
| CN102832109A (en) | 2012-12-19 |
| CN202487581U (en) | 2012-10-10 |
| CN102832130A (en) | 2012-12-19 |
| CN202307906U (en) | 2012-07-04 |
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