CN102832239A

CN102832239A - High-pressure-resistant insulated gate bipolar transistor (IGBT)

Info

Publication number: CN102832239A
Application number: CN2012102630251A
Authority: CN
Inventors: 屈志军
Original assignee: WUXI PHOENIX SEMICONDUCTOR TECHNOLOGY Co Ltd
Current assignee: WUXI PHOENIX SEMICONDUCTOR TECHNOLOGY Co Ltd
Priority date: 2012-07-27
Filing date: 2012-07-27
Publication date: 2012-12-19

Abstract

The invention relates to a high-pressure-resistant insulated gate bipolar transistor (IGBT), comprising an emitting electrode (1), a grid electrode (2) and a collector electrode (3), wherein a first P-typed semiconductor layer (P), an N-typed semiconductor layer and a second P-typed semiconductor layer (4) are arranged between the emitting electrode (1) and the collector electrode (3) in sequence; and the N-typed semiconductor layer comprises a floating zone (N1) and a buffering zone. The high-pressure-resistant insulated gate bipolar transistor is characterized in that the buffering zone is provided with a substrate layer (N2), a buffering layer (6) and a buffering layer (5) in sequence along the direction from the emitting electrode (1) to the collector electrode (3), wherein hydrogen ions are injected into the buffering layer (6), and ones of P ions and As ions are injected into the buffering layer (5). The buffering layer (6) in which the hydrogen ions are injected can be used as a field cutoff layer to reduce the thickness of the floating zone (N1), thereby reducing the thickness of the IGBT and enhancing the pressure resistance capability of the IGBT.

Description

High pressure resistant insulation grid bipolar transistor

Technical field

The present invention relates to semiconductor device, relate in particular to a kind of high pressure resistant insulation grid bipolar transistor.

Background technology

In field of power electronics, insulation bipolar transistor (IGBT) is withstand voltage for guaranteeing 1200V, and it is too thin that silicon wafer thickness can not be done, and non-reach through region (NPT) is greater than the maximum depletion depth of material.For the withstand voltage device of height, because silicon chip is thicker, when causing conducting resistance, on-state voltage drop is big like this, and then on-state loss is bigger.

Among the existing IGBT; Divide into the thickness that the hydrionic resilient coating of injection dwindles non-reach through region through the basalis in n type semiconductor layer; In the PCT in April 25 calendar year 2001 application " hydrogen that is used for the buffering area of break-through p-n type insulated gate bipolar transistor injects ", application number is 01811704.X like international rectification company.

There are some problems in the IGBT of this kind structure, because buffering area plays two effects simultaneously: 1, end the field; 2, form the emitter of bipolarity triode with the second following p type island region, the two performance is difficult to accomplish to optimize simultaneously.

Summary of the invention

For addressing the above problem, the high pressure resistant insulation grid bipolar transistor that the present invention provides a kind of thin thickness, on-state voltage drop is little, on-state loss is low, function is ended in the field and bipolarity triode performance is optimized simultaneously.

For achieving the above object; The technical scheme that the present invention adopts is: high pressure resistant insulation grid bipolar transistor, comprise emitter, grid, collector electrode; Said emitter and inter-collector are established first p type semiconductor layer, n type semiconductor layer, second p type semiconductor layer successively; Said n type semiconductor layer comprises drift region, buffering area, it is characterized in that: described buffering area is established basalis successively from emitter to the collector electrode direction, is injected hydrionic resilient coating, injection P ion, a kind of resilient coating of As ion.

Second preferred version of the present invention is that the P ion implantation concentration of the resilient coating of described injection P ion is every square centimeter of 1x10^12-5x10^15.

Technical advantage of the present invention is:

1. set up for 6 times at the hydrionic resilient coating of injection and inject P ion, a kind of resilient coating 5 of As ion.

2. injecting hydrionic resilient coating 6, can reduce the thickness of floating area N1, strengthen the voltage endurance capability of IGBT when having reached the thickness that reduces IGBT as a cutoff layer.

3. inject P ion or a kind of resilient coating 5 of As ion and contact with the p type semiconductor layer of bottom, its emission effciency can be carried out independent regulation, optimization according to concrete application.

4. in reverse conducting type IGBT device, inject a kind of resilient coating of P ion or As ion 5 certain zone and be connected, form ohmic contact,, reduced unnecessary loss than non-ohmic contact with the metal level of collector electrode.

Below in conjunction with specific embodiment the present invention is further specified.

Description of drawings

Fig. 1 is embodiment 1 a high pressure resistant insulation grid bipolar transistor structure sketch map.

Embodiment

With reference to figure 1; High pressure resistant insulation grid bipolar transistor, comprise emitter 1, grid 2, collector electrode 3; 3 on emitter 1 and collector electrode are established the first p type semiconductor layer P, n type semiconductor layer, second p type semiconductor layer 4 successively; N type semiconductor layer comprises floating area N1, buffering area, buffering area from emitter 1 to collector electrode 3 directions establish basalis N2 successively, inject hydrionic resilient coating 6, inject the resilient coating 5 of P ion.The P ion implantation concentration that injects resilient coating is every square centimeter of 1x10^12-5x10^15.

Structure between the metal level of the metal level of emitter 1, grid 2, floating area N1 is same as prior art.The resilient coating 5 of injection P ion is divided into second p type semiconductor layer, 4, the second p type semiconductor layers 4 and is divided into collector electrode 3.

During operating state, electric current flows into from emitter, passes the first p type semiconductor layer P, floating area N1, basalis N2 successively, injects hydrionic resilient coating 6, injects resilient coating 5, second p type semiconductor layer 4, the collector electrode 3 of P ion.

Claims

High pressure resistant insulation grid bipolar transistor, comprise emitter (1), grid (2), collector electrode (3); Establish first p type semiconductor layer (P), n type semiconductor layer, second p type semiconductor layer (4) between said emitter (1) and collector electrode (3) successively; Said n type semiconductor layer comprises floating area (N1), buffering area, it is characterized in that: described buffering area is established basalis (N2) successively from emitter (1) to collector electrode (3) direction, injects hydrionic resilient coating (6), is injected P ion, a kind of resilient coating (5) of As ion.
2. high pressure resistant insulation grid bipolar transistor according to claim 1 is characterized in that: the P ion implantation concentration of the resilient coating of described injection P ion is every square centimeter of 1x10^12-5x10^15.