CN102820226A - Manufacturing method of multilayer metal-silicon oxide-metal capacitor - Google Patents
Manufacturing method of multilayer metal-silicon oxide-metal capacitor Download PDFInfo
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- CN102820226A CN102820226A CN2012101095781A CN201210109578A CN102820226A CN 102820226 A CN102820226 A CN 102820226A CN 2012101095781 A CN2012101095781 A CN 2012101095781A CN 201210109578 A CN201210109578 A CN 201210109578A CN 102820226 A CN102820226 A CN 102820226A
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Abstract
The invention discloses a manufacturing method of a multilayer metal-silicon oxide-metal capacitor, which is carried out on a silicon substrate. The manufacturing method is characterized by comprising the following circular steps: step 1, precipitating silicon oxide with a high K value; step 2, photo-etching and etching to remove a part of the precipitated silicon oxide with a high K value; step 3, precipitating a medium layer with a low k value to cover the rest silicon oxide with a high K value prepared in the step 2; step 4, chemically and mechanically grinding the medium layer with a low k value and exposing the upper surface of the silicon oxide with a high K value; step 5, manufacturing a metal channel on the medium layer with a low k value and the silicon oxide with a high K value; and step 6, chemically and mechanically grinding after filling metal in the metal channel. With the adoption of the manufacturing method provided by the invention, the capacitance of an interlayer capacitor and an intra-layer capacitor can be effectively improved by improving a PECVD (Plasma Enhanced Chemical Vapor Deposition) process; various electric properties of the metal-silicon oxide-metal (MOM) capacitor, such as breakdown voltage and leakage current, are improved; and the electric uniformity among all devices can be improved.
Description
Technical field
The present invention relates to capacitor, particularly, relate to the manufacture method of a kind of multiple layer metal-silica-metal capacitor.
Background technology
Capacitor is the important composition unit in the integrated circuit, extensively applies to memory, microwave, and radio frequency, smart card is in the chips such as high pressure and filtering.The capacitor constructions that in chip, widely adopts is the metal-insulator-metal type (MIM) that is parallel to silicon chip substrate.Wherein metal is that manufacture craft is prone to the copper compatible mutually with metal interconnected technology, aluminium etc., and insulator then is the dielectric substance of high-ks (k) such as silicon nitride, silica.The performance of improving the high-k dielectric material is one of main method that improves capacitor performance.
Plasma enhanced chemical vapor deposition method (PECVD, Plasma Enhanced Chemical Vapor Deposition) is because of the low thin film deposition that is widely used in the metal interconnected technology of its depositing temperature.Utilize residual a large amount of si-h bond (Si-H) in the silicon oxide film that the PECVD method makes; Make and have more electric charge in it; This causes the uniformity of this silicon nitride film aspect electrical thickness relatively poor, and the MIM capacitor that utilizes this silicon oxide film to make also can be corresponding relatively poor aspect each electrical characteristics such as puncture voltage, leakage current.
Chinese patent CN101736314A has introduced a kind of method of improving aluminium-silicon nitride-tantalum thing MIM capacitor performance.Make silicon oxide film through improved PECVD and reduce si-h bond residual in the silicon nitride film (Si-H) effectively, thereby improved the performance of this MIM capacitor effectively.
Along with the minimizing of size, and performance is to the demand of big electric capacity, and how under limited area, obtaining highdensity electric capacity becomes a problem that haves a great attraction.Along with the continuous progress of semiconductor integrated circuit manufacturing technology, performance also is accompanied by device miniaturization, microminiaturized process when constantly promoting.More and more advanced processing procedure requires in as far as possible little zone, to realize device as much as possible, obtains high as far as possible performance.
Metal-oxide-metal (MOM) perpendicular to silicon chip substrate is a kind of method that in less chip area, realizes big electric capacity.MOM capacitor fabrication technology and metal interconnected technology compatible relatively good, the outer company of capacitor two-stage can realize with metal interconnected technology synchronously.
Therefore, a kind of electric capacity that can improve interlayer and layer inner capacitor effectively is provided; Improve each electrical characteristics such as puncture voltage, leakage current of metal-oxide silicon-metal (MOM) capacitor; The inhomogeneity MOM capacitor of electricity that improves between each device just seems particularly important.
Summary of the invention
The objective of the invention is to improve the electric capacity of interlaminar capacitor, improve each electrical characteristics such as puncture voltage, leakage current of metal-oxide silicon-metal (MOM) capacitor, and the electricity uniformity between each device.
The present invention discloses the manufacture method of a kind of multiple layer metal-silica-metal capacitor, on silicon substrate, carries out, and wherein, comprises circulation execution following steps:
Step 4, the said low k value dielectric layer of cmp also exposes said high K value silica upper surface;
Step 5 is made metallic channel on said low k value dielectric layer and said high K value silica;
Step 6 is carried out cmp behind the filling metal in said metallic channel.
Above-mentioned method, wherein, said high K value silica is carried out following steps through repeatedly circulating and is formed:
Step 111, cvd silicon oxide;
Step 112 provides oxygen-containing gas to handle the silica of said deposition.
The method of stating, wherein, said silica utilizes the PECVD method under plasma ambient, to react generation through silane and nitrous oxide.
Above-mentioned method, wherein, said oxygen-containing gas comprises nitric oxide, nitrous oxide, carbon monoxide and carbon dioxide.
Above-mentioned method, wherein, in the said step 111, the thick deposited silicon oxide span is 1 nanometer to 10 nanometer.
Above-mentioned method, wherein, in the said oxygen-containing gas processing procedure, the gas flow span is 2000sccm to 6000sccm, the treatment temperature span is 300 degrees centigrade to 600 degrees centigrade.
Above-mentioned method; Wherein, The flow span of said reactant gas silane is 25sccm to 80sccm; The flow span of said reacting gas nitrous oxide is 10000sccm to 20000sccm, and the flow-rate ratio span of silane and nitrous oxide is 1:125 to 1:800, and rate of film build is less than 100 nm/minute.
Above-mentioned method, wherein, in said step 5, the making of said metallic channel comprises the step of etching after the photoetching.
Above-mentioned method wherein, comprises the diffusion impervious layer of deposited copper in the step 6.
The present invention more effectively improves the electric capacity of interlayer and layer inner capacitor through improving pecvd process; Improve each electrical characteristics such as puncture voltage, leakage current of metal-oxide silicon-metal (MOM) capacitor; Improve the electricity uniformity between each device.
Description of drawings
Through reading the detailed description of non-limiting example being done with reference to following accompanying drawing, it is more obvious that the present invention and characteristic thereof, profile and advantage will become.Mark identical in whole accompanying drawings is indicated identical part.Painstakingly proportionally do not draw accompanying drawing, focus on illustrating purport of the present invention.In the accompanying drawings, for cheer and bright, amplified the part parts, for same parts, only indicated wherein part, those skilled in the art can combine embodiment partly to understand.
Fig. 1 to Fig. 6 shows according to of the present invention, the sketch map of each step of the manufacture method of a kind of multiple layer metal-silica-metal capacitor.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is further elaborated.Embodiment described herein only is used to explain the present invention, and is not used in qualification protection scope of the present invention.
In conjunction with manufacture method referring to figs. 1 to multiple layer metal-silica shown in Figure 6-metal capacitor, on silicon substrate 100, carry out, wherein, comprise circulation execution following steps: step 1, as shown in Figure 1, precipitate high K value silica 2; Step 2, photoetching and etching are removed the high K value of the said deposition of part silica 2, it will be appreciated by those skilled in the art that to remove the high K value silica 2 that is positioned at non-MOM capacitor regions; Step 3, the low k value dielectric layer 1 of deposition covers remaining high K value silica 2 in the step 2; Step 4, the said low k value dielectric layer 1 of cmp also exposes said high K value silica 2 upper surfaces, and is as shown in Figure 3; Step 5 is made metallic channel 101 on said low k value dielectric layer 1 and said high K value silica 2, as shown in Figure 4; Step 6 is carried out cmp behind the filling metal 3 in said metallic channel 101, obtain structure as shown in Figure 5.Said metal 3 adopts copper.
In a specific embodiment, said high K value silica 2 is carried out following steps through repeatedly circulating and is formed: step 111, cvd silicon oxide; Step 112 provides oxygen-containing gas to handle the silica of said deposition.
Particularly, said silica utilizes the PECVD method under plasma ambient, to react generation through silane and nitrous oxide.
More particularly, said oxygen-containing gas comprises nitric oxide, nitrous oxide, carbon monoxide and carbon dioxide.
Wherein, in the said step 111, the thick deposited silicon oxide span is 1 nanometer to 10 nanometer.
Preferably, in the said oxygen-containing gas processing procedure, the gas flow span is 2000sccm to 6000sccm, and the treatment temperature span is 300 degrees centigrade to 600 degrees centigrade.
More preferably; The flow span of said reactant gas silane is 25sccm to 80sccm; The flow span of said reacting gas nitrous oxide is 10000sccm to 20000sccm; The flow-rate ratio span of silane and nitrous oxide is 1:125 to 1:800, and rate of film build is less than 100 nm/minute.
It will be appreciated by those skilled in the art that in said step 5 making of said metallic channel 101 comprises the step of etching after the photoetching.Wherein as shown in Figure 4, the quantity that is positioned at the metallic channel 101 of MOM capacitor regions is 3, and the quantity that is positioned at the metallic channel 101 of non-MOM capacitor regions is 1.
The diffusion impervious layer that comprises deposited copper in the step 6.Those skilled in the art combine prior art can accomplish copper-connection, and wherein, technologies such as the diffusion impervious layer of the photoetching of copper wiring technique, etching, copper deposition, copper plating, copper metal layer cmp are prior art, do not repeat them here.
Those skilled in the art combine prior art and the foregoing description can realize said variant, and such variant does not influence flesh and blood of the present invention, does not repeat them here.
More than preferred embodiment of the present invention is described.It will be appreciated that the present invention is not limited to above-mentioned specific implementations, equipment of wherein not describing in detail to the greatest extent and structure are construed as with the common mode in this area to be implemented; Any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the method for above-mentioned announcement capable of using and technology contents are made many possible changes and modification to technical scheme of the present invention; Or being revised as the equivalent embodiment of equivalent variations, this does not influence flesh and blood of the present invention.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (9)
1. the manufacture method of multiple layer metal-silica-metal capacitor is carried out on silicon substrate, it is characterized in that, comprises circulation execution following steps:
Step 1 precipitates high K value silica;
Step 2, photoetching and etching are removed the high K value of the said deposition of part silica;
Step 3, the low k value dielectric layer of deposition covers remaining high K value silica in the step 2;
Step 4, the said low k value dielectric layer of cmp also exposes said high K value silica upper surface;
Step 5 is made metallic channel on said low k value dielectric layer and said high K value silica;
Step 6 is carried out cmp behind the filling metal in said metallic channel.
2. method according to claim 1 is characterized in that, said high K value silica is carried out following steps through repeatedly circulating and formed:
Step 111, cvd silicon oxide;
Step 112 provides oxygen-containing gas to handle the silica of said deposition.
3. method according to claim 2 is characterized in that, said silica utilizes the PECVD method under plasma ambient, to react generation through silane and nitrous oxide.
4. method according to claim 2 is characterized in that said oxygen-containing gas comprises nitric oxide, nitrous oxide, carbon monoxide and carbon dioxide.
5. method according to claim 2 is characterized in that, in the said step 111, the thick deposited silicon oxide span is 1 nanometer to 10 nanometer.
6. method according to claim 2 is characterized in that, in the said oxygen-containing gas processing procedure, the gas flow span is 2000sccm to 6000sccm, and the treatment temperature span is 300 degrees centigrade to 600 degrees centigrade.
7. method according to claim 3; It is characterized in that; The flow span of said reactant gas silane is 25sccm to 80sccm; The flow span of said reacting gas nitrous oxide is 10000sccm to 20000sccm, and the flow-rate ratio span of silane and nitrous oxide is 1:125 to 1:800, and rate of film build is less than 100 nm/minute.
8. method according to claim 1 is characterized in that, in said step 5, the making of said metallic channel comprises the step of etching after the photoetching.
9. method according to claim 1 is characterized in that, comprises the diffusion impervious layer of deposited copper in the step 6.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012101095781A CN102820226A (en) | 2012-04-16 | 2012-04-16 | Manufacturing method of multilayer metal-silicon oxide-metal capacitor |
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| CN2012101095781A CN102820226A (en) | 2012-04-16 | 2012-04-16 | Manufacturing method of multilayer metal-silicon oxide-metal capacitor |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030001188A1 (en) * | 2001-06-27 | 2003-01-02 | Nakagawa Osamu Samuel | High-dielectric constant metal-insulator metal capacitor in VLSI multi-level metallization systems |
| CN101736314A (en) * | 2008-11-06 | 2010-06-16 | 中芯国际集成电路制造(北京)有限公司 | Formation method of silicon oxide film and metal-insulator-metal capacitor |
| CN102394216A (en) * | 2011-11-30 | 2012-03-28 | 上海华力微电子有限公司 | Metal-oxide-metal capacitor manufacturing method |
| CN102394215A (en) * | 2011-11-30 | 2012-03-28 | 上海华力微电子有限公司 | Manufacturing method of multilayer metal-silicon oxide-metal capacitor |
| CN102437024A (en) * | 2011-11-30 | 2012-05-02 | 上海华力微电子有限公司 | Method for manufacturing multilayer metal-silicon oxide-metal (MOM) capacitor |
-
2012
- 2012-04-16 CN CN2012101095781A patent/CN102820226A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030001188A1 (en) * | 2001-06-27 | 2003-01-02 | Nakagawa Osamu Samuel | High-dielectric constant metal-insulator metal capacitor in VLSI multi-level metallization systems |
| CN101736314A (en) * | 2008-11-06 | 2010-06-16 | 中芯国际集成电路制造(北京)有限公司 | Formation method of silicon oxide film and metal-insulator-metal capacitor |
| CN102394216A (en) * | 2011-11-30 | 2012-03-28 | 上海华力微电子有限公司 | Metal-oxide-metal capacitor manufacturing method |
| CN102394215A (en) * | 2011-11-30 | 2012-03-28 | 上海华力微电子有限公司 | Manufacturing method of multilayer metal-silicon oxide-metal capacitor |
| CN102437024A (en) * | 2011-11-30 | 2012-05-02 | 上海华力微电子有限公司 | Method for manufacturing multilayer metal-silicon oxide-metal (MOM) capacitor |
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