CN102820212A - 一种深沟槽超级pn结的形成方法 - Google Patents
一种深沟槽超级pn结的形成方法 Download PDFInfo
- Publication number
- CN102820212A CN102820212A CN2011101517810A CN201110151781A CN102820212A CN 102820212 A CN102820212 A CN 102820212A CN 2011101517810 A CN2011101517810 A CN 2011101517810A CN 201110151781 A CN201110151781 A CN 201110151781A CN 102820212 A CN102820212 A CN 102820212A
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- dielectric layer
- deep trench
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- 238000000034 method Methods 0.000 title claims abstract description 50
- 230000015572 biosynthetic process Effects 0.000 title claims abstract description 21
- 239000000463 material Substances 0.000 claims abstract description 38
- 238000005530 etching Methods 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 229910052736 halogen Inorganic materials 0.000 claims description 14
- -1 halogen hydride Chemical class 0.000 claims description 7
- 150000002367 halogens Chemical class 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 5
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 9
- 239000010703 silicon Substances 0.000 abstract description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 8
- 238000000151 deposition Methods 0.000 abstract description 5
- 239000007789 gas Substances 0.000 abstract 1
- 238000005498 polishing Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 39
- 238000004519 manufacturing process Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Element Separation (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
Claims (10)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110151781.0A CN102820212B (zh) | 2011-06-08 | 2011-06-08 | 一种深沟槽超级pn结的形成方法 |
PCT/CN2012/076347 WO2012167714A1 (zh) | 2011-06-08 | 2012-05-31 | 一种深沟槽超级pn结的形成方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110151781.0A CN102820212B (zh) | 2011-06-08 | 2011-06-08 | 一种深沟槽超级pn结的形成方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102820212A true CN102820212A (zh) | 2012-12-12 |
CN102820212B CN102820212B (zh) | 2015-08-12 |
Family
ID=47295477
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201110151781.0A Active CN102820212B (zh) | 2011-06-08 | 2011-06-08 | 一种深沟槽超级pn结的形成方法 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN102820212B (zh) |
WO (1) | WO2012167714A1 (zh) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1691284A (zh) * | 2004-03-31 | 2005-11-02 | 株式会社电装 | 半导体器件的制造方法 |
US20090273102A1 (en) * | 2005-10-06 | 2009-11-05 | Syouji Nogami | Semiconductor Substrate and Method for Manufacturing the Same |
CN101872724A (zh) * | 2009-04-24 | 2010-10-27 | 上海华虹Nec电子有限公司 | 超级结mosfet的制作方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5476689B2 (ja) * | 2008-08-01 | 2014-04-23 | 富士電機株式会社 | 半導体装置の製造方法 |
CN101958283B (zh) * | 2009-07-09 | 2014-07-09 | 上海华虹宏力半导体制造有限公司 | 获得交替排列的p型和n型半导体薄层结构的方法及结构 |
-
2011
- 2011-06-08 CN CN201110151781.0A patent/CN102820212B/zh active Active
-
2012
- 2012-05-31 WO PCT/CN2012/076347 patent/WO2012167714A1/zh active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1691284A (zh) * | 2004-03-31 | 2005-11-02 | 株式会社电装 | 半导体器件的制造方法 |
US20090273102A1 (en) * | 2005-10-06 | 2009-11-05 | Syouji Nogami | Semiconductor Substrate and Method for Manufacturing the Same |
CN101872724A (zh) * | 2009-04-24 | 2010-10-27 | 上海华虹Nec电子有限公司 | 超级结mosfet的制作方法 |
Also Published As
Publication number | Publication date |
---|---|
CN102820212B (zh) | 2015-08-12 |
WO2012167714A1 (zh) | 2012-12-13 |
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C06 | Publication | ||
PB01 | Publication | ||
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ASS | Succession or assignment of patent right |
Free format text: FORMER OWNER: WUXI HUARUN SHANGHUA TECHNOLOGY CO., LTD. Effective date: 20140411 |
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C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20140411 Address after: 214028 Wuxi provincial high tech Industrial Development Zone, Hanjiang Road, No. 5, Jiangsu, China Applicant after: Wuxi CSMC Semiconductor Co., Ltd. Address before: 214028 Wuxi provincial high tech Industrial Development Zone, Hanjiang Road, No. 5, Jiangsu, China Applicant before: Wuxi CSMC Semiconductor Co., Ltd. Applicant before: Wuxi Huarun Shanghua Technology Co., Ltd. |
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C14 | Grant of patent or utility model | ||
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Effective date of registration: 20171127 Address after: 214028 Xinzhou Road, Wuxi national hi tech Industrial Development Zone, Jiangsu, China, No. 8 Patentee after: Wuxi Huarun Shanghua Technology Co., Ltd. Address before: 214028 Wuxi provincial high tech Industrial Development Zone, Hanjiang Road, No. 5, Jiangsu, China Patentee before: Wuxi CSMC Semiconductor Co., Ltd. |