CN102790596B - Automatic gain control amplifier for canceling direct current offset - Google Patents
Automatic gain control amplifier for canceling direct current offset Download PDFInfo
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Abstract
The invention discloses a complementary metal oxide semiconductor (CMOS) automatic gain control amplifier for canceling direct current offset. The CMOS automatic gain control amplifier comprises a cascade amplification link, an automatic gain control feedback loop and a direct current offset canceling feedback loop. The cascade amplification link uses multistage variable gain amplification units for cascading and can achieve high gain and enlarge high gain dynamic ranges. The automatic gain control feedback loop uses a charge pump structure and has the advantages that the automatic gain control feedback loop is less influenced by process deviation and temperature deviation, is capable of accurately detecting narrow-band and wide-band signal amplitude and is suitable for achieving CMOS processes. The direct current offset canceling feedback loop uses two-stage negative feedback loops, and each of the two-stage negative feedback loops uses an integrator as low-pass negative feedback; an active device is used as an integrator input resistor, and an equivalent resistor is provided with characteristics of temperature compensation; and the automatic gain control amplifier for canceling the direct current offset is capable of effectively canceling the direct current offset superposed by a preceding stage circuit and the direct current offset of the amplification link and is provided with a lower high pass corner frequency and a higher integrated level, and the automatic gain control amplifier for canceling the direct current offset is small in low-frequency signal loss and requires no off-chip passive devices (high value resistors or capacitors and the like). The automatic gain control amplifier is applicable to wireless communication receivers with zero intermediate frequency structures in the CMOS processes.
Description
Technical field
The invention belongs to digital communication technology field, relate to a kind of automatic gain control amplifier, relate in particular to a kind of automatic gain control amplifier of eliminating DC maladjustment, for realizing the automatic gain control amplifier with DC maladjustment elimination function of high integration.
Background technology
For wireless receiver, because the Strength Changes of reception signal is very large, or the gain generation deviation of or radio-frequency (RF) front-end circuit outer due to sheet, after causing frequency conversion, analog baseband signal changes in amplitude is violent, cause performance of analog-to-digital convertor severe exacerbation, correctly demodulation of digital baseband, therefore needing to introduce automatic gain control amplifier regulates, make the signal that analog to digital converter receives there is stable amplitude, reduce the impact of analog baseband signal changes in amplitude on carrier-to-noise ratio, the dynamic range that the Strength Changes numerical quantity that receives signal is automatic gain control amplifier.Automatic gain control has analog-and digital-two kinds of control modes: the control information of digital control approach automatic gain control need to be produced by digital baseband, therefore has limitation, the automatic gain control of analog control mode, if the people such as Chi Bao Yong are at IEEE Transactions on Biomedical Engineering, 2007: in " Low-Power Transceiver Analog Front-End Circuits for Bidirectional High Data Rate Wireless Telemetry in Medical Endoscopy Applications " paper of delivering, automative interest increasing controlling circuit adopts the linear circuits such as peak value detection to realize, and adopt RSSI circuit as amplitude detection, exist circuit complexity higher, need the shortcoming that coordinates multistage limiting amplifier and multi-stage rectifying device and logarithmic amplifier to realize, therefore be only limited in the minority application such as digital TV tuner.For high-frequency wideband signal, the two-way peak detection circuit of realizing under CMOS technique cannot reach degree of precision, is subject to process deviation influence large.
Zero-if architecture radio-frequency (RF) front-end circuit, the problem that does not exist mirror image to disturb compared with low intermediate frequency structure, for same band signal, high frequency 3dB cut-off frequency is less, and power consumption consumption is lower.Zero-if architecture becomes widely used receiver structure in recent years, especially in broadband reception field.But, a critical defect of zero-if architecture is the impact that has DC maladjustment, the static direct current imbalance meeting that the factor such as dynamic DC maladjustment and mismatch producing from circuit such as frequency mixers causes is cumulative step by step at signal link, and be exaggerated at automatic gain control amplifying stage, cause DC operation point drift, thereby make amplifier distortion even saturated, affect receptivity, therefore need to carry out DC maladjustment elimination.
6 kinds of frame modes such as at present conventional DC maladjustment is eliminated AC coupled, imbalance storage, copped wave, figure adjustment, parallel elimination, negative feedback, negative feedback structure is current the most conventional DC maladjustment cancellation.The people such as Francesco Gatta are at IEEE Journal of Solid-State Circuits, 2004: the people such as " A Fully Integrated 0.18-μ m CMOS Direct Conversion Receiver Front-End With On-Chip LO for UMTS " paper and Kim Ji-Hun who delivers is at ICACT, 2006: " A CMOS Variable Gain Amplifier with Wide Dynamic Range and Accurate dB-Linear Characteristic " paper of delivering, the integrator feedback DC maladjustment proposing is eliminated structure, only adopt a road negative feedback, therefore in the time that variable gain amplifier is operated in high gain state, high pass corner frequency is larger, low frequency signal loss amount is excessive, to be not suitable for the application scenario of high-gain and high dynamic range or to increase integrating capacitor in order realizing compared with low high pass corner frequency, can expend larger chip area.The people such as Lee Hui Dong are at IEEE Transactions on Microwave Theory and Techniques, 2007: " A Wideband CMOS Variable Gain Amplifier With an Exponential Gain Control " paper of delivering, and publication number CN101442325, name is called " amplifier with band-pass filtering function " patent, eliminate in structure and adopt RC low-pass filtering mode as negative feedback mode, between integrated level and low frequency signal loss amount, have contradiction.The people such as Wang Yan Jie are at 2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008: the on-chip active high resistant implementation that " A 2.5mW Inductorless Wideband VGA with Dual Feedback DC-Offset Correction in 90nm CMOS Technology " paper of delivering proposes is only limited to 90nm and following technique thereof, has larger limitation.
Summary of the invention
The present invention seeks to the defect in order to overcome prior art, propose a kind of automatic gain control amplifier of eliminating DC maladjustment, use comparison circuit and charge pump to produce the automatic gain control structure of controlling voltage.This structure is subject to process deviation influence little, can accurately detect the amplitude of high frequency or broadband signal, and the DC maladjustment for realizing with high integration is eliminated the automatic gain control of function.The present invention seeks to realize by following technical scheme:
Eliminate an automatic gain control amplifier for DC maladjustment, it is, it is amplified link 21, automatic gain control feedback loop 22 and eliminated DC maladjustment feedback loop 23 by cascade and forms;
Described cascade is amplified link 21 and is comprised the input stage 201 that two road ports are connected in series successively, multistage variable gain amplifier unit 202 and output stage 203;
Described automatic gain control feedback loop 22 comprises comparison circuit 204,2 outputs or the door 205 that are connected in series successively, charge pump 206 and V-I change-over circuit 207;
Described elimination DC maladjustment feedback loop 23 comprises the first integrator 208 that two road ports are connected in series successively, mutual conductance amplifying unit Gm 209 and second integral device 210;
Input stage 201 is subtraction amplification circuit unit, and the electrode input end of its two-way input connects signal input part V
iNPwith the positive feedback signal output of eliminating DC maladjustment feedback loop, the negative input of input stage 201 its two-way inputs connects signal input part V
iNNwith the negative-feedback signal output of eliminating DC maladjustment feedback loop, amplification input signal and the negative-feedback signal of two-way input, realize subtraction process in input stage 201 respectively simultaneously.The two-way output of input stage 201 connects the input of multi-stage cascade variable gain amplifier unit, realizes high-gain dynamic range and amplifies; The corresponding two-way input that connects output stage 203 of two-way output of the variable gain amplifier unit of link (21) is amplified in cascade, output stage is buffer, the corresponding two-way input that connects automatic gain control feedback loop 22 and eliminate DC maladjustment feedback loop 23 of two-way output of output stage;
The output of V-I change-over circuit 207 connects every grade of control end of multistage variable gain amplifier unit 202 in cascade amplification link 21, controls the overall gain on cascade amplifier chain road; Described comparison circuit 204 is 2 complementary fully differential comparison circuits, and 2 comparison circuit input polarity are contrary; Each comparison circuit You Er road input, road input termination output stage buffer 203 outputs, another road input all connects benchmark comparative level; The two-way output connection of comparison circuit 204 or 2 inputs of door 205, or 2 outputs of door 205 connect the current supply switch up and down of charge pump 206, or door 205 generates 2 complementary digital logic signals, control charge pump discharges and recharges, charge pump 206 is exported termination V-I change-over circuit 207, and the output of V-I change-over circuit 207 connects every grade of control end of multistage variable gain amplifier unit 202; V-I change-over circuit 207 is the control electric current of variable gain amplifier unit 202 by controlling voltage transitions, realizes the control to gain.
Eliminating DC maladjustment feedback loop 23 has two feedback loops, and each feedback loop has two-way input and output, multistage variable gain amplifying unit 202 is divided into two parts cascade variable gain amplifier also for two-way arranges intermediate contact, the output of output stage buffer 203 connects the input of first integrator 208, the output of first integrator 208 connects mutual conductance amplifying unit 209, first integrator 208 output voltages are converted to negative feedback current by mutual conductance amplifying unit 209, the output of mutual conductance amplifying unit 209 is connected to the intermediate contact of multistage variable gain amplifying unit 202, form and eliminate DC maladjustment the first feedback loop, realize the gain of the variable gain amplifier of cascade after negative feedback control intermediate contact, the multistage variable gain amplifying unit 202 of cascade connects the input of first integrator 208 through the output of output stage 203, cascade variable gain amplifier output before multistage variable gain amplifying unit 202 intermediate contacts connects the input of second integral device 210, the output of second integral device 210 connects the input of input stage 201 subtraction amplification circuits, form and eliminate DC maladjustment the second feedback loop, realize the gain of negative feedback control multistage variable gain amplifying unit.
Eliminate DC maladjustment the second feedback loop output by the corresponding two-way input that connects input stage 201 of second integral device 210 two-way outputs, realize negative feedback gain control function, control the gain of multistage variable gain amplifying unit 202.Eliminate the two-way output corresponding two-way intermediate contact that be connected to multistage variable gain amplifier unit 202 of DC maladjustment the first feedback loop output by mutual conductance amplifying unit 209, first integrator 208 two output voltage are converted to negative feedback current by mutual conductance amplifying unit 209, load by contact prime realizes voltage gain, realizes negative feedback gain control function.
Integrator input resistance utilizes PMOS pipe source to leak equivalent resistance and realizes, this gate pmos is wide long much smaller than grid, the bias PMOS Guan Weiqi being connected by another diode mode provides grid source bias voltage, unity gain amplifier ensures that PMOS pipe and the bias PMOS pipe source voltage of equivalent resistance equate, PTAT electric current provides bias current for bias PMOS pipe, for compensating equivalent resistance temperature deviation.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, it is that described output stage 201 is buffer, it is the buffer of low gain and large bandwidth, for increasing rear class driving force, reduces the impact of load on bandwidth.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, it is that described automatic gain control feedback loop 22 is for adopting the automative interest increasing controlling circuit of charge pump construction, charge pump is through the gain of the output current control multistage variable gain amplifying unit 202 of V-I change-over circuit 207, make charge pump control voltage and variable gain amplifier gain be dB-Linear relation, there is fixing frequency-domain and time-domain response characteristic to realize automative interest increasing controlling circuit.Feedback control loop has regular time constant, and to the input signal of different changes in amplitude, output has the stabilization time of approximate fixed value.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, it is that described elimination DC maladjustment feedback loop 23 is for two-way elimination DC maladjustment feedback negative feedback loop line structure, in the feedback loop of every road, all comprise two variable gain amplifier unit, an integrator, the first via is eliminated in DC maladjustment feedback loop and is also comprised a transconductance cell, the second tunnel is eliminated in DC maladjustment feedback loop and is also comprised an adder circuit, gain and realize the control to high pass corner frequency for control loop, increase loop gain and avoided high pass corner frequency too high, thereby obtain less low frequency signal loss.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, it is that the first via eliminates DC maladjustment feedback control loop and adopt mutual conductance amplifying unit 209 to realize negative feedback, the load using the output loading of multistage variable gain amplifying unit 202 intermediate contact place variable gain amplifying stages as transconductance cell 209.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, is characterized in that, the second tunnel is eliminated DC maladjustment feedback loop and adopted subtraction circuit to realize negative feedback, and gain around feedback is not subject to the impact of front stage circuits load.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, its mutual conductance amplifying unit 209 that is described elimination DC maladjustment feedback loop 23 is for simple differencing is to transconductance structure, differential pair adopts tail current biasing, mutual conductance amplifying unit 209 adopt simple differencing to but not subtraction circuit realize, reduced elimination DC maladjustment feedback loop circuitry complexity.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, its input resistance that is the integrator 208 and 210 in described elimination DC maladjustment feedback loop is on-chip active high resistant, active high resistant adopts the PTAT current source that is proportional to absolute temperature that bias current is provided, be used for realizing temperature-compensating, thereby reduce the deviation of the closed loop high pass corner frequency causing because of variations in temperature.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, it is that first integrator 208 and second integral device 210 in described elimination DC maladjustment feedback loop are a pair of fully differential integrator, adopt passive device on full sheet, for reducing chip area and realizing high integration.
Described a kind of automatic gain control amplifier of eliminating DC maladjustment, it is that described elimination DC maladjustment feedback loop 23 adopts the integrator of high resistant on input brace to eliminate circuit as degenerative high-pass filtering DC maladjustment, high pass corner frequency does not increase and becomes large with feedback loop gain F, and misalignment rate is attenuated F doubly, realizes high-performance direct current imbalance and eliminated.
The automatic gain control amplifier of eliminating DC maladjustment amplifies link, automatic gain control feedback loop and elimination DC maladjustment feedback loop by cascade and forms; Wherein
Described elimination DC maladjustment feedback loop adopts two-way integrator negative feedback loop to realize DC maladjustment and eliminates.First via DC maladjustment cancellation loop comprises subtraction amplification circuit, and two-level concatenation variable gain amplifying unit sum-product intergrator is realized voltage negative feedback by subtraction circuit; The second tunnel DC maladjustment cancellation loop comprises two-level concatenation variable gain amplifying unit, output stage buffer, and integrator and transconductance cell, realize Current Negative Three-Point Capacitance by transconductance cell.
The integrator input resistance of described integrator negative feedback loop adopts active device to realize high resistant on sheet, and in integrator, the Miller effect of integrating capacitor and the high value of input resistance have reduced the impact of high pass corner frequency.The metal-oxide-semiconductor of the same type that utilizes unit gain follower and offset to grow much smaller than grid for grid width provides the biasing of grid source, thereby make the metal-oxide-semiconductor that is operated in sub-threshold region that M Ω level equivalent resistance can be provided, and the DC bias current of offset is PTAT electric current, make equivalent resistance there is temperature compensation characteristic.Amplify link and adopt the cascade of multistage variable gain amplifying unit, can realize high-gain and high-gain dynamic range; Automatic gain control feedback loop adopts charge pump construction, compares conventional peak detection architecture, has advantages of that the impact of technique, temperature deviation is little, accurately detect arrowband and broadband signal amplitude, be suitable for CMOS technique to realize; Eliminate DC maladjustment feedback loop and realized by two-way negative feedback, every road adopts integrator as low pass negative feedback; Integrator input resistance adopts active device to realize, and equivalent resistance has temperature compensation characteristic; This DC maladjustment is eliminated structure can effectively eliminate the DC maladjustment of front stage circuits stack and the DC maladjustment amount of amplifying link self, there is lower high pass corner frequency, low frequency signal loss amount is little, without the passive device of the outer high value resistor of sheet or electric capacity, has very high integrated level.
Substantial effect of the present invention is:
1, the automative interest increasing controlling circuit of high speed comparison circuit and charge pump composition can accurately detect high frequency or broadband signal amplitude, and it is little affected by the factors such as process deviation, simple in structure, and overcome prior art for realization increases integrating capacitor compared with low high pass corner frequency, expend the defect of larger chip area.
2, eliminate DC maladjustment feedback loop and adopt two-stage feedback loop, can gain by active control loop, reduce the impact of gain dynamic range on closed loop characteristic, especially the impact on high pass corner frequency, overcome the negative feedback mode of prior art elimination DC maladjustment structure employing RC low-pass filtering, between integrated level and low frequency signal loss amount, had the defect of contradiction.
3, the Miller effect of see-saw circuit in integrator, feedback capacity C expands 1+A
v, DCdoubly, the high value of integrator input resistance, has reduced the impact of high pass corner frequency, and has had temperature compensation characteristic.
4, the implementation of on-chip active high resistant, has improved chip integration.Automatic gain control feedback loop adopts charge pump construction, compare conventional peak detection architecture, having advantages of that the impact of technique, temperature deviation is little, accurately detect arrowband and broadband signal amplitude, be suitable for CMOS technique realizes, on-chip active high resistant is common to the CMOS technique of various characteristic sizes, has larger practicality.
5, automatic gain control amplifier of the present invention is suitable for the wireless communication receiver of zero-if architecture under CMOS technique.
Brief description of the drawings
Fig. 1 is the automatic gain control amplifier block diagram with DC maladjustment elimination function of existing common technology.Cascade is amplified link, automatic gain control feedback loop and is eliminated DC maladjustment feedback loop
Fig. 2 a is a kind of automatic gain control amplifier structured flowchart of eliminating DC maladjustment of the present invention.
Fig. 2 b is the automatic gain control amplifier circuit structure block diagram of the high integration with DC maladjustment elimination function of embodiment of the present invention monolithic.
Fig. 3 is the mutual conductance amplifying unit circuit principle of compositionality figure of the elimination DC maladjustment feedback loop of the embodiment of the present invention;
In Fig. 3,301-NMOS input difference pair, 302-current source.
Fig. 4 is the active high resistant circuit diagram of the integrator input resistance of embodiment of the present invention realization;
In Fig. 4: 4-on-chip active high resistant, 41-resistance, 42-offset, 43-follower, 44-current mirror, 45-PTAT current source.
Fig. 5 is the linear model block diagram that the embodiment of the present invention adopts the automatic gain control feedback loop of charge pump construction;
In Fig. 5: 501-input stage transformation model, the linear model of 502-multistage variable gain amplifying unit, 503-output stage transformation model, 504-comparison circuit, the linear model of 505-OR circuit, the linear model of 506-charge pump, the linear model of 507-V-I translation circuit, the logarithmic form of 508-charge pump control voltage.
Fig. 6 is general elimination negative feedback DC maladjustment structural model block diagram;
In Fig. 6: 601-first order variable gain amplifying unit, 602-second level variable gain amplifying unit, 60N-N level variable gain amplifying unit, output stage, 611-input stage adder circuit, 612-second level adder circuit, 61N-N level adder circuit, 621-integrator, 622-negative feedback loop adder circuit.
Fig. 7 eliminates the single-ended model framework chart of integrator in DC maladjustment negative feedback loop in the present invention;
In Fig. 7: 701-operational amplifier, 702-capacitor C, 703-resistance R.
Fig. 8 a is characteristic schematic diagram before high resistant temperature-compensating on its input chip of integrator of realizing of the present invention.
Fig. 8 b is characteristic schematic diagram after high resistant temperature-compensating on its input chip of integrator of realizing of the present invention.
Embodiment
Fig. 1 is the automatic gain control amplifier block diagram with DC maladjustment elimination function of existing common technology.Its imbalance is eliminated feedback circuit and is made up of transconductance cell Gm and capacitance-resistance filter, and AGC feedback circuit is made up of peak detector, transconductance cell Gm, integrating capacitor and V-I change-over circuit.The DC maladjustment that has of prior art is eliminated column defects under the automatic gain control amplifier existence of function: it is little that DC maladjustment is eliminated feedback loop DC current gain, therefore high pass corner frequency is higher, and the integrated level that capacitance-resistance filter is difficult on full sheet again requires the lower less lowpass frequency of realizing, therefore the closed loop high pass corner frequency of whole circuit is higher, and low frequency signal loss amount is large.
The present invention proposes a kind of automatic gain control amplifier of eliminating DC maladjustment, use comparator and charge pump to produce the automatic gain control structure of controlling voltage, this automatic gain control structure is subject to process deviation influence little, can accurately detect the amplitude of high frequency or broadband signal, the DC maladjustment for realizing with high integration is eliminated the automatic gain control of function.
Below in conjunction with drawings and Examples, technical scheme of the present invention is further described.
Fig. 2 a is a kind of automatic gain control amplifier structured flowchart of eliminating DC maladjustment of the present invention.This is a kind of automatic gain control amplifier circuit module with DC maladjustment elimination function, it comprises the cascade amplification link 21 being made up of input stage 201, multistage variable gain amplifying unit 202 and output stage 203, the automatic gain control feedback loop 22 being made up of comparison circuit 204 or door 205, charge pump 206 and V-I change-over circuit 207 and the elimination DC maladjustment feedback loop 23 being made up of first integrator 208, mutual conductance amplifying unit 209 and second integral device 210.
Fig. 2 b is a kind of automatic gain control amplifier circuit structure diagram of eliminating DC maladjustment of embodiment of the present invention monolithic, and this is a kind of automatic gain control amplifier circuit monolithic module with DC maladjustment elimination function of high integration.The cascade of the present embodiment is amplified link 24 and is adopted level Four cascade to amplify, and it is made up of subtraction amplifying unit 241, the variable gain amplifying unit 242～245 of level Four cascade and the buffer 246 of output stage of input stage.Automatic gain control feedback loop 25 by two comparators 251 and 252 or door 253, charge pump 254 and V-I change-over circuit 255 form.The second integral device 263 of eliminating high resistant 266 and 267 in DC maladjustment feedback loop 26 first integrators 261 by high resistant 264 and 265 in two input contact pin, mutual conductance amplification Gm unit 262 and two input contact pin forms.Cascade is amplified in link 24, the two-way output of subtraction amplification circuit 241 connects the two-way input of first order variable gain amplifying unit 242, the two-way successively of subtraction amplifying unit 241 and level Four variable gain amplifying unit 242～245 and output buffer stage 246 is connected in series, and forms cascade and amplifies link.Level Four variable gain amplifying unit intermediate contact A and the corresponding output of eliminating DC feedback loop mutual conductance amplification GM that is connected of B.In automatic gain control feedback loop 25, comparator 251 is connected with 252 output or door 253 input, or the output of door 253 connects K switch 1 and the K2 of charge pump 254, and the output of charge pump 254 connects the input of V-I change-over circuit 255.Eliminate in DC maladjustment feedback loop 26, high resistant 264 and 265 in two input contact pin of first integrator 261, two outputs of integrator 261 connect mutual conductance and amplify the two-way input of Gm level 262, and two-way output high resistant 266 in respective flap of mutual conductance amplification Gm level 262 is connected the two-way input of second integral device 263 with 267.
The subtraction amplification circuit 241 that link 24 input stages are amplified in cascade has four inputs on a road between two, and two inputs on a road connect input signal end V
iNPand V
iNN, corresponding two feedback output ends eliminating DC maladjustment feedback loop 26 second integral devices that connect of two inputs on another road.Cascade amplifies link 24 positive and negative two-way output and is connected to separately comparator 251 at a high speed ++ input and 252+-input, 252 ++ input and 251+-input, comparator 251 and 252-+input termination one tunnel reference level V
rEFP, comparator 251 and 252--input another road of termination reference level V
rEFNcomparator 251 is connected with 252 output or door 253 two-way input, or the output of the two-way of door 253 connects the two-way input of charge pump 254, discharging and recharging of two-way complementary control signal control charge pump 254 electric capacity, charge pump 254 outputs connect V-I change-over circuit 255 inputs, 255 outputs connect the control end of variable gain amplifying unit 242～245, form automatic gain control feedback loop, carry out gain-adjusted.Variable gain amplifying unit 243+,-output is connected with one end of 267 with the input resistance 266 of second integral device 263, second integral device 263-,+output connects subtraction amplifying unit 241--input ,+-input separately, form the first via and eliminate DC maladjustment feedback loop.Output stage buffer 246+,-output connects one end of input resistance 264 and 265 of first integrator 261, the two-way output of first integrator 261 connects the two-way input of mutual conductance amplifying unit 262, the two-way output of mutual conductance amplifying unit 262 connect separately variable gain amplifying unit 244+,-input, form the second tunnel and eliminate DC maladjustment feedback loop.Eliminating the automatic gain control amplifier circuit of DC maladjustment is fully differential form circuit structure, output buffer stage 246+,-output is the two-way output V that eliminates the automatic gain control amplifier of DC maladjustment
oUTPand V
oUTN.
As shown in Figure 3,301 is NMOS input difference pair to the mutual conductance amplifying unit circuit of the embodiment of the present invention, and current source 302 is setovered for differential pair provides tail current, and this circuit changes input difference voltage signal into output differential current signal.
Fig. 4 is integrator input resistance implementation circuit structure diagram of the present invention.Wherein, it is long much smaller than grid that PMOS manages 41 grid width, and large channel resistance can be provided, and 42 is the offset of diode type of attachment, for PMOS pipe 41 provides grid source bias voltage.43 is unit gain follower, unit gain follower 43 provides equal source voltage for PMOS pipe 41 and offset 42, current source 45 is PTAT current source, provides bias current by current mirror 44 for offset 42, thereby is that the equivalent source ohmic leakage of 41 pipes carries out temperature-compensating.In the time that in Fig. 4, PMOS pipe 41 is operated in sub-threshold region, its equivalent resistance R
eqbe directly proportional to (L/W), the grid width W < < grid width L of PMOS pipe 41, therefore equivalent resistance is very large, has realized on-chip active high resistant.Introduce after PTAT current source, adjusted design parameter, makes equivalent resistance and temperature positive correlation coefficient and negative correlation coefficient basic neutralisation, realizes equivalent resistance R
eqrealize temperature-compensating.
Fig. 5 is the automatic gain control feedback loop linear model block diagram that the embodiment of the present invention adopts charge pump construction.In frame, be the logarithmic form of signal, multiplication and division operation becomes the reducing that adds of logarithmic form, 502 is variable gain amplifier model, 501 realize the logarithmic transformation of signal for input stage, 503 realize the logarithmic transformation of signal for output stage, 507 and 508 logarithmic transformations for V-I conversion and control voltage signal, 504 is comparison circuit, 505 is the linear models that OR circuit and 506 is charge pump.V
rEFfor reference level, A
iNfor input signal amplitude, A
oUTfor amplitude output signal, x (t) is input signal amplitude A
iNlogarithmic form, y (t) is amplitude output signal A
oUTlogarithmic form, the logarithmic form that z is reference level, d is that amplitude output signal variable is to reference level V
rEFlogarithmic form.Charge pump is through the gain of the output current control multistage variable gain amplifying unit of V-I change-over circuit, make charge pump control voltage and variable gain amplifier gain be dB-Linear relation, there is fixing frequency-domain and time-domain response characteristic to realize automative interest increasing controlling circuit.
Further illustrate the specific embodiments of automatic gain control in conjunction with Fig. 2 a, Fig. 2 b and Fig. 5.
As shown in Figure 2 b, amplify link amplitude output signal when cascade and be greater than reference level V
rEFtime, control signals for comparator 251 and 252 warps or door 253 outputs are discharged charge pump 254, and the control lower voltage that V-I change-over circuit 255 is exported declines the gain of variable gain amplifying unit, and amplitude output signal reduces until be less than reference level.Otherwise, be less than reference level V
rEFtime, control signals for comparator 251 and 252 warps or door 253 outputs are to charge pump charging, and the control voltage that V-I change-over circuit 255 is exported raises, and makes the gain increase of variable gain amplifying unit, and amplitude output signal increases.In the time that output signal reaches certain amplitude, in one-period, charging voltage equates with discharge voltage, and the control voltage total variation of charge pump output is 0, and the gain that makes cascade amplify link reaches stable state.
According to the time domain differential expressions of the controlled voltage of described design above,
In formula, V
cfor the control voltage of charge pump output, C
pfor charge pump charge and discharge capacitance, I is charge pump charging current, k
v, k
v1and k
v2for conversion coefficient.
The linear model of setting up according to above formula as shown in Figure 5.Can obtain gaining when meeting dB-Linear and being linear relationship when controlling voltage and variable gain amplifying unit, automatic gain control feedback loop has fixing time domain and frequency domain response characteristic.Loop time constant τ is
In formula, C is charge pump charge and discharge capacitance value, and I is charging current value, k
vand k
g1be the fixed coefficient with physical circuit parameter correlation.The loop time constant τ calculating is also for being stationary value.
Fig. 6 is the linear model block diagram that negative feedback DC maladjustment is eliminated circuit, and N is variable gain amplifying unit progression, G
ibe i level variable gain amplifying unit, V
osirepresent the misalignment rate of introducings at different levels, V
oS, prerepresent the cumulative imbalance of prime, F represents feedback loop gain, ω
lCFrepresent feedback loop low-pass cut-off frequencies.Fig. 6 adopts negative feedback DC maladjustment to eliminate the multistage variable gain amplifying unit block diagram of structure, can obtain output signal expression formula and be
Output packet contains three parts: the signal component of high pass form, the misalignment rate of introducing through misalignment rates at different levels and the negative feedback loop of overdamping.Because the feedback of low-pass form does not exert an influence to cascade amplification link bandwidth, the imbalance that therefore feedback is introduced can be eliminated by increasing differential pair area mode, can ignore.And maximum misalignment rate is in output
High pass corner frequency is
ω
HCF＝ω
LCF[1+(G
1G
2…G
n)F]
Therefore feedback loop gain F is larger, and it is stronger that DC maladjustment is eliminated performance, and high pass corner frequency is larger, and low frequency signal loss amount is larger, and the receiver error rate increases.The present invention adopts integrator as negative feedback loop circuit, can solve this contradiction.
Fig. 7 is integrator structure block diagram.Fig. 7 has provided the single-ended model framework chart of embodiment integrator in elimination DC maladjustment negative feedback loop of the present invention, in Fig. 7: A
v, DCthe DC current gain of operational amplifier 701 in-integrator, ω
op-amplifier dominant pole angular frequency, S=j ω, represents frequency-region signal.Miller effect in the anti-phase operational amplification circuit of integrator, the distribution between feedback capacity C and input and output or parasitic capacitance are through the amplification of amplifier, and its equivalence expands 1+A to the capacitance of input
v, DCdoubly, chip occupying area is little.The integrating resistor R of integrator input access on-chip active high resistant, just can realize temperature-compensating, thereby reduce the deviation of the closed loop high pass corner frequency causing because of variations in temperature, generation substantial effect is: the high value of the Miller effect of integrating capacitor and input integral resistance in integrator, reduce the impact of high pass corner frequency, and there is temperature compensation characteristic.
Fig. 7 has provided the single-ended model structure block diagram of integrator in elimination DC maladjustment negative feedback loop of the present invention.The transfer function H (S) of the integrator shown in Fig. 7 is
Wherein, ω
h, ω
lbe respectively the angular frequency of integrator dominant pole and time limit, ω
intfor the low pass corner frequency of integrating resistor R and capacitor C formation, ω
h≈ (1+A
v, DC) ω
op,
now the DC current gain of integrator is A
v, DC, the feedback loop gain in corresponding diagram 6 is F.In view of operational amplifier DC current gain value is very large, integrator time limit can be ignored.Adopt integrator as the component parts of eliminating DC maladjustment feedback loop feedback loop, now high pass corner frequency ω
hCF, eqfor:
From above formula, high pass corner frequency ω
hCF, eqdo not increase and become large with feedback loop gain F, and misalignment rate is attenuated F doubly, realizes the high performance DC maladjustment of automatic gain control amplifier is eliminated.
The resistance of integrator input resistance and closed loop high pass corner frequency are inverse ratio, and therefore, integrator input resistance adopts high resistant on sheet to realize, and can reduce high pass corner frequency, thereby reduce low frequency signal loss amount, has improved integrated level simultaneously.
Fig. 8 a and Fig. 8 b have provided integrator input resistance the correlation curve of simulation result under temperature-compensating and not temperature compensated condition.From Fig. 8 a and Fig. 8 b, simulation result shows, the temperature-compensating that technical solution of the present invention realizes, makes resistance deviation be reduced in 5% by 15%～20%.Obviously, reduced the impact of high pass corner frequency.
Automatic gain control amplifier of the present invention is suitable for the wireless communication receiver of zero-if architecture under CMOS technique.
It will be understood by those skilled in the art that not deviating under the prerequisite of broad scope of the present invention, above-described embodiment is made to some changes.Thereby the present invention is not limited in disclosed specific embodiment.Its scope should contain appended claims limit core of the present invention and protection range in all changes.
Claims (10)
1. an automatic gain control amplifier of eliminating DC maladjustment, is characterized in that, it amplifies link (21), automatic gain control feedback loop (22) and elimination DC maladjustment feedback loop (23) by cascade and forms;
Described cascade is amplified link (21) and is comprised the input stage (201) that two road ports are connected in series successively, multistage variable gain amplifying unit (202) and output stage buffer (203);
Described automatic gain control feedback loop (22) comprises the comparison circuit (204) being connected in series successively, 2 outputs or door (205), charge pump (206) and V-I change-over circuit (207);
Described elimination DC maladjustment feedback loop (23) comprises the first integrator (208) that two road ports are connected in series successively, mutual conductance amplifying unit (209) and second integral device (210);
Input stage (201) is subtraction amplification circuit unit, and the electrode input end of its two-way input connects signal input part
v iNP with the positive feedback signal output of eliminating DC maladjustment feedback loop, the negative input of its two-way input of input stage (201) connects signal input part
v iNN with the negative-feedback signal output of eliminating DC maladjustment feedback loop, the input signal of two-way input and negative-feedback signal, realize subtraction process in input stage (201), the input of the connection multi-stage cascade variable gain amplifier unit of input stage (201) two-way output, realizes high-gain dynamic range and amplifies; The corresponding two-way input that connects output stage buffer (203) of two-way output of the variable gain amplifier unit of link (21) is amplified in cascade, the corresponding two-way input that connects automatic gain control feedback loop (22) and eliminate DC maladjustment feedback loop (23) of two-way output of output stage;
The output of V-I change-over circuit (207) connects every grade of control end of the multistage variable gain amplifying unit (202) in cascade amplification link (21), controls the overall gain on cascade amplifier chain road; Described comparison circuit (204) is 2 complementary fully differential comparators, and 2 comparator input terminal polarity are contrary; Each comparator one tunnel input termination output stage buffer (203) output, another road input all connects benchmark comparative level; The output of V-I change-over circuit (207) connects every grade of control end of multistage variable gain amplifying unit (202); V-I change-over circuit (207) will be controlled the control electric current that voltage transitions is multistage variable gain amplifying unit (202), realize the control to gain;
Eliminating DC maladjustment feedback loop (23) has two feedback loops, and each feedback loop has two-way input and output, multistage variable gain amplifying unit (202) is divided into two parts cascade variable gain amplifier also for two-way arranges intermediate contact, the output of output stage buffer (203) connects the input of first integrator, the output of first integrator (208) connects mutual conductance amplifying unit (209), first integrator output voltage is converted to negative feedback current by mutual conductance amplifying unit, the output of mutual conductance amplifying unit is connected to the intermediate contact of multistage variable gain amplifying unit (202), form and eliminate DC maladjustment the first feedback loop, realize the gain of the variable gain amplifier of cascade after negative feedback control intermediate contact, the multistage variable gain amplifying unit (202) of cascade connects the input of first integrator (208) through the output of output stage buffer (203), cascade variable gain amplifier output before multistage variable gain amplifying unit (202) intermediate contact connects the input of second integral device (210), the output of second integral device connects the input of input stage (201) subtraction amplification circuit, form and eliminate DC maladjustment the second feedback loop, realize the gain of negative feedback control multistage variable gain amplifying unit,
Integrator input resistance utilizes PMOS pipe source to leak equivalent resistance and realizes, this gate pmos is wide, and to be less than grid long, the bias PMOS Guan Weiqi being connected by another diode mode provides grid source bias voltage, unit gain follower ensures that PMOS pipe and the bias PMOS pipe source voltage of equivalent resistance equate, PTAT electric current provides bias current for bias PMOS pipe, for compensating equivalent resistance temperature deviation.
2. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1, is characterized in that, described output stage buffer, and it is the buffer of low gain and large bandwidth, for increasing rear class driving force, reduces the impact of load on bandwidth.
3. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1, it is characterized in that, described automatic gain control feedback loop is the automative interest increasing controlling circuit that adopts charge pump construction, charge pump is through the gain of the output current control multistage variable gain amplifying unit of V-I change-over circuit, make charge pump control voltage and variable gain amplifier gain be dB-Linear relation, there is fixing frequency-domain and time-domain response characteristic to realize automative interest increasing controlling circuit.
4. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1, it is characterized in that, described elimination DC maladjustment feedback loop is that two-way is eliminated DC maladjustment feedback negative feedback loop line structure, in the feedback loop of every road, all comprise two variable gain amplifying units, an integrator, the first via is eliminated in DC maladjustment feedback loop and is also comprised a transconductance cell, the second tunnel is eliminated in DC maladjustment feedback loop and is also comprised an adder circuit, two-way feedback loop gains and realizes the control to high pass corner frequency for control loop, thereby obtain less low frequency signal loss.
5. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 4, it is characterized in that, the first via is eliminated DC maladjustment feedback loop and is adopted mutual conductance amplifying unit (209) to realize negative feedback, the load using the output loading of multistage variable gain amplifying unit (202) intermediate contact place variable gain amplifying stage as mutual conductance amplifying unit (209).
6. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 4, it is characterized in that, described the second tunnel is eliminated DC maladjustment feedback loop and is adopted subtraction circuit to realize negative feedback, and gain around feedback is not subject to the impact of front stage circuits load.
7. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1, it is characterized in that, the mutual conductance amplifying unit (209) of described elimination DC maladjustment feedback loop (23) is that simple differencing is to transconductance structure, differential pair adopts tail current biasing, mutual conductance amplifying unit (209) adopt simple differencing to but not subtraction circuit realize, make to eliminate DC maladjustment feedback loop circuitry complexity low.
8. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1, it is characterized in that, first integrator (208) in described elimination DC maladjustment feedback loop (23) and second integral device (210) input resistance are on-chip active high resistant, active high resistant adopts the PTAT current source that is proportional to absolute temperature that bias current is provided, be used for realizing temperature-compensating, thereby reduce the deviation of the closed loop high pass corner frequency causing because of variations in temperature.
9. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1, it is characterized in that, first integrator (208) and second integral device (210) in described elimination DC maladjustment feedback loop are a pair of fully differential integrator, adopt passive device on full sheet, for realizing chip small size and high integration.
10. according to a kind of automatic gain control amplifier of eliminating DC maladjustment described in claim 1 or 4 or 5 or 6 or 8 or 9, it is characterized in that, described elimination DC maladjustment feedback loop (23) adopts the integrator of high resistant on input brace to eliminate circuit as degenerative high-pass filtering DC maladjustment, and high pass corner frequency is not with feedback loop gain
fincrease and become large, and misalignment rate is attenuated
fdoubly, having realized high-performance direct current imbalance eliminates.
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| CN113938212B (en) * | 2021-11-24 | 2023-03-28 | 华中科技大学 | Direct current offset eliminating circuit with switchable bandwidth |
| KR20240131507A (en) * | 2023-02-23 | 2024-09-02 | 국립한밭대학교 산학협력단 | Wideband and high linearity variable gain amplifier and method thereof |
| CN116938176B (en) * | 2023-06-29 | 2024-04-09 | 华中科技大学 | Real-time direct current offset calibration circuit without coupling capacitor |
| CN118214374B (en) * | 2024-05-16 | 2024-08-06 | 核芯互联科技(青岛)有限公司 | Full-correction analog front-end circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1411651A (en) * | 1999-11-12 | 2003-04-16 | Gct半导体公司 | Single chip CMOS transmitter/receiver and method of using same |
-
2011
- 2011-06-16 CN CN201110176664.XA patent/CN102790596B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1411651A (en) * | 1999-11-12 | 2003-04-16 | Gct半导体公司 | Single chip CMOS transmitter/receiver and method of using same |
Non-Patent Citations (4)
| Title |
|---|
| 一种增益可控音频前置放大器电路的设计;潘文光;《微电子学》;20100430;第40卷(第2期);第186页-第189页 * |
| 低功耗电荷泵可编程增益放大器的设计与实现;孟新等;《微电子学》;20081031;第38卷(第5期);第752页-第756页 * |
| 孟新等.低功耗电荷泵可编程增益放大器的设计与实现.《微电子学》.2008,第38卷(第5期), |
| 潘文光.一种增益可控音频前置放大器电路的设计.《微电子学》.2010,第40卷(第2期), |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3734837A1 (en) * | 2019-04-29 | 2020-11-04 | Nxp B.V. | Gain stage with offset cancellation circuit for a fixed high-pass pole |
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