CN102683276B - 一种像素驱动电路及其制备方法、阵列基板 - Google Patents
一种像素驱动电路及其制备方法、阵列基板 Download PDFInfo
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Abstract
本发明公开了一种像素驱动电路及其制备方法及阵列基板，像素驱动电路包括开关TFT和驱动TFT该方法包括：在基板上依次同时制作开关TFT和驱动TFT的栅极、栅绝缘GI层、氧化物半导体层、ESL层；同时开关TFT和驱动TFT的源极/漏极金属，经刻蚀所述开关TFT的漏极金属延伸覆盖在驱动TFT的栅极上方的GI层上；沉积保护层，利用过孔工艺将过孔处的保护层、开关TFT的漏极金属及GI层刻蚀掉，露出驱动TFT的栅极；在过孔处沉积连接开关TFT的漏极及驱动TFT的栅极的氧化铟锡ITO层。本发明增加了背板的开口率且降低了干刻刻蚀比的开发及工艺的复杂性。
Description
技术领域
本发明涉及显示技术领域，尤其涉及一种像素驱动电路及其制备方法、阵列基板。
背景技术
AMOLED（Active Matrix/Organic Light Emitting Diode，是有源矩阵/有机发光二极体面板）显示器的像素驱动电路通常采用TFT（Thin Film Transistor，薄膜场效应晶体管），TFT作为驱动OLED（Organic Light-Emitting Diode，有机发光二极管）、PLED（polymer light-emitting diode，高分子发光二极管）面板，与非晶硅相比，其载流子浓度是非晶硅的十倍。另外，TFT可通过溅射Sputter的方法制备，因此导入时无需大幅改变现有的液晶面板生产线。同时，由于没有离子注入及激光晶化等设备的限制，相对于多晶硅技术，更有利于大面积的玻璃背板的生产。
像素驱动电路包含两个TFT和一个存储电容，其中一个为开关TFT（Switching TFT），另一个为驱动TFT（Driving TFT）。在扫描线开启时，开关TFT的栅极上施加一定电压，电流从栅极流向漏极，并通过ITO层传输到驱动TFT，使驱动TFT导通，电流从栅极流向漏极，驱动TFT与存储电容连接，从而为电容充电，当扫描线关闭时，存储于电容中的电压仍能保持驱动TFT在导通状态，故能在一个画面内维持OLED的固定电流。
Switching TFT和Driving TFT由于处于不同层，因此Switching TFT和Driving TFT的跳层连接技术是关键技术。目前主要采用以下两种方式：
方式1：如图1-1～图1-7所示，主要包括以下过程：
在玻璃基板上沉积Switching TFT和Driving TFT的栅极（Gate）金属101并刻蚀，沉积栅绝缘（GI）层102，形成图1-1所示的截面图形；
在GI层102上Switching TFT的位置沉积氧化铟镓锌（IGZO）层103，利用湿法刻蚀对IGZO层103进行刻蚀，随后沉积ESL（刻蚀阻挡层）层104并刻蚀，形成如图1-2所示截面图形；
利用干刻技术，在Driving TFT的Gate金属101上的GI层102开口，形成如图1-3所示截面图形，并沉积Switching TFT的源极/漏极（S/D）金属105和Driving TFT的S/D（图中未示出），形成如图1-4所示截面图形；
然后沉积保护层（PVX层）106，形成如图1-5所示截面图形；进行过孔（Via Hole）刻蚀，露出Switching TFT的漏极和Driving TFT的栅极，形成如图1-6所示的截面图形；沉积ITO（Indium Tin Oxide，氧化铟锡）层107，形成如图1-7所示的截面图形，从而实现Switching TFT和Driving TFT的跳层连接。
此方法虽然可以实现Switching TFT和Driving TFT的跳层的可靠连接，但在Driving TFT的Gate金属的GI层上开口时，是需要在图1-2上添加一张掩膜MASK，采用掩膜工艺进行开口，不利于节约成本且降低了制备效率。
方式2：在玻璃基板上沉积Switching TFT和Driving TFT的Gate金属101并刻蚀，沉积GI层102，形成图1-1所示的截面图形；
在GI层102上Switching TFT的位置沉积IGZO层103，利用湿法刻蚀对IGZO层103进行刻蚀，沉积ESL层104并刻蚀，形成如图1-2所示截面图形；
沉积Switching TFT的源极/漏极（S/D）金属105和Driving TFT的S/D（图中未示出），随后沉积保护层106，形成如图2-1所示截面图形；进行过孔Via Hole刻蚀，利用干刻工艺采用的气氛环境对漏极（Drain）金属（如钼Mo金属）及GI层（纳米二氧化硅SiOx）、保护层（氮化硅SiNx）的不同的刻蚀比，在保证Drain金属未被刻蚀掉的前提下，将Driving TFT的Gate金属上的GI层刻蚀干净并形成通孔，形成如图2-2所示截面图形；随后沉积ITO层107，形成如图2-3所示截面图形，实现Switching TFT和Driving TFT的跳层连接。
虽然采用此方法可以减少一张MASK，但需要调节干刻工艺，提高干刻气氛对Mo金属及SiOx、SiNx的不同的刻蚀比，增加了工艺的复杂性。
发明内容
本发明提供一种像素驱动电路及其制备方法及阵列基板，用以高效率地实现开关TFT和驱动TFT的跳层连接。
本发明提供一种像素驱动电路的制备方法，所述像素驱动电路包括开关薄膜场效应晶体管TFT和驱动TFT包括：
在基板上依次同时制作开关TFT和驱动TFT的栅极、栅绝缘GI层、氧化物半导体层、刻蚀阻挡ESL层；
同时沉积开关TFT和驱动TFT的源极/漏极金属，经刻蚀所述开关TFT的漏极金属延伸覆盖在驱动TFT的栅极上方的GI层上；
沉积保护层，利用过孔工艺将过孔处的保护层、开关TFT的漏极金属及GI层刻蚀掉，露出驱动TFT的栅极；
在过孔处沉积连接开关TFT的漏极及驱动TFT的栅极的氧化铟锡ITO层。
本发明提供一种像素驱动电路，所述像素驱动电路包括开关薄膜场效应晶体管TFT和驱动TFT，所述开关TFT和驱动TFT均包括栅极、栅绝缘GI层、氧化物半导体层、刻蚀阻挡ESL层、源极/漏极，所述开关TFT的漏极经氧化铟锡ITO层与所述驱动TFT的栅极连接在一起，所述像素驱动电路采用上述像素驱动电路制备方法制备得到。
本发明提供一种阵列基板，所述阵列基板包括采用上述像素驱动电路制备方法制备得到的像素驱动电路。
利用本发明所提供的像素驱动电路及其制备方法及阵列基板，具有以下有益效果：
1)由于仅在驱动TFT的栅极上方开口，增加了背板的开口率；
2)由于仅在驱动TFT的栅极上方开口，刻蚀时不需要考虑对不同处刻蚀时的刻蚀比，减少SiOx及Mo金属的干刻刻蚀比的开发及工艺的复杂性；
3)在增加背板开口率和减少工艺复杂性的条件下，保证一个像素内，Switching TFT和Driving TFT的跳层连接。
附图说明
图1-1～图1-7为现有技术中采用方式1制备像素驱动电路过程中得到的截面图；
图2-1～图2-3为现有技术中采用方式2制备像素驱动电路过程中得到的截面图；
图3为本发明实施例像素驱动电路制备方法流程图；
图4-1～图4-4为本发明实施例像素驱动电路制备方法过程中得到的截面图；
图5为本发明实施例制备的像素驱动电路的俯视图。
具体实施方式
下面结合附图和实施例对本发明提供的像素驱动电路及其制备方法及阵列基板进行详细地说明。
本发明实施例提供的像素驱动电路的制备方法，所述像素驱动电路包括开关薄膜场效应晶体管TFT和驱动TFT，如图3所示，包括：
步骤301，在基板上依次同时制作开关TFT和驱动TFT的栅极、栅绝缘GI层、氧化物半导体层、刻蚀阻挡ESL层；
显示器的每个像素内具有一个像素驱动电路，像素驱动电路包括开关TFT和驱动TFT，开关TFT和驱动TFT采用相同的结构，不同的是开关TFT与数据扫描线连接，驱动TFT与存储电容连接。
步骤302，同时沉积开关TFT和驱动TFT的源极/漏极金属，经刻蚀所述开关TFT的漏极金属延伸覆盖在驱动TFT的栅极上方的GI层上；
在ESL上沉积开关TFT和驱动TFT的源极/漏极(S/D)金属，这样，在 开关TFT/驱动TFT的栅极上施加一定电压时，电流从开关TFT/驱动TFT的源极流向漏极。
步骤303，沉积保护层；
具体地，沉积的保护层覆盖整个阵列基板表面。
步骤304，利用过孔工艺将过孔处的保护层、开关TFT的漏极金属及GI层刻蚀掉，露出驱动TFT的栅极；
步骤305，在过孔处沉积连接开关TFT的漏极及驱动TFT的栅极的氧化铟锡ITO层。
本发明实施例提供的像素驱动电路制备方法，在开关TFT和驱动TFT的制作过程中，采用延长Switching TFT的Drain金属并覆盖在Driving TFT的Gate金属上，利用刻蚀技术在此位置上方开口，将保护层、S/D层及GI层刻蚀掉，形成通孔，使得Gate金属露于背板表面，然后沉积ITO，实现Switching TFT和Driving TFT的跳层连接，可见，由于本发明实施例可以优化以下问题：
1)由于仅在驱动TFT的栅极上方开口，增加了背板的开口率；
2)由于仅在驱动TFT上方开口，刻蚀时不需要考虑对不同处刻蚀时的刻蚀比，减少SiOx及Mo金属的干刻刻蚀比的开发及工艺的复杂性；
3)在增加背板开口率和减少工艺复杂性的条件下，保证一个像素内，Switching TFT和Driving TFT的跳层连接。
实施例1
下面结合图4-1～图4-4详细说明本发明实施例提供的像素电路的指标方法，详细过程如下：
1)在玻璃基板上沉积Gate金属并刻蚀，制作出开关TFT和驱动TFT的栅极201；
具体地，这里的栅极201包括开关TFT的栅极和驱动TFT的栅极，具体的刻蚀过程可以采用现有方法，这里不再详述。
优选地，具体采用金属钼Mo，或者采用钼Mo/铝Al/钼Mo制作开关TFT 和驱动TFT的栅极，其中Mo/Al/Mo是三层金属，分别是Mo金属层、Al层及Mo金属层，两层Mo金属起保护作用，而Al层起导电作用。
2)沉积开关TFT和驱动TFT的栅绝缘(GI)层202；
优选地，沉积的栅绝缘层202覆盖整个玻璃基板表面。
具体采用氮化硅SiNx或氧化硅SiOx制作GI层。
3)在GI层上沉积开关TFT和驱动TFT的氧化物半导体层203并进行刻蚀；
优选地，氧化物半导体层203可以采用氧化铟镓锌IGZO，也可采用氧化镓锌IZO等。
优选地，沉积IGZO层并利用湿法刻蚀进行刻蚀，刻蚀后的IGZO层在开关TFT和驱动TFT的栅极上方，且驱动TFT的栅极上方部分区域未被覆盖IGZO层，以方便开关TFT与驱动TFT的跳层连接。
本实施例为了清楚地表示开关TFT和驱动TFT的跳层连接，图4-1给出的是驱动TFT的栅极上方部分区域未被覆盖IGZO层的切面图。
4)在IGZO层上沉积刻蚀阻挡ESL层204并进行刻蚀；
优选地，刻蚀后的ESL层在开关TFT和驱动TFT的栅极上方，由于是在IGZO层上沉积ESL层，而驱动TFT的栅极上方部分区域未被覆盖IGZO层，因此驱动TFT的栅极上方部分区域也未被覆盖ESL层，以方便开关TFT与驱动TFT的跳层连接，ESL层具体采用氧化硅SiOx制作ESL层。
5)沉积开关TFT和驱动TFT的源极S/漏极D金属，经刻蚀所述开关TFT的漏极金属205延伸覆盖在驱动TFT的栅极上方的GI层上；
本发明实施例中，优选采用溅射Sputter技术沉积S/D金属并刻蚀，经过刻蚀后，保证Switching TFT的漏极Drain金属205覆盖在Driving TFT的gate金属上，得到如图4-1所示的截面图形，优选地，S/D金属采用金属Mo或采用Mo/Al/Mo，具体的刻蚀技术采用现有方法刻蚀过程即可，这里不再详述。
6)沉积保护层(PVX层)206；
如图4-2所示，本实施例中沉积的保护层206覆盖整个玻璃基板表面，优选地，具体采用氮化硅SiNx或氧化硅SiOx制作保护层。
7)采用干刻工艺在驱动TFT的栅极上方进行过孔Via Hole刻蚀，将ViaHole处的保护层、开关TFT的漏极金属及GI层刻蚀掉，形成通孔，露出驱动TFT的栅极，得到如图4-3所示的截面图形。
8)在过孔处沉积氧化铟锡ITO207，实现Switching TFT和Driving TFT的跳层连接，得到如图4-4所示的截面图形。
至此，制作出像素驱动电路的驱动TFT和驱动TFT并实现了跳层连接，进一步地，该像素驱动电路还包括存储电容，将驱动TFT与存储电容连接，从而能够实现像素驱动电路的功能，如图5所示一个像素内像素驱动电路的俯视图，开关TFT的漏极206通过过孔与驱动TFT的栅极连接。
实施例2
1)在玻璃基板上沉积Gate金属并刻蚀，制作出开关TFT和驱动TFT的栅极201；
具体地，这里的栅极201包括开关TFT的栅极和驱动TFT的栅极，具体的刻蚀过程可以采用现有方法，这里不再详述。
优选地，具体采用金属钼Mo，或者采用钼Mo/铝Al/钼Mo制作开关TFT和驱动TFT的栅极。
2)沉积开关TFT和驱动TFT的栅绝缘(GI)层202；
优选地，沉积的栅绝缘层202覆盖整个玻璃基板表面。
具体采用氮化硅SiNx或氧化硅SiOx制作GI层。
3)在GI层上沉积开关TFT和驱动TFT的氧化物半导体层203并进行刻蚀；
优选地，沉积IGZO层并利用湿法刻蚀进行刻蚀，刻蚀后的IGZO层在开关TFT和驱动TFT的栅极上方，且驱动TFT的栅极上方部分区域G未被覆盖IGZO层，以方便开关TFT与驱动TFT的跳层连接。
4)在IGZO层上沉积刻蚀阻挡ESL层204并进行刻蚀；
优选地，刻蚀后的ESL层在开关TFT和驱动TFT的栅极上方，由于是在IGZO层上沉积ESL层，而驱动TFT的栅极上方部分区域未被覆盖IGZO层，因此驱动TFT的栅极上方部分区域也未被覆盖ESL层，以方便开关TFT与驱动TFT的跳层连接，ESL层具体采用氧化硅SiOx制作ESL层。
本实施例为了清楚地表示开关TFT和驱动TFT的跳层连接，图4-1给出的是驱动TFT的栅极上方部分区域未被覆盖ESL层的切面图。
5)沉积开关TFT和驱动TFT的源极S/漏极D金属，经刻蚀所述开关TFT的漏极金属205延伸覆盖在驱动TFT的栅极上方的GI层上；
本发明实施例中，优选采用溅射Sputter技术沉积S/D金属并刻蚀，经过刻蚀后，保证Switching TFT的漏极Drain金属205覆盖在Driving TFT的gate金属上，得到如图4-1所示的截面图形，优选地，S/D金属采用金属Mo或采用Mo/Al/Mo，具体的刻蚀技术采用现有方法刻蚀过程即可，这里不再详述。
6)沉积保护层206；
如图4-2所示，本实施例中沉积的保护层206覆盖整个玻璃基板表面，优选地，具体采用氮化硅SiNx或氧化硅SiOx制作保护层。
7)在驱动TFT的栅极上方进行过孔Via Hole刻蚀，采用干刻工艺将过孔Via Hole处的保护层刻蚀掉，然后利用湿刻工艺将过孔Via Hole处的开关TFT的漏极金属完全刻蚀掉，最后利用干刻工艺将过孔处的GI层刻蚀掉，形成通孔，露出驱动TFT的栅极，得到如图4-3所示的截面图形。
8)在过孔处沉积氧化铟锡ITO207，实现Switching TFT和Driving TFT的跳层连接，得到如图4-4所示的截面图形。
本发明实施例上提及的湿刻工艺和干刻工艺具体可以采用现有工艺流程实现，这里不再详述刻蚀过程。
本发明实施例中还提供一种像素驱动电路，所述像素驱动电路包括开关薄膜场效应晶体管TFT和驱动TFT，所述开关TFT和驱动TFT均包括栅极、栅 绝缘GI层、氧化物半导体层、刻蚀阻挡ESL层、源极/漏极，所述开关TFT的漏极经氧化铟锡ITO层与所述驱动TFT的栅极连接在一起，所述像素驱动电路采用本发明实施例所提供的像素驱动电路制备方法制备得到，Switching TFT和Driving TFT共用一个通孔实现跳层连接，由于仅使用一个通孔，因此增加了背板的开口率。
本发明实施例还提供了一种阵列基板，所述阵列基板包括采用本发明实施例所提供的像素驱动电路制备方法得到的像素驱动电路。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。
Claims (10)
1.一种像素驱动电路的制备方法，所述像素驱动电路包括开关薄膜场效应晶体管TFT和驱动TFT，其特征在于，包括：
在基板上依次制作开关TFT和驱动TFT的栅极、开关TFT和驱动TFT的栅绝缘层、开关TFT和驱动TFT的氧化物半导体层、开关TFT和驱动TFT的刻蚀阻挡层；
同时沉积开关TFT和驱动TFT的源极/漏极金属，经刻蚀所述开关TFT的漏极金属延伸覆盖在驱动TFT的栅极上方的栅绝缘层上；
沉积保护层，利用过孔工艺将过孔处的保护层、开关TFT的漏极金属及栅绝缘层刻蚀掉，露出驱动TFT的栅极；
在过孔处沉积连接开关TFT的漏极及驱动TFT的栅极的氧化铟锡ITO层。
2.如权利要求1所述的方法，其特征在于，利用过孔工艺将过孔处的保护层、开关TFT的漏极金属及栅绝缘层刻蚀掉，具体包括：
采用干刻工艺在驱动TFT的栅极上方进行过孔刻蚀，将过孔处的保护层、开关TFT的漏极金属及栅绝缘层刻蚀掉，露出驱动TFT的栅极；或者
在驱动TFT的栅极上方进行过孔刻蚀，采用干刻工艺将过孔处的保护层刻蚀掉，然后利用湿刻工艺将过孔处的开关TFT的漏极金属刻蚀掉，最后利用干刻工艺将过孔处的栅绝缘层刻蚀掉，露出驱动TFT的栅极。
3.如权利要求1所述的方法，其特征在于，制作氧化物半导体层和刻蚀阻挡层具体包括：
在栅绝缘层上沉积氧化物半导体层并利用湿法刻蚀进行刻蚀，刻蚀后的氧化物半导体层在开关TFT和驱动TFT的栅极上方，且驱动TFT的栅极上方部分区域未被覆盖氧化物半导体层；
在氧化物半导体层上沉积刻蚀阻挡层并进行刻蚀，刻蚀后的刻蚀阻挡层在开关TFT的栅极和驱动TFT的栅极上方，且驱动TFT的栅极上方未被覆盖氧化物半导体层的区域未被覆盖刻蚀阻挡层。
4.如权利要求1所述的方法，其特征在于，具体采用金属钼Mo，或者采用钼Mo/铝Al/钼Mo制作开关TFT的栅极及驱动TFT的栅极。
5.如权利要求1所述的方法，其特征在于，具体采用氮化硅SiNx或氧化硅SiOx制作栅绝缘层。
6.如权利要求1所述的方法，其特征在于，具体采用氧化硅SiOx制作刻蚀阻挡层。
7.如权利要求1所述的方法，其特征在于，具体采用氮化硅SiNx或氧化硅SiOx制作保护层。
8.如权利要求1所述的方法，其特征在于，所述像素驱动电路还包括存储电容，还包括：
将所述驱动TFT与存储电容连接。
9.一种采用如权利要求1-8任一项所述的像素驱动电路制备方法得到的像素驱动电路，其特征在于，所述像素驱动电路包括开关薄膜场效应晶体管TFT和驱动TFT，所述开关TFT和驱动TFT均包括栅极、栅绝缘层、氧化物半导体层、刻蚀阻挡层、源极/漏极，所述开关TFT的漏极经驱动TFT栅极上方的通孔上的氧化铟锡ITO层与所述驱动TFT的栅极连接在一起。
10.一种阵列基板，其特征在于，所述阵列基板包括权利要求9所述像素驱动电路。
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