CN102629570A - Array substrate of FFS type thin-film transistor liquid crystal display and method for manufacturing the same - Google Patents
Array substrate of FFS type thin-film transistor liquid crystal display and method for manufacturing the same Download PDFInfo
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- CN102629570A CN102629570A CN2011101296343A CN201110129634A CN102629570A CN 102629570 A CN102629570 A CN 102629570A CN 2011101296343 A CN2011101296343 A CN 2011101296343A CN 201110129634 A CN201110129634 A CN 201110129634A CN 102629570 A CN102629570 A CN 102629570A
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Abstract
The embodiments of the invention, which relate to the liquid crystal display field, disclose an array substrate of a fridge field switching (FFS) type thin-film transistor liquid crystal display and a method for manufacturing the same. According to the invention, manufacturing of an array substrate of a thin-film transistor is realized by employing three-time composition processes, thereby shortening production time, improving production efficiency and substantially reducing production cost. The manufacturing method comprises the following steps: successively depositing a common electrode layer and a gate electrode layer on a substrate and forming a graph containing common electrodes, gate electrodes, a gate line and a common electrode wire by a composition process; depositing a gate insulation layer, an active layer and a source/drain metal layer and forming a graph containing a data line, a source/drain electrode, and a thin-film transistor channel region by the composition process; depositing a pixel electrode layer and forming a graph containing pixel electrodes by the composition process; and depositing a passivation layer.
Description
Technical field
The present invention relates to field of liquid crystal, relate in particular to a kind of FF S type thin-film transistor LCD device array substrate and manufacturing approach.
Background technology
Polytype LCD is arranged on market at present, and the type of drive and the display effect of every type LCD also have nothing in common with each other.Wherein, show FFS (Fringe Field Switching according to relevant test data; Fringe field switching) contrast of type Thin Film Transistor-LCD can reach 350: 1; The visual angle is that aperture opening ratio is more than 53%, and no color differnece more than 170 degree; This shows that the FFS Thin Film Transistor-LCD is a kind of LCD with outstanding display capabilities and display effect.
But the structure more complicated of FFS type Thin Film Transistor-LCD, processing step is more, realizes comparatively difficulty.As shown in Figure 1; Prior art provides a kind of FFS type pixel structure for thin film transistor liquid crystal display and manufacturing approach; Adopt five composition technologies to form array base palte during manufacturing; Its technical process is specially: pixel deposition electrode layer on substrate 206, through composition technology formation first time pixel electrode 201; The deposition gate electrode layer; Through the second time composition technology form gate electrode 204 and grid line: successive sedimentation gate insulation layer, semiconductor layer, doping semiconductor layer and source/leakage metal level; And through the data wire of composition technology formation for the third time, source/drain electrode and TFT (Thin Film Transistor is called for short TFT) raceway groove figure; Deposit passivation layer 203, and on passivation layer 203, form via hole through the 4th composition technology; The deposition common electrode layer forms public electrode 202 and public electrode wire 205 through the 5th composition technology, finally forms dot structure shown in Figure 1.
Because each composition technology all need be the figure transfer of mask plate to film pattern; And each layer film figure all need accurately cover on another layer film figure, therefore, and the use of five mask plates of technique scheme; Not only process is complicated; Prolong the production time, reduced production efficiency, also increased production cost greatly.
Summary of the invention
Embodiments of the invention technical problem to be solved is to provide a kind of FFS type thin-film transistor LCD device array substrate and manufacturing approach; Adopt the manufacturing that three times composition technology realizes thin-film transistor array base-plate; Thereby shortened the production time; Improve the controllability and the reliability of production efficiency and technology, greatly reduced production cost.
For solving the problems of the technologies described above, embodiments of the invention adopt following technical scheme:
A kind of manufacturing approach of FFS type thin-film transistor LCD device array substrate comprises:
On substrate, deposit common electrode layer and gate electrode layer successively, form the figure that comprises public electrode, gate electrode, grid line and public electrode wire through composition technology;
Deposition gate insulator, active layer and source/leakage metal level form the figure that comprises data wire, source/drain electrode and thin-film transistor channel region territory through composition technology;
The pixel deposition electrode layer comprises pattern of pixel electrodes through the formation of composition technology;
Deposit passivation layer.
The said operation that forms the figure comprise public electrode, gate electrode, grid line and public electrode wire through composition technology comprises step: deposition common electrode layer and gate electrode layer; The coating photoresist; Said photoresist is made public and development treatment, and said photoresist forms unexposed area, partial exposure area and complete exposure area after exposure; Remove said complete exposure area corresponding gate electrode layer and common electrode layer through etching technics; Said photoresist is carried out the ashing operation, remove the photoresist of said partial exposure area and the photoresist of a part of unexposed area, remove the corresponding gate electrode layer of said partial exposure area through etching technics then, form public electrode; Remove the residue photoresist in the said unexposed area at last, form gate electrode and grid line, public electrode wire.
The said operation that forms the figure comprise data wire, source/drain electrode and thin-film transistor channel region territory through composition technology comprises step: deposition gate insulator, active layer and source/leakage metal level; And coating photoresist; Said photoresist is made public and development treatment, and said photoresist forms unexposed area, partial exposure area and complete exposure area after exposure; Remove the source-drain electrode layer and the active layer of said complete exposure area earlier through etching technics; Light glue at said quarter is carried out ashing operation with the photoresist of removing said partial exposure area and the photoresist of a part of unexposed area; Remove the source-drain electrode layer and the part active layer of said partial exposure area again through etching technics, form the thin-film transistor channel region territory; Remove the remaining photoresist of said unexposed area at last, form source electrode and drain electrode.
The figure of said pixel electrode and public electrode is staggered.
Said public electrode, public electrode wire, gate electrode and grid line are formed on the described substrate, and said public electrode is connected with said public electrode wire, and gate electrode is connected with said grid line.
The top that said pixel electrode part is positioned at said source/drain electrode is connected with the drain electrode of said source/drain electrode, and another part is formed on the said gate insulator.
Said active layer comprises semiconductor layer and doping semiconductor layer.
A kind of FFS type thin-film transistor LCD device array substrate comprises:
Substrate, public electrode, public electrode wire, gate electrode, grid line, gate insulator, active layer, source/drain electrode, thin-film transistor channel region territory, pixel electrode and passivation layer,
Said public electrode, public electrode wire, gate electrode and grid line are formed on the described substrate, and said public electrode is connected with said public electrode wire, and gate electrode is connected with said grid line;
Said gate insulator is formed on the said substrate, and covers said public electrode and gate electrode;
Said active layer is formed on the said gate insulator, and said source/drain electrode is formed on the said active layer;
The top that said pixel electrode part is positioned at said source/drain electrode is connected with the drain electrode of said source/drain electrode, and another part is formed on the said gate insulator.
Said passivation layer covers said pixel electrode, source/drain electrode and gate insulator.
The figure of said pixel electrode and public electrode is staggered.
Said active layer comprises semiconductor layer and doping semiconductor layer.
The FFS type thin-film transistor LCD device array substrate of the embodiment of the invention; Through improving the structure of array base palte; Thereby in manufacture process, reduced exposure frequency and processing step, adopted the manufacturing that three times composition technology just can be accomplished thin-film transistor array base-plate, shortened the production time greatly; Improve the controllability and the reliability of production efficiency and technology, reduced production cost.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the sketch map of the FFS type thin-film transistor LCD device array substrate of prior art;
Fig. 2 is the flow chart of the manufacturing approach of FFS type thin-film transistor LCD device array substrate in the embodiment of the invention;
Fig. 3 is the structural representation of FFS type thin-film transistor LCD device array substrate in the embodiment of the invention;
Fig. 4 be in the embodiment of the invention in the FFS type thin-film transistor LCD device array substrate manufacture process through the sketch map of photoetching for the first time;
Fig. 5 be in the embodiment of the invention in the FFS type thin-film transistor LCD device array substrate manufacture process through the sketch map of etching for the first time;
Fig. 6 be in the embodiment of the invention in the FFS type thin-film transistor LCD device array substrate manufacture process through the sketch map of photoetching for the second time;
Fig. 7 be in the embodiment of the invention in the FFS type thin-film transistor LCD device array substrate manufacture process through the sketch map of etching for the second time;
Fig. 8 be in the embodiment of the invention in the FFS type thin-film transistor LCD device array substrate manufacture process through the sketch map of photoetching for the third time;
Fig. 9 be in the embodiment of the invention in the FFS type thin-film transistor LCD device array substrate manufacture process through the sketch map of etching for the third time.
Description of reference numerals:
1, substrate 2, common electrode layer 21, public electrode 3, gate electrode layer 31, gate electrode 32, grid line 33, public electrode wire 4, gate insulator 5, semiconductor layer 6, doping semiconductor layer 7, source-drain electrode layer 7a, source electrode 7b, drain electrode 8, pixel electrode layer 81, pixel electrode 9, passivation layer 10, photoresist 110, first mask plate 111, second mask plate 112, the 3rd mask plate 12, thin-film transistor channel region territory 15, photoresist 16, photoresist
Embodiment
The embodiment of the invention provides a kind of FFS type thin-film transistor LCD device array substrate and manufacturing approach; Adopt the manufacturing that three times composition technology realizes thin-film transistor array base-plate; Thereby shortened the production time; Improve the controllability and the reliability of production efficiency and technology, greatly reduced production cost.
Below in conjunction with accompanying drawing the embodiment of the invention is done detailed description.
Embodiment one
Present embodiment provides a kind of manufacturing approach of FFS type thin-film transistor LCD device array substrate, and as shown in Figures 2 and 3, this method comprises:
For instance; At first on substrate 1, deposit common electrode layer and gate electrode layer successively; Be coated with photoresist then, adopt first mask plate that has halftoning or partly see through that photoresist is made public and confirm the position and the figure of gate electrode 31, grid line, public electrode 21 and public electrode wire with development treatment.Remove corresponding electrode layer and photoresist through technologies such as etchings then, the final figure that on substrate 1, forms public electrode 21, gate electrode 31, reaches grid line, public electrode wire.
On the substrate that step 101 obtains, deposit gate insulator 4, active layer and source/leakage metal level successively; Wherein active layer comprises semiconductor layer 5 and doping semiconductor layer 6; And coating photoresist; Adopt second mask plate that has halftoning or partly see through that photoresist is made public and development treatment then; The position and the figure in specified data line, source/drain electrode, thin-film transistor channel region territory 12 form the figure in final data line, source/drain electrode, thin-film transistor channel region territory 12 again through technology such as etching.
Pixel deposition electrode layer on the substrate that step 102 obtains, and coating photoresist adopt the 3rd mask plate that has halftoning or partly see through that photoresist is made public and development treatment then, confirm the position and the figure of pixel electrode 81; Form the figure of final pixel electrode 81 again through technologies such as etchings.
Last deposit passivation layer 9 covers pixel electrode 81, source/drain electrode and gate insulator 4.
The manufacturing approach of the FFS type thin-film transistor LCD device array substrate of present embodiment deposits earlier common electrode layer and gate electrode layer successively on substrate, form the figure that comprises public electrode, gate electrode, grid line and public electrode wire through composition technology; Deposition gate insulator, active layer and source/leakage metal level form the figure that comprises data wire, source/drain electrode and thin-film transistor channel region territory through composition technology; The pixel deposition electrode layer comprises pattern of pixel electrodes through the formation of composition technology; Deposit passivation layer promptly adopts the manufacturing that three times composition technology realizes thin-film transistor array base-plate, thereby has shortened the production time, has improved the controllability and the reliability of production efficiency and technology, greatly reduces production cost.
Embodiment two
Present embodiment provides a kind of FFS type thin-film transistor LCD device array substrate, and as shown in Figure 3, this array base palte comprises:
Parts such as the pixel electrode 81 that all parts on passivation layer 9 covered substrates 1 form with protection, source/drain electrode.
The FFS type thin-film transistor LCD device array substrate of present embodiment; Public electrode, public electrode wire, gate electrode and grid line are formed on the substrate; The top that pixel electrode part is positioned at source/drain electrode is connected with the drain electrode of source/drain electrode; Another part is formed on the gate insulator, and through improving the structure of array base palte, the FFS type thin-film transistor LCD device array substrate of present embodiment has reduced exposure frequency and processing step in manufacture process; Adopt the manufacturing that three times composition technology just can be accomplished thin-film transistor array base-plate; Shorten the production time greatly, improved the controllability and the reliability of production efficiency and technology, reduced production cost.In addition, the FFS type thin-film transistor LCD device array substrate of the embodiment of the invention can also reduce the distance between pixel electrode and the public electrode, reduces driving voltage value.
Embodiment three
Present embodiment provides a kind of manufacturing approach of FFS type thin-film transistor LCD device array substrate, like Fig. 2-shown in Figure 9.
As shown in Figure 4, at first on substrate, 1 deposit common electrode layer 2 and gate electrode layer 3 successively, be coated with photoresist 10 then, photoresist 10 is made public and development treatment.Adopt first mask plate 110 that has halftoning or partly see through on photoresist 10, to form three zones during exposure: unexposed area, partial exposure area, complete exposure area.After photoresist 10 developed, the photoresist thickness of its unexposed area did not change, the reservation fully of its photoresist 10; The photoresist thickness of partial exposure area can reduce a part, and the part of its photoresist 10 keeps; The photoresist of complete exposure area is removed fully.In this step, the corresponding gate electrode 31 of unexposed area, grid line 33 and public electrode wire 32 regions, the corresponding public electrode of partial exposure area 21 regions.Like this, through exposure in the photoetching process and development treatment, just confirmed the position and the figure of gate electrode 31, grid line 33, public electrode wire 32 and public electrode 21.
Behind the position and figure of confirming gate electrode 31, grid line 33, public electrode wire 32 and public electrode 21, as shown in Figure 5, remove complete exposure area corresponding gate electrode layer 3 and common electrode layer 2 through etching technics earlier; Photoresist is carried out the operation of ashing for the first time with the photoresist of removal partial exposure area and the photoresist of a part of unexposed area; Remove the photoresist 10 of partial exposure area; Remove the corresponding gate electrode layer 3 of partial exposure area through etching technics then; Expose this regional common electrode layer 2, form public electrode 21; Remove the remaining photoresist 10 of unexposed area at last, form gate electrode 31 and grid line 33, public electrode wire 32.Visible by above-mentioned steps, gate electrode 31, grid line 33 and public electrode wire 32 are formed by original common electrode layer 2 and the gate electrode layer 3 common composition technologies of passing through, and public electrode 21 is formed through composition technology by original common electrode layer 2.
As shown in Figure 6; Next on the substrate of above-mentioned processing, deposit gate insulator 4, active layer and source/leakage metal level 7 successively what obtain; Wherein active layer comprises semiconductor layer 5 and doping semiconductor layer 6, and coating photoresist 15, adopts the 111 pairs of photoresists 15 of second mask plate that have halftoning or partly see through to make public then; On photoresist 15, to form unexposed area, partial exposure area and complete exposure area, carry out subsequently photoresist 15 is carried out development treatment.In this step, unexposed area respective data lines, source/drain electrode region, 12 regions, the corresponding thin-film transistor channel region territory of partial exposure area.Like this, through exposure in the photoetching process and development treatment, just confirmed position and the figure in data wire, source/drain electrode, thin-film transistor channel region territory 12.
Behind the position and figure of having confirmed data wire, source/drain electrode, thin-film transistor channel region territory 12, as shown in Figure 7, remove source-drain electrode layer 7, semiconductor layer 5 and the doping semiconductor layer 6 of complete exposure area earlier through etching technics; Again photoresist is carried out the operation of ashing for the second time with the photoresist of removal partial exposure area and the photoresist of a part of unexposed area; Remove the photoresist 15 of partial exposure area; The source-drain electrode layer of exposed portions serve exposure area through source-drain electrode layer 7, the doping semiconductor layer 6 of etching technics removal partial exposure area, forms thin-film transistor channel region territory 12 again; Remove the remaining photoresist 15 of unexposed area at last, form source electrode 7a and drain electrode 7b.Through the processing in this step, active layer is formed on the gate insulator 4, and source electrode 7a and drain electrode 7b are formed on the active layer.
As shown in Figure 8; Next the pixel deposition electrode layer 8 on the substrate of above-mentioned processing that is obtaining; And coating photoresist 16; Adopt 112 pairs of photoresists 16 of the 3rd mask plate to make public then,, carry out subsequently photoresist 16 is carried out development treatment on photoresist 16, to form unexposed area and complete exposure area.In this step, unexposed area respective pixel electrode 81 regions.Like this, through exposure in the photoetching process and development treatment, just confirmed the position and the figure of pixel electrode 81.
Behind the position and figure of having confirmed pixel electrode 81, as shown in Figure 9, pass through the pixel electrode layer 8 that etching technics is removed complete exposure area earlier; Remove the photoresist 16 in the unexposed area again, form pixel electrode 81.Through the processing in this step, the top that pixel electrode 81 parts are positioned at source/drain electrode is connected with the drain electrode 7b of source/drain electrode, and another part is formed on the gate insulator 4.
Last deposit passivation layer 9 covers pixel electrode 81, source/drain electrode and gate insulator 4, finally accomplishes the manufacturing of the FFS type thin-film transistor LCD device array substrate of the embodiment of the invention shown in Figure 3.
The manufacturing approach of the FFS type thin-film transistor LCD device array substrate of present embodiment deposits earlier common electrode layer and gate electrode layer successively on substrate, form the figure that comprises public electrode, gate electrode, grid line and public electrode wire through composition technology; Deposition gate insulator, active layer and source/leakage metal level form the figure that comprises data wire, source/drain electrode and thin-film transistor channel region territory through composition technology; The pixel deposition electrode layer comprises pattern of pixel electrodes through the formation of composition technology; Deposit passivation layer; Promptly adopt the manufacturing that three times composition technology realizes thin-film transistor array base-plate; Thereby shortened the production time; And the manufacturing approach of present embodiment FFS type thin-film transistor LCD device array substrate has improved the controllability and the reliability of production efficiency and technology, greatly reduces production cost.
The above; Be merely embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technical staff who is familiar with the present technique field is in the technical scope that the present invention discloses; Can expect easily changing or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by said protection range with claim.
Claims (10)
1. the manufacturing approach of a FFS type thin-film transistor LCD device array substrate is characterized in that, comprising:
On substrate, deposit common electrode layer and gate electrode layer successively, form the figure that comprises public electrode, gate electrode, grid line and public electrode wire through composition technology;
Deposition gate insulator, active layer and source/leakage metal level form the figure that comprises data wire, source/drain electrode and thin-film transistor channel region territory through composition technology;
The pixel deposition electrode layer comprises pattern of pixel electrodes through the formation of composition technology;
Deposit passivation layer.
2. the manufacturing approach of FFS type thin-film transistor LCD device array substrate according to claim 1; It is characterized in that; The said operation that forms the figure comprise public electrode, gate electrode, grid line and public electrode wire through composition technology comprises step: deposition common electrode layer and gate electrode layer; The coating photoresist makes public and development treatment to said photoresist, and said photoresist forms unexposed area, partial exposure area and complete exposure area after exposure; Remove said complete exposure area corresponding gate electrode layer and common electrode layer through etching technics; Said photoresist is carried out the ashing operation, remove the photoresist of said partial exposure area and the photoresist of a part of unexposed area, remove the corresponding gate electrode layer of said partial exposure area through etching technics then, form public electrode; Remove the residue photoresist in the said unexposed area at last, form gate electrode and grid line, public electrode wire.
3. the manufacturing approach of FFS type thin-film transistor LCD device array substrate according to claim 1; It is characterized in that; The said operation that forms the figure comprise data wire, source/drain electrode and thin-film transistor channel region territory through composition technology comprises step: deposition gate insulator, active layer and source/leakage metal level; And coating photoresist; Said photoresist is made public and development treatment, and said photoresist forms unexposed area, partial exposure area and complete exposure area after exposure; Earlier remove the source-drain electrode layer and the active layer of complete said exposure area through etching technics; Said photoresist is carried out ashing operation with the photoresist of removing said partial exposure area and the photoresist of a part of unexposed area; Remove the source-drain electrode layer and the part active layer of said partial exposure area again through etching technics, form the thin-film transistor channel region territory; Remove the remaining photoresist of said unexposed area at last, form source electrode and drain electrode.
4. the manufacturing approach of FFS type thin-film transistor LCD device array substrate according to claim 1; It is characterized in that; Said public electrode, public electrode wire, gate electrode and grid line are formed on the described substrate; Said public electrode is connected with said public electrode wire, and gate electrode is connected with said grid line.
5. the manufacturing approach of FFS type thin-film transistor LCD device array substrate according to claim 1; It is characterized in that; The top that said pixel electrode part is positioned at said source/drain electrode is connected with the drain electrode of said source/drain electrode, and another part is formed on the said gate insulator.
6. the manufacturing approach of FFS type thin-film transistor LCD device array substrate according to claim 1 is characterized in that said active layer comprises semiconductor layer and doping semiconductor layer.
7. FFS type thin-film transistor LCD device array substrate comprises:
Substrate, public electrode, public electrode wire, gate electrode, grid line, gate insulator, active layer, source/drain electrode, thin-film transistor channel region territory, pixel electrode and passivation layer is characterized in that,
Said public electrode, public electrode wire, gate electrode and grid line are formed on the described substrate, and said public electrode is connected with said public electrode wire, and gate electrode is connected with said grid line;
Said gate insulator is formed on the said substrate, and covers said public electrode and gate electrode;
Said active layer is formed on the said gate insulator, and said source/drain electrode is formed on the said active layer;
The top that said pixel electrode part is positioned at said source/drain electrode is connected with the drain electrode of said source/drain electrode, and another part is formed on the said gate insulator.
8. FFS type thin-film transistor LCD device array substrate according to claim 7 is characterized in that said passivation layer covers said pixel electrode, source/drain electrode and gate insulator.
9. FFS type thin-film transistor LCD device array substrate according to claim 7 is characterized in that the figure of said pixel electrode and public electrode is staggered.
10. FFS type thin-film transistor LCD device array substrate according to claim 7 is characterized in that said active layer comprises semiconductor layer and doping semiconductor layer.
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| CN102929056A (en) * | 2012-11-09 | 2013-02-13 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method and display device thereof |
| WO2013117004A1 (en) * | 2012-02-07 | 2013-08-15 | 深圳市华星光电技术有限公司 | Method for manufacturing tft array substrate |
| CN104617115A (en) * | 2015-03-02 | 2015-05-13 | 深圳市华星光电技术有限公司 | FFS type thin film transistor array substrate and preparation method thereof |
| CN105870058A (en) * | 2016-06-08 | 2016-08-17 | 昆山龙腾光电有限公司 | Production method of thin film transistor array substrate |
| CN106098706A (en) * | 2016-07-22 | 2016-11-09 | 京东方科技集团股份有限公司 | A kind of array base palte and preparation method thereof, display device |
| WO2017020322A1 (en) * | 2015-07-31 | 2017-02-09 | 深圳市华星光电技术有限公司 | Ffs array substrate, manufacturing method therefor, and display device |
| CN107402482A (en) * | 2016-05-19 | 2017-11-28 | 三星显示有限公司 | Display base plate with improved manufacturability |
| CN108269764A (en) * | 2018-02-01 | 2018-07-10 | 京东方科技集团股份有限公司 | A kind of production method of display panel, display panel and display device |
| GB2566673A (en) * | 2017-07-21 | 2019-03-27 | Flexenable Ltd | Thin-film transistor (TFT) architecture for liquid crystal displays |
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| WO2013117004A1 (en) * | 2012-02-07 | 2013-08-15 | 深圳市华星光电技术有限公司 | Method for manufacturing tft array substrate |
| CN102929056B (en) * | 2012-11-09 | 2016-11-16 | 京东方科技集团股份有限公司 | A kind of array base palte and manufacture method, display device |
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| CN104617115A (en) * | 2015-03-02 | 2015-05-13 | 深圳市华星光电技术有限公司 | FFS type thin film transistor array substrate and preparation method thereof |
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| WO2017020322A1 (en) * | 2015-07-31 | 2017-02-09 | 深圳市华星光电技术有限公司 | Ffs array substrate, manufacturing method therefor, and display device |
| CN107402482A (en) * | 2016-05-19 | 2017-11-28 | 三星显示有限公司 | Display base plate with improved manufacturability |
| CN105870058A (en) * | 2016-06-08 | 2016-08-17 | 昆山龙腾光电有限公司 | Production method of thin film transistor array substrate |
| CN105870058B (en) * | 2016-06-08 | 2018-12-18 | 昆山龙腾光电有限公司 | The production method of thin-film transistor array base-plate |
| CN106098706A (en) * | 2016-07-22 | 2016-11-09 | 京东方科技集团股份有限公司 | A kind of array base palte and preparation method thereof, display device |
| CN106098706B (en) * | 2016-07-22 | 2019-02-22 | 京东方科技集团股份有限公司 | A kind of array substrate and preparation method thereof, display device |
| GB2566673A (en) * | 2017-07-21 | 2019-03-27 | Flexenable Ltd | Thin-film transistor (TFT) architecture for liquid crystal displays |
| CN111051976A (en) * | 2017-07-21 | 2020-04-21 | 弗莱克因艾伯勒有限公司 | Thin Film Transistor (TFT) architecture for liquid crystal displays |
| GB2566673B (en) * | 2017-07-21 | 2022-10-26 | Flexenable Ltd | Thin-Film Transistor (TFT) Architecture for Liquid Crystal Displays |
| US11768408B2 (en) | 2017-07-21 | 2023-09-26 | Flexenable Technology Limited | Thin-film transistor (TFT) architecture for liquid crystal displays |
| CN108269764A (en) * | 2018-02-01 | 2018-07-10 | 京东方科技集团股份有限公司 | A kind of production method of display panel, display panel and display device |
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Application publication date: 20120808 |