CN102623309B - Manufacturing method of end terminal of high voltage power semiconductor device and special cutting tool for the same - Google Patents
Manufacturing method of end terminal of high voltage power semiconductor device and special cutting tool for the same Download PDFInfo
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- CN102623309B CN102623309B CN201210108065.9A CN201210108065A CN102623309B CN 102623309 B CN102623309 B CN 102623309B CN 201210108065 A CN201210108065 A CN 201210108065A CN 102623309 B CN102623309 B CN 102623309B
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Abstract
The invention discloses a manufacturing method of an end terminal of a high voltage power semiconductor device and a special cutting tool for the manufacturing method, and belongs to the technical field of manufacturing processes of semiconductor switching devices. The manufacturing method mainly comprises the steps as follows: firstly, double-faced metal electrodes are made on the two faces of a positive-negative (PN) junction by using a general method; secondly, the end terminal is ground by using the special cutting tool; thirdly, the outer surface of the end terminal is processed; and fourthly, a protective layer is formed. According to the method, the special cutting tool with a certain angle is adopted to grind and cut a silicon wafer, so that the end terminal with special angle modeling is obtained; and afterwards, the end terminal is corroded, polished, coated with glue on the surface and passivated, and then the modeling is completed. The process steps are simple; and as end terminals with small chip areas can be processed by using the special cutting tool and the yield is high, the manufacturing cost is reduced.
Description
Technical field
The invention belongs to novel semi-conductor switching device manufacturing process technology field, particularly relate to a kind of knot terminal manufacture method and dedicated tool of high voltage power semiconductor device.
Background technology
In high voltage power semiconductor device, the sweep of knot seriously limits the puncture voltage of planar junction.In order to improve the blocking ability of planar semiconductor device, up to now, develop many high voltage terminal techniques, as field limiting ring method (FLR), field plate method (FP), inclined-plane molding, corrosion molding, knot termination extension method, semi-insulating polysilicon technology (SIPOS), knot termination extension technology (JTE), weaken surface field technology (RESURF) and variety lateral doping technology (VLD) etc.
Among these techniques, FLR structure is widely used in modern power semiconductor device, because it and planar technique are completely compatible, but, owing to will consider a lot of parameter simultaneously, will by analytic method be optimized design be very difficult, particularly for multiple field limiting ring system, field restriction guard ring structure is very responsive to ring spacing, and the positive charge in surface insulation dielectric layer all has a significant impact interannular current potential and Electric Field Distribution, in addition the factor introducing positive charge in normal process is a lot, make the requirement of field restriction guard ring structure effects on surface passivation technology very high, because this increasing the complexity of technique.
Field plate structure is then very responsive to oxidated layer thickness, in order to obtain optimum efficiency, will increase the complexity of technique equally, and diffused guard ring and floating field limiting ring increase junction capacitance and electric leakage, is not suitable for supper-fast device and uses; Corrode shaping need precise hard_drawn tuhes to corrode the degree of depth and position in planar junction, therefore compare and be difficult to be formed; And the electric leakage of tying termination extension formation is comparatively large, also less use.And there is the shortcomings such as complex process, parasitic parameter are large equally in SIPOS method, JTE method, RESURF method and be not suitable for supper-fast device and use.
When the manufacture of the supper-fast high voltage power semiconductor switching device of subnanosecond level, in order to improve the conducting speed of device, all will reduce electric capacity, therefore chip is as far as possible little, and knot terminal Modeling Technology should not increase its parasitic parameter; Require that device has high voltage blocking capability, therefore the choosing of knot terminal Modeling Technology of device seems particularly important simultaneously.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of knot terminal manufacture method and dedicated tool of high voltage power semiconductor device, can manufacture the knot terminal of little chip area easily and fast, technique is simple, rate of finished products is high, low cost of manufacture.
For solving the problems of the technologies described above, the technical solution used in the present invention is: a kind of knot terminal manufacture method of high voltage power semiconductor device, is characterized in that comprising the following steps:
Step one: adopt common diffusion or the PN junction structure needed for the making of injection technology method, and carry out double-sided metal electrode at the upper and lower surface of PN junction;
Step 2: use cutter to cut knot terminal, is cut into trapezoidal by the vertical section of PN junction in knot terminal;
Step 3: the outer surface of two metal electrodes of knot terminal after dicing smears protecting glue, conventional silicon polishing corrosive liquid is adopted to carry out short time, fast erosion to the outer surface of PN junction after glue dry solidification to be protected, after eroding damage layer, rapid, high volume is washed by water and is dewatered;
Step 4: smear insulation protection glue and solidify on the grinding inclined-plane of PN junction.
Described cutter is milling cutter, constantly smears the SiC grinding material aqueous solution in the process of milling cutter grinding and cutting.
Described insulation protection glue is thin-layer silicon rubber.
A kind of knot terminal of high voltage power semiconductor device manufactures dedicated tool, comprise handle of a knife and cutter head, described handle of a knife is provided with the blind hole be connected with driving mechanism, it is characterized in that the front end of described cutter head is provided with grinding hole, the front end of grinding hole vertical section is that trapezoidal rear end is suitable with knot terminal, cutter head be blade foremost.
The beneficial effect adopting technique scheme to produce is: described method adopts the dedicated tool with certain angle, grinding and cutting is carried out to knot terminal, obtain the knot terminal with special angle moulding, afterwards etch polishing is carried out to this knot terminal, surface coating passivation can complete moulding.Processing step is simple, and without the need to the photoetching technique of complexity, due to the knot terminal using dedicated tool can process less chip area, and rate of finished products is high, thus reduces manufacturing cost.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
Fig. 1 is the sectional structure schematic diagram that the present invention ties terminal;
Fig. 2 is the sectional structure schematic diagram of dedicated tool of the present invention;
Wherein: 1, anode metal electrodes 2, PN junction 3, cathodic metal electrode 4, passivation protection layer 5, handle of a knife 6, cutter head 7, grinding hole.
Embodiment
A knot terminal manufacture method for high voltage power semiconductor device, comprises the following steps:
Step one: adopt common diffusion or the PN junction structure needed for the making of injection technology method, and carry out double-sided metal electrode at the upper and lower surface of PN junction.
Step 2: use cutter to carry out grinding and cutting to knot terminal, be cut into trapezoidal by the vertical section of PN junction in knot terminal, cutting process constantly smears the SiC grinding material aqueous solution, to reach the effect of cutting and grinding; Described cutter can be universal cutter also can be dedicated tool, the structure of described dedicated tool is as shown in Figure 2: comprise handle of a knife 5 and cutter head 6, described handle of a knife 5 is provided with the blind hole be connected with driving mechanism, the front end of described cutter head 6 is provided with grinding hole 7, the front end of grinding hole 7 vertical section is that trapezoidal rear end is suitable with knot terminal, cutter head 6 be blade foremost.
Step 3: the outer surface of two metal electrodes of knot terminal after dicing smears protecting glue; conventional silicon polishing corrosive liquid is adopted to carry out short time, fast erosion to the outer surface of PN junction after glue dry solidification to be protected; after eroding damage layer, rapid, high volume is washed by water and is dewatered.
Step 4: smear thin-layer silicon rubber or other insulation protection glue and solidify on the grinding inclined-plane of PN junction.
As shown in Figure 1, the superiors are anode metal electrodes 1 to the structure of knot terminal, and middle is the bevelled PN junction 2 of band, and orlop is cathodic metal electrode 3.
Conventional knot terminal beveled surface molding has angle lap method and oblique angle sand-blast etc., and angle lap method is applicable to large silicon area, and oblique angle sand-blast is applicable to larger silicon area and complex process, cost are high.Instrument bevel molding of the present invention, technique is simple, rate of finished products is high, cost is low, is applicable to little chip area, without the need to the photoetching technique of complexity.
Claims (1)
1. the knot terminal of a high voltage power semiconductor device manufactures dedicated tool, it is characterized in that described dedicated tool comprises handle of a knife (5) and cutter head (6), described handle of a knife (5) is provided with the blind hole be connected with driving mechanism, the front end of described cutter head (6) is provided with grinding hole (7), the front end of described grinding hole (7) vertical section is trapezoidal, middle part be rectangle, rear end is trapezoidal, cutter head (6) be blade foremost.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210108065.9A CN102623309B (en) | 2012-04-13 | 2012-04-13 | Manufacturing method of end terminal of high voltage power semiconductor device and special cutting tool for the same |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210108065.9A CN102623309B (en) | 2012-04-13 | 2012-04-13 | Manufacturing method of end terminal of high voltage power semiconductor device and special cutting tool for the same |
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| CN102623309A CN102623309A (en) | 2012-08-01 |
| CN102623309B true CN102623309B (en) | 2015-03-11 |
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| CN201210108065.9A Active CN102623309B (en) | 2012-04-13 | 2012-04-13 | Manufacturing method of end terminal of high voltage power semiconductor device and special cutting tool for the same |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN88100817A (en) * | 1987-02-11 | 1988-11-30 | Bbc勃朗·勃威力有限公司 | Process for manufacture of semiconductor device |
| US7528055B2 (en) * | 2005-09-05 | 2009-05-05 | Sumitomo Electric Industries, Ltd. | Method of producing a nitride semiconductor device and nitride semiconductor device |
| CN102361009A (en) * | 2011-10-21 | 2012-02-22 | 四川太晶微电子有限公司 | Production method of rectifier diode |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101752248A (en) * | 2009-12-18 | 2010-06-23 | 浙江四方电子有限公司 | Thyristor core manufacturing process |
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2012
- 2012-04-13 CN CN201210108065.9A patent/CN102623309B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN88100817A (en) * | 1987-02-11 | 1988-11-30 | Bbc勃朗·勃威力有限公司 | Process for manufacture of semiconductor device |
| US7528055B2 (en) * | 2005-09-05 | 2009-05-05 | Sumitomo Electric Industries, Ltd. | Method of producing a nitride semiconductor device and nitride semiconductor device |
| CN102361009A (en) * | 2011-10-21 | 2012-02-22 | 四川太晶微电子有限公司 | Production method of rectifier diode |
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| CN102623309A (en) | 2012-08-01 |
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