CN102610619B - Wafer-level vacuum encapsulated infrared focal plane array (IRFPA) device and method for producing same - Google Patents
Wafer-level vacuum encapsulated infrared focal plane array (IRFPA) device and method for producing same Download PDFInfo
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Abstract
The invention discloses a wafer-level vacuum encapsulated infrared focal plane array (IRFPA) device and a method for producing the same, wherein a double-wafer bonding mode is adopted to produce an infrared detector and realize the wafer-level encapsulation, a complementary metal-oxide-semiconductor integrated chip (CMOSIC) and a micro-electromechanical systems (MEMS) device are separately produced, so the integration of the CMOSIC is realized, the production flexibility of the MEMS infrared detector device is also increased, and the wafer-level encapsulation can be realized at the same time. The invention has the advantages that: a reflector for a complementary metal-oxide-semiconductor integrated chip (CMOS) reading circuit and a resonance absorption structure is produced on a wafer, the other wafer is utilized to produce the MEMS structural part of the IRFPA and is simultaneously used for producing the infrared window of the IRFPA, the resonance absorption structure is utilized to provide the infrared absorption efficiency of the infrared IRFPA device, the wafer-level encapsulation of the IRFPA device is also realized at the same time, so the size and the production cost of the IRFPA device are benefited to be reduced.
Description
Technical field
The present invention relates to a kind of IR FPA device and manufacture method thereof, especially a kind of IR FPA device and manufacture method thereof that adopts wafer-level vacuum packaged.
Background technology
Infrared imagery technique is widely used in each fields such as military affairs, industry, agricultural, medical treatment, forest fire protection, environmental protection, and its core component is infrared focal plane array (Infrared Focal Plane Array, IRFPA).According to operation principle classification, can be divided into: photon type Infrared Detectors and non-refrigerated infrared detector.Photon type Infrared Detectors adopts low-gap semiconductor material, as HgCdTe, InSb etc., utilizes photoelectric effect to realize the conversion of infrared signal to the signal of telecommunication; Thereby need to be operated at 77K or lower temperature, this just needs heavy and complicated refrigeration plant, is difficult to miniaturization, carries inconvenience.On the other hand, the material price costlinesses such as HgCdTe and InSb, preparation difficulty, and incompatible with CMOS technique, so the price of photon type Infrared Detectors is always high.These have all greatly hindered the extensive use of thermal camera, particularly aspect civilian, in the urgent need to developing a kind of moderate performance, cheap Novel infrared camera.At commercial infrared focal plane array device at present, its cost is mainly packaging and testing, account for the 70-80% of chip cost, the main Vacuum Package that adopts metal or earthenware shell-type, the high enterprise of cost, at present in order to reduce device cost, international and domestic all research direction trend of purchasing wafer-level packaging or wafer-level package, this is an important channel in order to reduce chip cost, is also its developing direction.
Non-refrigeration thermal type infrared detector absorbs infrared ray by infrared detecting unit, and infrared energy causes that the electrology characteristic of infrared detecting unit changes, and infrared energy is converted into the signal of telecommunication, by reading circuit, is read this signal and is processed.Wafer-level vacuum packaged is mainly in wafer manufacture process, to make the needed scolder of encapsulation, then before being cut, wafer completes the bonding packaging of two or multi-disc wafer, the benefit of doing is like this device size that can greatly reduce after encapsulation, meets the demand to miniature chip in mobile device at present.Without using metal or ceramic cartridge, can effectively reduce the cost of device simultaneously.
Fig. 1 is the micro-structural (from the open text 5,286,976 2/1994 of United States Patent (USP)) that a kind of non-refrigerated infrared detector unit makes, and is mainly to adopt amorphous silicon and VOx(vanadium oxide) be used as thermo-sensitive resistor and realize ultrared detection.Its structure comprises: device 10, microbridge detecting layer 11, the Semiconductor substrate 13 having an even surface, substrate surface 14, integrated circuit 15, silicon nitride 16, film reflectorized material 18, silicon nitride layer 20, thin film resistive layer 21, silicon nitride layer 22, infrared absorption layer 23, cavity or cavity height 26, inclined-plane 30, the first contact pad 31, the second contact pad 32, the first silicon nitride layer 20 ', the second silicon nitride layer 22 ', inclined-plane 30 '.This structure is to be manufactured on the silicon chip that completes reading circuit manufacture, owing to there being thicker dielectric layer on reading circuit silicon chip, thereby form a larger thermal capacitance, the infrared energy absorbing on pixel cannot dissipate away in time, can bring crosstalking between pixel, thereby be lowered into image quality.VOx material in Fig. 1 is simultaneously also incompatible with IC technique, thereby this structure can not manufacture in IC factory, causes cost compare high.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of IR FPA device and manufacture method thereof of wafer-level vacuum packaged is provided.Adopt the mode of 2 wafer bondings to realize the making of Infrared Detectors and realize its wafer-level packaging, CMOS IC is separated to making with MEMS device, both realized integrated with CMOS IC, increase again the flexibility of MEMS Infrared Detectors element manufacturing, can realize again wafer-level packaging simultaneously, reduce packaging cost, thereby reduce the cost of manufacture of IR FPA device.
According to technical scheme provided by the invention, a kind of IR FPA device of wafer-level vacuum packaged, comprise first wafer and the second wafer, it is characterized in that: described first wafer is conventional silicon chip, adopt conventional IC manufacture craft to produce the reading circuit of IR FPA, with first wafer the superiors metal, produce the reflector of the needed resonance absorption of IR FPA device simultaneously, at first wafer, there is the one side of reflector to be deposited with dielectric material, run through described first wafer and dielectric material and be shaped with TSV structure for electrical connection and realize paster type encapsulation, at the electric connection point of TSV structure and dielectric material, make the first soldered material, on the silicon substrate of the second wafer, produce the micro-structural for IR FPA device, comprise: described the second wafer front is manufactured with barrier oxide layer, in barrier oxide layer, be manufactured with metal connecting line, form the electrical wiring of MEMS structure, metal in heat isolation cantilever beam is connected with described electrical wiring, metal in heat isolation cantilever beam is connected with the sensitive resistance material in sensitive layer, in barrier oxide layer, be also manufactured with the second soldered material welding for the getter of Vacuum Package and for two wafer, the second soldered material is connected with electrical wiring, described sensitive layer, heat isolation cantilever beam, getter, between the second soldered material, form vacuum chamber, at the upper and lower surface of the second wafer, be also manufactured with the required antireflection material of infrared window, bonding by described first wafer and the second wafer is realized wafer-level vacuum packaged.
Further, in described the second region relative with groove, the wafer back side, be manufactured with the microlens array for cumulative.
Further, the resonance absorption layer in described sensitive layer be positioned at sensitive layer above or below.
The manufacture method of the IR FPA device wafers level Vacuum Package of above-mentioned wafer-level vacuum packaged, its step is as follows:
The first step, on the silicon substrate of first wafer, by conventional IC technique, produce the required reading circuit of IR FPA, utilize silicon substrate the superiors metal to produce the needed reflector of IR FPA resonance absorption structure, the deposit that then has the one side of reflector to complete passivation layer medium at first wafer forms dielectric material;
Second step, by photoetching, lithographic method, in the periphery of reading circuit, produce deep hole, then pass through PECVD method in inner walls of deep holes dielectric layer deposited, for electricity isolation, then pass through evaporation or the sputtering method Seed Layer in inner walls of deep holes splash-proofing sputtering metal barrier layer or plating, then by sputter, CVD or electro-plating method, complete the filling of metal material in deep hole, finally by CMP method, remove unnecessary metal material, realize planarization and complete the making of TSV structure; And carve dielectric layer unnecessary on reflector by the method for photoetching, etching;
The 3rd step, in protection, positive in the situation that, utilize reduction process that silicon substrate is thinned to from the back side and exposes the metal material TSV structure;
The 4th step, in the second wafer, produce IR FPA device: adopt LPCVD, PECVD, photoetching, etching, evaporation and sputtering technology, in the second wafer, make barrier oxide layer, then on barrier oxide layer, make metal connecting line, form electrical wiring, then cover upper sacrificial layer, on sacrifice layer, make the hole for connecting electrical wiring and heat isolation cantilever beam, then make sensitive layer and heat isolation cantilever beam, the electric conducting material in heat isolation cantilever beam is connected with the sensitive resistance material in sensitive layer; Described sacrifice layer is the polyimide material of making by spin coating planarization or passes through amorphous silicon or the amorphous GeSi of PECVD deposit, then by CMP method, realizes planarization;
The 5th step, employing photoetching, evaporation or sputter, etching technics are produced after getter, the second soldered material, adopt oxygen plasma ashing technology or XeF
2gaseous corrosion technology discharges sacrifice layer, discharges cavity; Described oxygen plasma ashing technology is to be polyimides for sacrificial layer material, described XeF
2gaseous corrosion technology is to be amorphous silicon or amorphous GeSi for sacrificial layer material;
The 6th step, on the electric connection point of the TSV of first wafer structure and dielectric material, adopt IC in common process photoetching, evaporation or sputter, etching technics produce the first soldered material;
The 7th step, by wafer bonding technique, realize aligning and the bonding of first wafer and the second wafer, realize the electrical connection of IR FPA and reading circuit and the Vacuum Package of whole IR FPA device; The anti-reflecting layer material of making infrared window after cleaning completes by evaporation or sputtering technology at the second wafer back side, completes the making of whole IR FPA device, finally completes the cutting to IR FPA device.
A kind of IR FPA device of wafer-level vacuum packaged, comprise first wafer and the second wafer, it is characterized in that: described first wafer is conventional silicon chip, adopt conventional IC manufacture craft to produce the reading circuit of IR FPA, with first wafer the superiors metal, produce the reflector of the needed resonance absorption of IR FPA device simultaneously, at first wafer, there is the one side of reflector to be deposited with dielectric material, described dielectric material comprises the boss in middle part, boss surrounding is lower than formation edge, middle part, in described boss, be shaped with TSV structure, described edge is provided with through hole, at the electric connection point of TSV structure and dielectric material, makes the first soldered material, on the silicon substrate of the second wafer, by conventional IC technique, produce the micro-structural for IR FPA device, comprise: described the second wafer front is manufactured with barrier oxide layer, in barrier oxide layer, be manufactured with metal connecting line, form the electrical wiring of MEMS structure, metal in heat isolation cantilever beam is connected with described electrical wiring, metal in heat isolation cantilever beam is connected with the sensitive resistance material in sensitive layer, in barrier oxide layer, be also manufactured with the second soldered material welding for the getter of Vacuum Package and for two wafer, the second soldered material is connected with electrical wiring, described sensitive layer, heat isolation cantilever beam, getter, between the second soldered material, form vacuum chamber, at the upper and lower surface of the second wafer, be also manufactured with the required antireflection material of infrared window, bonding by described first wafer and the second wafer is realized wafer-level vacuum packaged.
Further, in described the second region relative with groove, the wafer back side, be manufactured with the microlens array for cumulative.
Further, the resonance absorption layer in described sensitive layer be positioned at sensitive layer above or below.
The manufacture method of the IR FPA device wafers level Vacuum Package of above-mentioned wafer-level vacuum packaged, its step is as follows:
The first step, on the silicon substrate of first wafer, by conventional IC technique, produce the required reading circuit of IR FPA, utilize silicon substrate the superiors metal to produce the needed reflector of IR FPA resonance absorption structure, the deposit that then has the one side of reflector to complete passivation layer medium at first wafer forms dielectric material;
Second step, by photoetching, lithographic method, in the periphery of reading circuit, produce deep hole, then pass through evaporation or the sputtering method Seed Layer in inner walls of deep holes splash-proofing sputtering metal barrier layer or plating, then by sputter, CVD or electro-plating method, complete the filling of metal material in deep hole, finally by CMP method, remove unnecessary metal material, realize planarization and complete the making of TSV structure; And carve dielectric layer unnecessary on reflector by the method for photoetching, etching;
The 3rd step: produce IR FPA device in the second wafer: adopt LPCVD, PECVD, photoetching, etching, evaporation and sputtering technology, in the second wafer, make barrier oxide layer, then on barrier oxide layer, make metal connecting line, form electrical wiring, then cover upper sacrificial layer, on sacrifice layer, make the hole for connecting electrical wiring and heat isolation cantilever beam, then make sensitive layer and heat isolation cantilever beam, the electric conducting material in heat isolation cantilever beam is connected with the sensitive resistance material in sensitive layer; Described sacrifice layer is the polyimide material of making by spin coating planarization or passes through amorphous silicon or the amorphous GeSi of PECVD deposit, then by CMP method, realizes planarization;
The 4th step, employing photoetching, evaporation or sputter, etching technics are produced after getter, the second soldered material, adopt oxygen plasma ashing technology or XeF
2gaseous corrosion technology discharges sacrifice layer, discharges cavity; Described oxygen plasma ashing technology is to be polyimides for sacrificial layer material, described XeF
2gaseous corrosion technology is to be amorphous silicon or amorphous GeSi for sacrificial layer material;
The 5th step, on the electric connection point of the TSV of first wafer structure and dielectric material, adopt IC in common process photoetching, evaporation or sputter, etching technics produce the first soldered material;
The 6th step, by wafer bonding technique, realize aligning and the bonding of first wafer and the second wafer, realize the electrical connection of IR FPA and reading circuit and the Vacuum Package of whole IR FPA device; The anti-reflecting layer material of making infrared window after cleaning completes by evaporation or sputtering technology at the second wafer back side, completes the making of whole IR FPA device;
The 7th step, by the method for photoetching, etching, carve the second wafer unnecessary anti-reflecting layer material, substrate and barrier oxide layer, expose through hole; Finally by cutting, complete the separation of each IR FPA device.
A kind of IR FPA device of wafer-level vacuum packaged, comprise first wafer, the second wafer and the 3rd wafer, it is characterized in that: on the silicon substrate of described first wafer, adopt conventional IC manufacture craft to produce the reading circuit of IR FPA, with first wafer the superiors metal, produce the reflector of the needed resonance absorption of IR FPA device simultaneously, at first wafer, there is the one side of reflector to be deposited with dielectric material, described dielectric material comprises the boss in middle part, boss surrounding is lower than formation edge, middle part, in described boss, be shaped with TSV structure, described edge is provided with through hole, at the electric connection point of TSV structure and dielectric material, makes the first soldered material, on the silicon substrate of the second wafer, produce the micro-structural for IR FPA device, comprise: described the second wafer front is manufactured with barrier oxide layer, in barrier oxide layer, be manufactured with metal connecting line, form the electrical wiring of MEMS structure, metal in heat isolation cantilever beam is connected with described electrical wiring, metal in heat isolation cantilever beam is connected with the sensitive resistance material in sensitive layer, in barrier oxide layer, be also manufactured with the second soldered material welding for the getter of Vacuum Package and for two wafer, the second soldered material is connected with electrical wiring, then the silicon materials of described the second wafer are completely removed, on the silicon substrate of described the 3rd wafer, produce the block for the encapsulation of IR FPA component vacuum, comprising: groove and the anti-reflecting layer material of making in groove surfaces, and the anti-reflecting layer material at the 3rd wafer back side, bonding successively by described first wafer, the second wafer and the 3rd wafer is realized wafer-level vacuum packaged.
Advantage of the present invention is: by make the reflector of CMOS reading circuit and resonance absorption structure in a wafer, utilize an other wafer to manufacture the MEMS structure division of IR FPA, utilize this wafer to do the infrared window of IR FPA simultaneously, both utilized resonance absorption structure that the INFRARED ABSORPTION efficiency of infrared IR FPA device is provided, realize the wafer-level packaging of IR FPA device simultaneously, be conducive to reduce the size of IR FPA device and reduce cost of manufacture.
Accompanying drawing explanation
Fig. 1 is prior art cross-sectional view.
Fig. 2 is the cross-sectional view of the embodiment of the present invention 1.
Fig. 3 is the cross-sectional view of the embodiment of the present invention 2.
Fig. 4 is the cross-sectional view of the embodiment of the present invention 3.
Fig. 5 is the cross-sectional view of the embodiment of the present invention 4.
Fig. 6 is the cross-sectional view of the embodiment of the present invention 5.
Fig. 7 is the cross-sectional view of the embodiment of the present invention 6.
Fig. 8 is the cross-sectional view of the embodiment of the present invention 7.
Fig. 9-1st, the manufacture method first step schematic diagram of the embodiment of the present invention 1.
Fig. 9-2nd, the manufacture method second step schematic diagram of the embodiment of the present invention 1.
Fig. 9-3rd, the manufacture method of the embodiment of the present invention 1 the 3rd step schematic diagram.
Fig. 9-4th, the manufacture method of the embodiment of the present invention 1 the 4th step schematic diagram.
Fig. 9-5th, the manufacture method of the embodiment of the present invention 1 the 5th step schematic diagram.
Fig. 9-6th, the manufacture method of the embodiment of the present invention 1 the 6th step schematic diagram.
Fig. 9-7th, the manufacture method of the embodiment of the present invention 1 the 7th step schematic diagram.
Figure 10-1st, the manufacture method first step schematic diagram of the embodiment of the present invention 2.
Figure 10-2nd, the manufacture method second step schematic diagram of the embodiment of the present invention 2.
Figure 10-3rd, the manufacture method of the embodiment of the present invention 2 the 3rd step schematic diagram.
Figure 10-4th, the manufacture method of the embodiment of the present invention 2 the 4th step schematic diagram.
Figure 10-5th, the manufacture method of the embodiment of the present invention 2 the 5th step schematic diagram.
Figure 10-6th, the manufacture method of the embodiment of the present invention 2 the 6th step schematic diagram.
Figure 10-7th, the manufacture method of the embodiment of the present invention 2 the 7th step schematic diagram.
Figure 11-1st, the manufacture method first step schematic diagram of the embodiment of the present invention 7.
Figure 11-2nd, the manufacture method second step schematic diagram of the embodiment of the present invention 7.
Figure 11-3rd, the manufacture method of the embodiment of the present invention 7 the 3rd step schematic diagram.
Figure 11-4th, the manufacture method of the embodiment of the present invention 7 the 4th step schematic diagram.
Figure 11-5th, the manufacture method of the embodiment of the present invention 7 the 5th step schematic diagram.
Figure 11-6th, the manufacture method of the embodiment of the present invention 7 the 6th step schematic diagram.
Figure 11-7th, the manufacture method of the embodiment of the present invention 7 the 7th step schematic diagram.
Figure 11-8th, the manufacture method of the embodiment of the present invention 7 the 8th step schematic diagram.
Figure 11-9th, the manufacture method of the embodiment of the present invention 7 the 9th step schematic diagram.
Figure 11-10th, the manufacture method of the embodiment of the present invention 7 the tenth step schematic diagram.
Embodiment
Below in conjunction with drawings and Examples, the invention will be further described.
The present invention adopts two wafers by the mode of bonding, to realize the IR FPA device of wafer-level vacuum packaged, the substrate of first wafer 101 is the silicon chip that IC is conventional, by conventional IC technological process, produce the required reading circuit of IR FPA, with its superiors' metal, produce reflector 104(Al or AlCu or Cu or the AlSiCu of the needed resonance absorption of IR FPA device simultaneously), and TSV structure 103 and the first soldered material 105 of welding with the 2nd wafer.The 2nd wafer mainly made MEMS structure electrical wiring 204(Al or AlCu or AlSiCu or the Cu of IR FPA), sensitive layer 205(is a kind of composite structure, by the dielectric material in this region of parcel, resistance material amorphous silicon or amorphous VOx or amorphous GeSi or doped amorphous silicon or doping VOx or doping amorphous GeSi, the compositions such as resonance absorption layer semi-transparent metals Ti or TiN), heat isolation cantilever beam 206(forms by wrapping up the medium of adiabatic beam and TiN or doped amorphous silicon electric conducting material), and for the required getter 207(Ti of Vacuum Package or Ni or Pd or Zr or its composite material) and two wafer required the second soldered material 208(Al or Cu or AlSiCu or Au or Ag or Sn or its composite material of when welding), and complete the release of vacuum chamber 210, and the needed antireflection material of infrared window (SiON or ZnS or MgF2 or its combination), this is made in the upper and lower surface (not identifying out in figure) of the 2nd wafer 201.Then by wafer bonding equipment, complete aligning and the bonding of two wafers, realize the IR FPA device of the wafer-level vacuum packaged of inventing.This invention is mainly that CMOS IC and MEMS IR FPA device are separately manufactured, in the situation that not affecting CMOS IC performance, increased the flexibility that MEMS IR FPA makes, the heat dissipation channel end (electrical wiring 204) of IR FPA pixel is close to one large heat sink (the second wafer 201) simultaneously, be conducive to reduce crosstalking between pixel, improve device performance, for the mode (shown in Fig. 4 and Fig. 5) of integral micro-lens, can scioptics improve better the fill factor, curve factor of device, improve device performance.The present invention adopts resonance absorption structure to improve infrared sensitive unit to ultrared absorption efficiency.Spacing between infrared sensitive unit and reflector is at 1-3.5um, and its spacing can be adjusted by CMOSIC top dielectric (dielectric material 102) and soldered material 105,208 thickness.This spacing adjustment can be for for the ultrared absorption of different-waveband, thereby is applied to for 1-3um, 5-7um, and the detection of 8-14um infrared band, realizes the room temperature imaging of different-waveband.Infrared focal plane array device is comprised of a lot of such infrared detecting units, by reading circuit processing, thereby realizes the imaging of face battle array.
Fig. 4 and Fig. 5 are the section of structures of the embodiment of the present invention 3 and embodiment 4, are mainly carrying out after wafer bonding, manufacture the microlens array 212 for cumulative in the 2nd wafer 201, improve the fill factor, curve factor of device, improve device performance.
Fig. 6 and Fig. 7 are the section of structures of the embodiment of the present invention 5 and embodiment 6, are the resonance absorption layer in sensitive layer 205 to do in the top of sensitive layer with the difference of embodiment 1 and embodiment 2.These two kinds of embodiment have the execution mode of integral micro-lens array equally.
Embodiment 1
The section of structure of the embodiment of the present invention 1 as shown in Figure 2, comprises first wafer 101 and the second wafer 201, on the second wafer 201 silicon substrates, by photoetching, the etching of conventional IC technique, produces the micro-structural for infrared focal plane array device.Concrete structure is: described first wafer 101 is conventional silicon chip, adopts conventional IC manufacture craft to produce the reading circuit of IR FPA, produces the reflector 104 of the needed resonance absorption of IR FPA device with first wafer 101 the superiors' metals simultaneously, at first wafer 101, there is the one side of reflector 104 to be deposited with dielectric material 102, run through described first wafer 101 and dielectric material 102 and be shaped with TSV structure 103 for electrical connection and realize paster type encapsulation, at the electric connection point of TSV structure 103 and dielectric material 102, make the first soldered material 105, on the silicon substrate of the second wafer 201, produce the micro-structural for IR FPA device, comprise: described the second wafer 201 fronts are manufactured with barrier oxide layer 202, in barrier oxide layer 202, be manufactured with metal connecting line 203, form the electrical wiring 204 of MEMS structure, metal in heat isolation cantilever beam 206 is connected with described electrical wiring 204, metal in heat isolation cantilever beam 206 is connected with the sensitive resistance material in sensitive layer 205, in barrier oxide layer 202, be also manufactured with the second soldered material 208 welding for the getter 207 of Vacuum Package and for two wafer, the second soldered material 208 is connected with electrical wiring 204, described sensitive layer 205, heat isolation cantilever beam 206, getter 207, between the second soldered material 208, form vacuum chamber 210, at the upper and lower surface of the second wafer 201, be also manufactured with the required antireflection material of infrared window, bonding by described first wafer 101 and the second wafer 201 is realized wafer-level vacuum packaged.
The concrete manufacture method step of the embodiment of the present invention 1 is as follows:
The first step (as shown in Fig. 9-1): on the silicon substrate of first wafer 101, by the IC technique of standard, produce the required reading circuit of IR FPA, utilize its last layer of metal to produce the needed reflector 104 of IR FPA resonance absorption structure, the deposit that then completes last passivation layer medium forms dielectric material 102.
Second step (as shown in Fig. 9-2): produce deep hole by the photoetching in IC technique, lithographic method, then by PECVD method, complete the deposit (for electricity isolation) of dielectric layer, and by the Seed Layer of evaporation or sputtering method splash-proofing sputtering metal barrier layer or plating, then by sputter, CVD or electro-plating method, complete the filling of metal material, finally by CMP method, realize planarization and complete the making of TSV structure 103, then carve dielectric layer unnecessary on reflector 104 by the method for photoetching, etching.Carving dielectric layer unnecessary on reflector 104 can conversely, first carve unnecessary dielectric layer on reflector 104, and then make TSV structure 103 with the order of preparation TSV structure 103.
The 3rd step (as shown in Fig. 9-3): in the situation that protection is positive, utilize the reduction process in IC that the silicon substrate of first wafer 101 is thinned to from the back side and exposes the metal material TSV structure 103.
The 4th step (as shown in Fig. 9-4): produce IR FPA device on the 2nd wafer: adopt conventional IC technique LPCVD, PECVD, photoetching, etching, evaporation and sputter, produce IR FPA device as shown in the figure, sacrifice layer 211 wherein can be said the polyimide material of making by spin coating planarization or pass through amorphous silicon or the amorphous GeSi of PECVD deposit, then by CMP method, realize planarization as shown in the figure, then make sensitive layer 205, the heat isolation cantilever beam 206 of IR FPA device in the above.
The 5th step (as shown in Fig. 9-5): adopt conventional photoetching in IC, evaporation or sputter, etching technics to produce after getter 207 and soldered material 208, adopt oxygen plasma ashing technology (to sacrificial layer material, being polyimides) or XeF2 gaseous corrosion technology (to sacrificial layer material, being amorphous silicon or amorphous GeSi) to discharge sacrifice layer 211, discharge cavity 212.
The 6th step (as shown in Fig. 9-6): common process photoetching adopt IC on the 1st wafer in, evaporation or sputter, etching technics are produced soldered material 105.
The 7th step (as shown in Fig. 9-7): realize aligning and the bonding of two wafer by wafer bonding technique, realize the electrical connection of IR FPA and reading circuit and the Vacuum Package of whole IR FPA device.Then as required wafer 201 is carried out to attenuate, after cleaning completes, by evaporation or sputtering technology, make the anti-reflecting layer material 213 of infrared window.Complete the making of whole IR FPA device, finally complete the cutting to IR FPA device.
Embodiment 2
The section of structure of the embodiment of the present invention 2 as shown in Figure 3, be drawing of last solder joint with the difference of embodiment 1, the solder joint of embodiment 1 is drawn below first wafer by the method for TSV, and embodiment 2 is to draw in the surrounding of the reading circuit of first wafer.
Concrete structure is: first wafer 101 is conventional silicon chip, adopts conventional IC manufacture craft to produce the reading circuit of IR FPA, produces the reflector 104 of the needed resonance absorption of IR FPA device with first wafer 101 the superiors' metals simultaneously, at first wafer 101, there is the one side of reflector 104 to be deposited with dielectric material 102, described dielectric material 102 comprises the boss in middle part, boss surrounding is lower than formation edge, middle part, in described boss, be shaped with TSV structure 103, described edge is provided with electrical connection through hole 107, at the electric connection point of TSV structure 103 and dielectric material 102, makes the first soldered material 105, on the silicon substrate of the second wafer 201, by conventional IC technique, produce the micro-structural for IR FPA device, comprise: described the second wafer 201 fronts are manufactured with barrier oxide layer 202, in barrier oxide layer 202, be manufactured with metal connecting line 203, form the electrical wiring 204 of MEMS structure, metal in heat isolation cantilever beam 206 is connected with described electrical wiring 204, metal in heat isolation cantilever beam 206 is connected with the sensitive resistance material in sensitive layer 205, in barrier oxide layer 202, be also manufactured with the second soldered material 208 welding for the getter 207 of Vacuum Package and for two wafer, the second soldered material 208 is connected with electrical wiring 204, described sensitive layer 205, heat isolation cantilever beam 206, getter 207, between the second soldered material 208, form vacuum chamber 210, at the upper and lower surface of the second wafer 201, be also manufactured with the required antireflection material of infrared window, bonding by described first wafer 101 and the second wafer 201 is realized wafer-level vacuum packaged.
The concrete manufacture method step of the embodiment of the present invention 2 is as follows:
The first step (as shown in Figure 10-1): on the silicon substrate of first wafer 101, by the IC technique of standard, produce the required reading circuit of IR FPA, utilize its last layer of metal to produce the needed reflector 104 of IR FPA resonance absorption structure, the deposit that then completes last passivation layer medium forms dielectric material 102.
Second step (as shown in Figure 10-2): produce through hole by the photoetching in IC technique, lithographic method, then by the Seed Layer of evaporation or sputtering method splash-proofing sputtering metal barrier layer or plating, then by sputter, CVD or electro-plating method, complete the filling of metal material, finally by CMP method, realize planarization and complete the making that is electrically connected through hole 107, then carve dielectric layer unnecessary on reflector 104 by the method for photoetching, etching.Carve dielectric layer unnecessary on reflector 104 be electrically connected through hole 107 order with preparation and can conversely, first carve unnecessary dielectric layer on reflector 104, and then making be electrically connected through hole 107.
The 3rd step (as shown in Figure 10-3): produce IR FPA device on the 2nd wafer: adopt conventional IC technique LPCVD, PECVD, photoetching, etching, evaporation and sputter, produce IR FPA device as shown in the figure, sacrifice layer 211 wherein can be said the polyimide material of making by spin coating planarization or pass through amorphous silicon or the amorphous GeSi of PECVD deposit, then by CMP method, realize planarization as shown in the figure, then make sensitive layer 205, the heat isolation cantilever beam 206 of IR FPA device in the above.
The 4th step (as shown in Figure 10-4): adopt conventional photoetching in IC, evaporation or sputter, etching technics to produce after getter 207 and soldered material 208, adopt oxygen plasma ashing technology (to sacrificial layer material, being polyimides) or XeF2 gaseous corrosion technology (to sacrificial layer material, being amorphous silicon or amorphous GeSi) to discharge sacrifice layer 211, discharge cavity 212.
The 5th step (as shown in Figure 10-5): common process photoetching adopt IC on the 1st wafer in, evaporation or sputter, etching technics are produced soldered material 105.
The 6th step (as shown in Figure 10-6): realize aligning and the bonding of two wafer by wafer bonding technique, realize the electrical connection of IR FPA and reading circuit and the Vacuum Package of whole IR FPA device.Then as required wafer 201 is carried out to attenuate, after cleaning completes, by evaporation or sputtering technology, make the anti-reflecting layer material 213 of infrared window.Complete the making of whole IR FPA device.
The 7th step (as shown in Figure 10-7): carve the 2nd anti-reflecting layer material 213, substrate 201 and wafer 201 anti-reflecting layer material (not showing in figure) and the barrier oxide layer 202 below that wafer is unnecessary by the method for photoetching, etching, expose metal gasket 106.Finally by cutting, complete the separation of each IR FPA device.
Embodiment 3
As shown in Figure 4, its primary structure is similar to Example 1 for the section of structure of the embodiment of the present invention 3, and main difference is to have increased optically focused integral micro-lens, thereby improves the fill factor, curve factor of structure, improves the performance of device.
Main making step difference is in the 7th step (as shown in Fig. 9-7), before making anti-reflecting layer material 213, after first producing dimpling lens arra or fresnel lens array by the method for photoetching, etching, then make anti-reflecting layer material 213, complete the making of whole device.
Embodiment 4
As shown in Figure 5, its primary structure and embodiment 2 are similar for the section of structure of the embodiment of the present invention 4, and main difference is to have increased optically focused integral micro-lens, thereby improve the fill factor, curve factor of structure, improve the performance of device.
Main making step difference is in the 6th step (as shown in Figure 10-6), before making anti-reflecting layer material 213, after first producing dimpling lens arra or fresnel lens array by the method for photoetching, etching, then make anti-reflecting layer material 213, complete the making of whole device.
Embodiment 5
As shown in Figure 6, its primary structure is similar to Example 1 for the section of structure of the embodiment of the present invention 5, above just when making sensitive layer 205, resonance absorption layer semi-transparent metals material being produced on.
Embodiment 6
As shown in Figure 7, its primary structure is similar to Example 2 for the section of structure of the embodiment of the present invention 6, above just when making sensitive layer 205, resonance absorption layer semi-transparent metals material being produced on.
Embodiment 7
The section of structure of the embodiment of the present invention 7 as shown in Figure 8, its structure comprises first wafer 101, the second wafer and the 3rd wafer 301, on the silicon substrate of described first wafer 101, adopt conventional IC manufacture craft to produce the reading circuit of IR FPA, with first wafer 101 the superiors' metals, produce the reflector 104 of the needed resonance absorption of IR FPA device simultaneously, at first wafer 101, there is the one side of reflector 104 to be deposited with dielectric material 102, described dielectric material 102 comprises the boss in middle part, boss surrounding is lower than formation edge, middle part, in described boss, be shaped with TSV structure 103, described edge is provided with electrical connection through hole 107, at the electric connection point of TSV structure 103 and dielectric material 102, makes the first soldered material 105, on the silicon substrate of the second wafer, produce the micro-structural for IR FPA device, comprise: described the second wafer 201 fronts are manufactured with barrier oxide layer 202, in barrier oxide layer 202, be manufactured with metal connecting line 203, form the electrical wiring 204 of MEMS structure, metal in heat isolation cantilever beam 206 is connected with described electrical wiring 204, metal in heat isolation cantilever beam 206 is connected with the sensitive resistance material in sensitive layer 205, in barrier oxide layer 202, be also manufactured with the second soldered material 208 welding for the getter 207 of Vacuum Package and for two wafer, the second soldered material 208 is connected with electrical wiring 204, then the silicon materials of described the second wafer are completely removed, on the silicon substrate of described the 3rd wafer 301, produce the block for the encapsulation of IR FPA component vacuum, comprising: groove and the anti-reflecting layer material 302 of making in groove surfaces, and the anti-reflecting layer material at the 3rd wafer 301 back sides, bonding successively by described first wafer 101, the second wafer and the 3rd wafer 301 is realized wafer-level vacuum packaged.
Its concrete making step is as follows:
The first step (as shown in Figure 11-1): on the silicon substrate of first wafer 101, by the IC technique of standard, produce the required reading circuit of IR FPA, utilize its last layer of metal to produce the needed reflector 104 of IR FPA resonance absorption structure, the deposit that then completes last passivation layer medium forms dielectric material 102.
Second step (as shown in Figure 11-2): produce deep hole by the photoetching in IC technique, lithographic method, then by PECVD method, complete the deposit (for electricity isolation) of dielectric layer, and by the Seed Layer of evaporation or sputtering method splash-proofing sputtering metal barrier layer or plating, then by sputter, CVD or electro-plating method, complete the filling of metal material, finally by CMP method, realize planarization and complete the making of TSV structure 103, then carve dielectric layer unnecessary on reflector 104 by the method for photoetching, etching.Carving dielectric layer unnecessary on reflector 104 can conversely, first carve unnecessary dielectric layer on reflector 104, and then make TSV structure 103 with the order of preparation TSV structure 103.
The 3rd step (as shown in Figure 11-3): in the situation that protection is positive, utilize the reduction process in IC that the silicon substrate of first wafer 101 is thinned to from the back side and exposes the metal material TSV structure 103.
The 4th step (as shown in Figure 11-4): produce IR FPA device on the 2nd wafer: adopt conventional IC technique LPCVD, PECVD, photoetching, etching, evaporation and sputter, produce IR FPA device as shown in the figure.
The 5th step (as shown in Figure 11-5): adopt conventional photoetching in IC, evaporation or sputter, etching technics to produce after getter 207 and soldered material 208.
The 6th step (as shown in Figure 11-6): common process photoetching adopt IC on the 1st wafer in, evaporation or sputter, etching technics are produced the first soldered material 105.
The 7th step (as shown in Figure 11-7): realize aligning and the bonding of first wafer and the second wafer by wafer bonding technique, realize the electrical connection of IR FPA and reading circuit.
The 8th step (as shown in Figure 11-8): wafer 201 is carried out to reduction process, remove the silicon materials of the second wafer 201 completely.
The 9th step (as shown in Figure 11-9): on the 3rd wafer 301, adopt the method for photoetching, etching, sputter, the evaporation of conventional IC to prepare groove as shown in the figure and anti-reflecting layer material 302(SiON or ZnS or the MgF of groove surfaces
2or its combination), as required wafer 301 is carried out to attenuate, and make needed anti-reflecting layer material (not showing in figure) at wafer 301 back sides.
The tenth step (as shown in Figure 11-10): realize the aiming at and bonding of structure of the 3rd wafer 301 and the 7th step made by wafer bonding technique, complete the Vacuum Package of whole IR FPA device.Complete the making of whole IR FPA device, finally complete the cutting to IR FPA device.
Claims (9)
1. the IR FPA device of wafer-level vacuum packaged, comprise first wafer (101) and the second wafer (201), it is characterized in that: described first wafer (101) is conventional silicon chip, adopt conventional IC manufacture craft to produce the reading circuit of IR FPA, with first wafer (101) the superiors metal, produce the reflector (104) of the needed resonance absorption of IR FPA device simultaneously, at first wafer (101), there is the one side of reflector (104) to be deposited with dielectric material (102), run through described first wafer (101) and dielectric material (102) and be shaped with TSV structure (103) for electrical connection and realize paster type encapsulation, at the electric connection point of TSV structure (103) and dielectric material (102), make the first soldered material (105), on the silicon substrate of the second wafer (201), produce the micro-structural for IR FPA device, comprise: described the second wafer (201) front is manufactured with barrier oxide layer (202), in barrier oxide layer (202), be manufactured with metal connecting line (203), form the electrical wiring (204) of MEMS structure, metal in heat isolation cantilever beam (206) is connected with described electrical wiring (204), metal in heat isolation cantilever beam (206) is connected with the sensitive resistance material in sensitive layer (205), the the second soldered material (208) that is also manufactured with the getter (207) for Vacuum Package and welds for two wafer in barrier oxide layer (202), the second soldered material (208) is connected with electrical wiring (204), described sensitive layer (205), heat isolation cantilever beam (206), getter (207), between the second soldered material (208), form vacuum chamber (210), at the upper and lower surface of the second wafer (201), be also manufactured with the required antireflection material of infrared window, by described first wafer (101) and the bonding of the second wafer (201), realize wafer-level vacuum packaged.
2. the IR FPA device of wafer-level vacuum packaged as claimed in claim 1, is characterized in that, in the region relative with groove, described the second wafer (201) back side, is manufactured with the microlens array (212) for cumulative.
3. the IR FPA device of wafer-level vacuum packaged as claimed in claim 1, is characterized in that, the resonance absorption layer in described sensitive layer (205) be positioned at sensitive layer (205) above or below.
4. the manufacture method of the IR FPA device wafers level Vacuum Package of wafer-level vacuum packaged, is characterized in that, step is as follows:
The first step, on the silicon substrate of first wafer (101), by conventional IC technique, produce the required reading circuit of IR FPA, utilize silicon substrate the superiors metal to produce the needed reflector of IR FPA resonance absorption structure (104), the deposit that then has the one side of reflector (104) to complete passivation layer medium at first wafer (101) forms dielectric material (102);
Second step, by photoetching, lithographic method, in the periphery of reading circuit, produce deep hole, then pass through PECVD method in inner walls of deep holes dielectric layer deposited, for electricity isolation, then pass through evaporation or the sputtering method Seed Layer in inner walls of deep holes splash-proofing sputtering metal barrier layer or plating, then by sputter, CVD or electro-plating method, complete the filling of metal material in deep hole, finally by CMP method, remove unnecessary metal material, realize planarization and complete the making of TSV structure (103); And carve the upper unnecessary dielectric layer of reflector (104) by the method for photoetching, etching;
The 3rd step, in protection, positive in the situation that, utilize reduction process that silicon substrate (101) is thinned to from the back side and exposes the metal material TSV structure (103);
The 4th step, in the second wafer (201), produce IR FPA device: adopt LPCVD, PECVD, photoetching, etching, evaporation and sputtering technology, in the upper barrier oxide layer (202) of making of the second wafer (201), then on barrier oxide layer (202), make metal connecting line (203), form electrical wiring (204), then cover upper sacrificial layer (211), in the upper hole that is used for connecting electrical wiring (204) and heat isolation cantilever beam (206) that makes of sacrifice layer (211), then make sensitive layer (205) and heat isolation cantilever beam (206), electric conducting material in heat isolation cantilever beam (206) is connected with the sensitive resistance material in sensitive layer (205), described sacrifice layer (211) is the polyimide material of making by spin coating planarization or passes through amorphous silicon or the amorphous GeSi of PECVD deposit, then by CMP method, realizes planarization,
The 5th step, employing photoetching, evaporation or sputter, etching technics are produced after getter (207), the second soldered material (208), adopt oxygen plasma ashing technology or XeF
2gaseous corrosion technology discharges sacrifice layer (211), discharges cavity (210); Described oxygen plasma ashing technology is to be polyimides for sacrificial layer material, described XeF
2gaseous corrosion technology is to be amorphous silicon or amorphous GeSi for sacrificial layer material;
The 6th step, on the TSV structure (103) of first wafer (101) and the electric connection point of dielectric material (102), adopt IC in common process photoetching, evaporation or sputter, etching technics produce the first soldered material (105);
The 7th step, by wafer bonding technique, realize aligning and the bonding of first wafer (101) and the second wafer (201), realize the electrical connection of IR FPA and reading circuit and the Vacuum Package of whole IR FPA device; The anti-reflecting layer material (213) of making infrared window after cleaning completes by evaporation or sputtering technology at the second wafer (201) back side, completes the making of whole IR FPA device, finally completes the cutting to IR FPA device.
5. the IR FPA device of wafer-level vacuum packaged, comprise first wafer (101) and the second wafer (201), it is characterized in that: described first wafer (101) is conventional silicon chip, adopt conventional IC manufacture craft to produce the reading circuit of IR FPA, with first wafer (101) the superiors metal, produce the reflector (104) of the needed resonance absorption of IR FPA device simultaneously, at first wafer (101), there is the one side of reflector (104) to be deposited with dielectric material (102), described dielectric material (102) comprises the boss in middle part, boss surrounding is lower than formation edge, middle part, in described boss, be shaped with TSV structure (103), described edge is provided with electrical connection through hole (107), at the electric connection point of TSV structure (103) and dielectric material (102), makes the first soldered material (105), on the silicon substrate of the second wafer (201), by conventional IC technique, produce the micro-structural for IR FPA device, comprise: described the second wafer (201) front is manufactured with barrier oxide layer (202), in barrier oxide layer (202), be manufactured with metal connecting line (203), form the electrical wiring (204) of MEMS structure, metal in heat isolation cantilever beam (206) is connected with described electrical wiring (204), metal in heat isolation cantilever beam (206) is connected with the sensitive resistance material in sensitive layer (205), the the second soldered material (208) that is also manufactured with the getter (207) for Vacuum Package and welds for two wafer in barrier oxide layer (202), the second soldered material (208) is connected with electrical wiring (204), described sensitive layer (205), heat isolation cantilever beam (206), getter (207), between the second soldered material (208), form vacuum chamber (210), at the upper and lower surface of the second wafer (201), be also manufactured with the required antireflection material of infrared window, by described first wafer (101) and the bonding of the second wafer (201), realize wafer-level vacuum packaged.
6. the IR FPA device of wafer-level vacuum packaged as claimed in claim 5, is characterized in that, in the region relative with groove, described the second wafer (201) back side, is manufactured with the microlens array (212) for cumulative.
7. the IR FPA device of wafer-level vacuum packaged as claimed in claim 5, is characterized in that, the resonance absorption layer in described sensitive layer (205) be positioned at sensitive layer (205) above or below.
8. the manufacture method of the IR FPA device wafers level Vacuum Package of wafer-level vacuum packaged, is characterized in that, step is as follows:
The first step, on the silicon substrate of first wafer (101), by conventional IC technique, produce the required reading circuit of IR FPA, utilize silicon substrate the superiors metal to produce the needed reflector of IR FPA resonance absorption structure (104), the deposit that then has the one side of reflector (104) to complete passivation layer medium at first wafer (101) forms dielectric material (102);
Second step, by photoetching, lithographic method, in the periphery of reading circuit, produce deep hole, then pass through evaporation or the sputtering method Seed Layer in inner walls of deep holes splash-proofing sputtering metal barrier layer or plating, then by sputter, CVD or electro-plating method, complete the filling of metal material in deep hole, finally by CMP method, remove unnecessary metal material, realize planarization and complete the making of TSV structure (103); And carve the upper unnecessary dielectric layer of reflector (104) by the method for photoetching, etching;
The 3rd step: produce IR FPA device in the second wafer (201): adopt LPCVD, PECVD, photoetching, etching, evaporation and sputtering technology, in the upper barrier oxide layer (202) of making of the second wafer (201), then on barrier oxide layer (202), make metal connecting line (203), form electrical wiring (204), then cover upper sacrificial layer (211), in the upper hole that is used for connecting electrical wiring (204) and heat isolation cantilever beam (206) that makes of sacrifice layer (211), then make sensitive layer (205) and heat isolation cantilever beam (206), electric conducting material in heat isolation cantilever beam 206 is connected with the sensitive resistance material in sensitive layer (205), described sacrifice layer (211) is the polyimide material of making by spin coating planarization or passes through amorphous silicon or the amorphous GeSi of PECVD deposit, then by CMP method, realizes planarization,
The 4th step, employing photoetching, evaporation or sputter, etching technics are produced after getter (207), the second soldered material (208), adopt oxygen plasma ashing technology or XeF
2gaseous corrosion technology discharges sacrifice layer (211), discharges cavity (210); Described oxygen plasma ashing technology is to be polyimides for sacrificial layer material, described XeF
2gaseous corrosion technology is to be amorphous silicon or amorphous GeSi for sacrificial layer material;
The 5th step, on the TSV structure (103) of first wafer (101) and the electric connection point of dielectric material (102), adopt IC in common process photoetching, evaporation or sputter, etching technics produce the first soldered material (105);
The 6th step, by wafer bonding technique, realize aligning and the bonding of first wafer (101) and the second wafer (201), realize the electrical connection of IR FPA and reading circuit and the Vacuum Package of whole IR FPA device; The anti-reflecting layer material (213) of making infrared window after cleaning completes by evaporation or sputtering technology at the second wafer (201) back side, completes the making of whole IR FPA device;
The 7th step, by the method for photoetching, etching, carve the unnecessary anti-reflecting layer material (213) of the second wafer (201), substrate and barrier oxide layer (202), expose electrical connection through hole (107); Finally by cutting, complete the separation of each IR FPA device.
9. the IR FPA device of wafer-level vacuum packaged, comprise first wafer (101), the second wafer and the 3rd wafer (301), it is characterized in that: on the silicon substrate of described first wafer (101), adopt conventional IC manufacture craft to produce the reading circuit of IR FPA, with first wafer (101) the superiors metal, produce the reflector (104) of the needed resonance absorption of IR FPA device simultaneously, at first wafer (101), there is the one side of reflector (104) to be deposited with dielectric material (102), described dielectric material (102) comprises the boss in middle part, boss surrounding is lower than formation edge, middle part, in described boss, be shaped with TSV structure (103), described edge is provided with electrical connection through hole (107), at the electric connection point of TSV structure (103) and dielectric material (102), makes the first soldered material (105), on the silicon substrate of the second wafer, produce the micro-structural for IR FPA device, comprise: described the second wafer (201) front is manufactured with barrier oxide layer (202), in barrier oxide layer (202), be manufactured with metal connecting line (203), form the electrical wiring (204) of MEMS structure, metal in heat isolation cantilever beam (206) is connected with described electrical wiring (204), metal in heat isolation cantilever beam (206) is connected with the sensitive resistance material in sensitive layer (205), the the second soldered material (208) that is also manufactured with the getter (207) for Vacuum Package and welds for two wafer in barrier oxide layer (202), the second soldered material (208) is connected with electrical wiring (204), then the silicon materials of described the second wafer are completely removed, on the silicon substrate of described the 3rd wafer (301), produce the block for the encapsulation of IR FPA component vacuum, comprising: groove and the anti-reflecting layer material (302) of making in groove surfaces, and the anti-reflecting layer material at the 3rd wafer (301) back side, bonding successively by described first wafer (101), the second wafer and the 3rd wafer (301) is realized wafer-level vacuum packaged.
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