CN112117372B

CN112117372B - Method for manufacturing thermopile sensor

Info

Publication number: CN112117372B
Application number: CN202010617265.1A
Authority: CN
Inventors: 黄河
Original assignee: Smic Ningbo Co ltd Shanghai Branch
Current assignee: Smic Ningbo Co ltd Shanghai Branch
Priority date: 2020-06-30
Filing date: 2020-06-30
Publication date: 2023-02-21
Anticipated expiration: 2040-06-30
Also published as: CN112117372A

Abstract

The embodiment of the invention provides a manufacturing method of a thermopile sensor, which comprises the steps of providing a thermopile structure plate, wherein the thermopile structure plate comprises a thermal radiation sensing area, and a thermopile structure is formed in the thermal radiation sensing area; providing a circuit substrate, forming a thermal radiation reflecting plate on the circuit substrate, and forming a first groove on a supporting layer covering the circuit substrate, wherein the thermal radiation reflecting plate is positioned below the first groove; and bonding the supporting layer and the thermopile structure plate to enable the first groove to be clamped between the thermopile structure plate and the circuit substrate to form a first cavity, wherein the thermal radiation reflecting plate is positioned below the thermopile structure. The thermopile sensor obtained by the manufacturing method of the thermopile sensor provided by the embodiment of the invention can avoid loss of infrared radiation and improve the measurement precision.

Description

Method for manufacturing thermopile sensor

Technical Field

The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing method of a thermopile sensor.

Background

The thermopile sensor (english name: transducer/sensor) is a detection device, which converts sensed information to corresponding signals according to a certain rule and outputs the signals, so as to detect the information. Typical thermopile sensors such as temperature thermopile sensors, pressure thermopile sensors, optical thermopile sensors, etc. not only promote the transformation and update of the traditional industry, but also continuously develop new industries, becoming the focus of people's attention.

With the rapid development of micro-electro-mechanical systems (MEMS) technology, the miniaturized thermopile sensor manufactured based on MEMS micromachining technology is widely applied to the fields of temperature measurement, gas sensing, optical imaging, and the like, due to its advantages of small size, low price, and the like.

However, the device accuracy of the existing thermopile sensor is to be improved.

Disclosure of Invention

The invention solves the problem of how to improve the device precision of the thermopile sensor.

In order to solve the above problem, an embodiment of the present invention provides a method for manufacturing a thermopile sensor, including:

providing a thermopile structure plate, the thermopile structure plate including a thermal radiation sensing region in which a thermopile structure is formed;

providing a circuit substrate, forming a heat radiation reflecting plate on the circuit substrate, and forming a first groove on a supporting layer covering the circuit substrate, wherein the heat radiation reflecting plate is positioned below the first groove;

and bonding the supporting layer and the thermopile structure plate to enable the first groove to be clamped between the thermopile structure plate and the circuit substrate to form a first cavity, wherein the thermal radiation reflecting plate is positioned below the thermopile structure.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:

in the manufacturing method of the thermopile sensor provided by the embodiment of the invention, the first cavity is formed by being clamped between the thermopile structure plate and the circuit substrate, so that thermal insulation can be performed through the first cavity, heat received by the thermopile structure is prevented from being conducted to the circuit substrate below the first cavity, loss of infrared radiation is further avoided, and the measurement accuracy of the thermopile sensor is improved.

In the manufacturing method of the thermopile sensor provided by the embodiment of the invention, the thermal radiation reflecting plate is formed below the first groove, and the thermal radiation reflecting plate can reflect infrared radiation transmitted into the isolation cavity back to the thermopile structure plate, so that the accuracy of the thermopile sensor is improved.

In the manufacturing method of the thermopile sensor provided by the embodiment of the invention, after the circuit substrate is bonded with the thermopile structure plate, the circuit substrate is arranged below the first cavity surrounded by the circuit substrate and the thermopile structure plate, so that radiation loss corresponding to the open cavity can be avoided, the measurement precision of the thermopile sensor is improved, vertical system integration of devices is realized under the condition of not increasing the area, the interconnection length from a sensing signal to a reading circuit, signal loss and noise are favorably shortened, and the miniaturization of the thermopile sensor is favorably realized; in addition, the method is favorable for further extending to the 3D system integration of manufacturing the active thermal imaging sensor array, the CMOS readout pixel array and peripheral circuits.

In an alternative aspect of the manufacturing method of the thermopile sensor according to the embodiment of the present invention, after the circuit substrate is bonded to the thermopile structure plate, the first interconnection structure is located below the thermopile structure, and does not block the thermopile structure from absorbing infrared radiation, so that the measurement accuracy of the thermopile sensor may be improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

Fig. 1-10 are schematic structural diagrams corresponding to steps in a method for manufacturing a thermopile sensor according to an embodiment of the present invention.

FIG. 11 is a schematic diagram of a thermopile sensor according to an embodiment of the present invention;

fig. 12 is a schematic structural diagram of another thermopile sensor according to an embodiment of the present invention.

Detailed Description

It is known in the background art that the device accuracy of the existing thermopile sensor needs to be improved.

The inventor analyzes and considers that the thermopile sensor is also called a thermopile infrared detector, and the traditional thermopile sensor is used for manufacturing a thermocouple pair by depositing polycrystalline silicon/metal on a medium film so as to sense temperature information, then forming a heat insulation cavity below the medium film by a manufacturing method of back silicon anisotropic wet etching so as to increase heat resistance, and electrically connecting the thermocouple pair to a circuit structure formed on the opposite side of the thermocouple, so that the transmission of a sensing signal is realized. However, the device formed by the method has no substrate structure below, and heat in the heat insulation cavity can still be lost in a certain form, so that the measurement accuracy of the thermopile sensor is not high.

providing a thermopile structure plate, the thermopile structure plate including a thermal radiation sensing region in which a thermopile structure is formed; providing a circuit substrate, forming a thermal radiation reflecting plate on the circuit substrate, and forming a first groove on a supporting layer covering the circuit substrate, wherein the thermal radiation reflecting plate is positioned below the first groove;

In the manufacturing method of the thermopile sensor provided in the embodiment of the present invention, after the circuit substrate is bonded to the thermopile structure plate, the circuit substrate is disposed below the first cavity surrounded by the circuit substrate and the thermopile structure plate, so that radiation loss corresponding to an open cavity can be avoided, the measurement accuracy of the thermopile sensor is improved, vertical system integration of devices is realized without increasing an area, interconnection length from a sensing signal to a readout circuit, signal loss and noise are favorably shortened, and miniaturization of the thermopile sensor is favorably achieved; in addition, it is beneficial to further extend to 3D system integration of fabricating active thermal imaging sensor arrays with CMOS readout pixel arrays and peripheral circuits.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art without any inventive work based on the embodiments of the present invention belong to the protection scope of the present invention, and for the convenience of description, the heat radiation reflecting plate and the heat radiation isolating plate are schematically illustrated on the circuit substrate.

Referring to fig. 1 to 10, fig. 1 to 10 are schematic structural diagrams corresponding to steps in a method for manufacturing a thermopile sensor according to an embodiment of the present invention.

As shown in fig. 1, a thermopile structure plate 20 is provided, the thermopile structure plate 20 having a heat radiation sensing region 20A in which a thermopile structure is formed.

The thermopile structure plate 20 may include a first substrate 200, and the thermopile structure is formed on the first substrate 200. The first base 200 may be any suitable substrate material known to those skilled in the art, such as a bulk semiconductor substrate material of silicon, germanium, silicon germanium, gallium arsenide, indium phosphide, or the like.

A semiconductor layer 202 and a dielectric layer 201 may be formed on the first substrate 200, the semiconductor layer 202 is used to form a thermopile structure, a material of the semiconductor layer 202 may be an undoped semiconductor layer (e.g., polysilicon or single crystal silicon, etc.), or an N-type doped or P-type doped semiconductor layer, and the semiconductor layer 202 may be formed by an epitaxial process or an ion implantation process. The dielectric layer 201 is used for isolating the thermopile structure from the first substrate, and the material of the dielectric layer 201 includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

In this embodiment, the step of providing the thermopile structure plate includes:

providing a first substrate 200, wherein a semiconductor layer 202 is formed on the surface of the first substrate 200;

and carrying out N-type and/or P-type ion doping on a partial region of the semiconductor layer 202 to form an N-type doped region and/or a P-type doped region as the thermopile structure. As shown in fig. 1, in one embodiment, the first base 200, the dielectric layer 201 and the semiconductor layer 202 are formed of a silicon-on-insulator substrate, the first base 200 is a bottom layer single crystal silicon of the silicon-on-insulator substrate, the dielectric layer 201 is silicon dioxide of the silicon-on-insulator substrate, and the semiconductor layer 202 is a top layer single crystal silicon of the silicon-on-insulator substrate. At least one thermally-induced microstructure is formed as a thermopile structure by implanting N-type and/or P-type ion doping into a portion of the semiconductor layer 202.

The distribution area of the thermopile structure serves as a heat radiation sensing area 20A, and the area around the heat radiation sensing area 20A is used for the subsequent fabrication of a second interconnection structure.

In one embodiment, the thermopile structure includes a first thermal sensing microstructure 203a and a second thermal sensing microstructure 203b of different materials, the first thermal sensing microstructure 203a is N-type doped single crystal silicon, and the second thermal sensing microstructure 203b is P-type doped single crystal silicon. The first and second

heat sensing microstructures

203a and 203b may have a substantially symmetrical structure, so that a substantially symmetrical heat sensing effect is generated between the first and second

heat sensing microstructures

203a and 203b, thereby improving the measurement accuracy of the thermopile sensor.

It should be noted that, in one specific embodiment, the first thermal-sensing microstructure 203a and the second thermal-sensing microstructure 203b are both single-layer structures, but the technical solution of the present invention is not limited thereto, and in other embodiments of the present invention, the first thermal-sensing microstructure 203a and the second thermal-sensing microstructure 203b may also be stacked structures, and in this case, the first thermal-sensing microstructure 203a and the second thermal-sensing microstructure 203b may be formed by performing multiple ion implantations into the semiconductor layer 202, where the concentration or the energy or the doping type of two adjacent ion implantations are different. Furthermore, the materials of the first thermal-sensing microstructure 203a and the second thermal-sensing microstructure 203b are not limited to doped semiconductors, and in other embodiments of the present invention, the corresponding thermal-sensing microstructures may be formed on the first substrate 200 by at least one of patterned etching of a metal layer, patterned etching of a semiconductor layer, metal silicidation of a semiconductor layer, and the like, so that the materials of the thermal-sensing microstructures may also be at least one of metal, undoped semiconductor, metal silicide, and the like.

Of course, the thermopile structure is not limited to a structure obtained by a doping method, and may be another structure obtained by another method. Referring to fig. 2, a first interconnection layer is formed on the thermopile structure plate, and at least a first interconnection structure is formed in the first interconnection layer and electrically connected to the thermopile structure, and is subsequently electrically connected to the readout circuit.

The first interconnect structure may be formed on the semiconductor layer 202 through a series of processes such as metal layer deposition, photolithography, etching, or a metal lift-off process, and may be a single metal layer, so as to reduce the integration thickness of the thermopile sensor.

The first interconnect structure may include a first conductive plug interconnect line 300a electrically connected to the first heat-sensing microstructure 203a, and a second conductive plug interconnect line 300b electrically connected to the second heat-sensing microstructure 203b.

In one embodiment, the material of the first interconnect structure may be one or more of copper, titanium, aluminum, tungsten, and/or metal silicide materials.

Referring to fig. 3, the first interconnect structure may be further covered with a first isolation layer 301. The first isolation layer 301 is used to cover the first and second conductive

plug interconnect lines

300a and 300b and the thermopile structure, to prevent contamination or oxidation of the corresponding structures, and to achieve necessary insulation isolation between adjacent conductive plug interconnect lines in adjacent first interconnect structures. Specifically, the first isolation material layer (not shown) may be formed by a deposition process, and the first isolation layer 301 may be formed by performing a top surface planarization process on the first isolation material layer by a Chemical Mechanical Polishing (CMP) process.

The material of the first isolation layer 301 may be one or more of silicon dioxide, silicon nitride, silicon oxynitride, and the like.

In a specific embodiment, a cavity connecting through hole may be further formed through the thermopile structure plate and the first interconnection layer, and the cavity connecting channel penetrates through the thermopile structure plate 20 and the first interconnection layer and communicates the second cavity 502 and the first cavity 602 shown in fig. 10, so that the air pressure of the second cavity 502 and the first cavity 602 can be balanced through the cavity connecting through hole, and the problems of warpage of the thermopile structure plate 20 and the like can be avoided.

Referring to fig. 4 and 5, a circuit substrate 10 is provided, a thermal radiation reflecting plate 702 is formed on the circuit substrate, and a first groove 600 is formed on a supporting layer covering the circuit substrate, the thermal radiation reflecting plate is located below the first groove.

Before the steps of forming the heat radiation reflecting plate 702 on the circuit substrate 10 and forming the first groove 600 on the supporting layer covering the circuit substrate, the method may further include:

a thermal radiation spacer 701 is formed on the circuit substrate 10, and the thermal radiation reflecting plate 702 is positioned above the thermal radiation spacer 701.

The circuit substrate 10 includes a heat radiation corresponding region 20B (shown in fig. 5) corresponding to the heat radiation sensing region.

The circuit substrate 10 provided may be a CMOS circuit substrate that performs FEOL and BEOL processes that are both conventional in the art of CMOS integrated circuit fabrication, as well as wafer-site testing, which is a conventional test scheme in the art for testing the performance of CMOS integrated circuits, and will not be described in detail herein.

It should be noted that, in an embodiment, the heat radiation corresponding region 20B may be a region corresponding to the distribution of the device structure, and the projection of the heat radiation corresponding region 20B on the circuit substrate is the same as the projection of the heat radiation sensing region 20A on the thermopile structure board, so that the heat radiation sensing region 20A and the heat radiation corresponding region 20B are overlapped in the subsequent bonding process, thereby realizing the position correspondence between the thermopile structure board 20 and the circuit substrate 1-.

The circuit substrate 10 may include a second base 100, a device structure formed in the second base 100, and

readout interconnection structures

104a, 104b electrically connected to the device structure, the

readout interconnection structures

104a, 104b being formed on the second base 100. The device structure and the

readout interconnect structure

104a, 104b electrically connected to the device structure may constitute a readout circuit.

The second substrate 100 may be any suitable semiconductor substrate material known to those skilled in the art, such as silicon, silicon-on-insulator, germanium, silicon germanium, gallium arsenide, indium phosphide, etc. The second substrate 100 has formed therein corresponding device structures through a CMOS fabrication process and device isolation structures located between adjacent device structures, and the device structures may include at least one of MOS transistors, resistors, diodes, capacitors, memories, and the like.

In one embodiment, the device structure is a MOS transistor, wherein the MOS transistor 102 may include a gate 102a and a source 102b and a drain 102c located on two sides of the gate 102 a. The device isolation structure 101 may be formed by a local field oxidation process or a Shallow Trench Isolation (STI) process. The

read interconnect structures

104a, 104b may be electrically connected by bottom contact plugs that are in direct electrical contact with corresponding terminals of the device structure and a multi-layer metal interconnect structure that is electrically connected to the bottom contact plugs, thereby enabling electrical connection of the read

interconnect structures

104a, 104b to the device structure.

Wherein an interlayer dielectric material layer 103 is further formed on the second substrate 100 so as to isolate adjacent metal interconnection layers. The interlayer dielectric material layer 103 of the circuit substrate 10 also exposes openings of partial surfaces of the

readout interconnection structures

104a and 104b, respectively, to form first and second probe points for wafer probe testing. The material of the interlayer dielectric material layer 103 may include at least one of silicon dioxide, silicon nitride, a low K dielectric having a dielectric constant K lower than silicon dioxide, a high K dielectric having a K higher than silicon dioxide, a metal nitride, and the like.

A thermal radiation reflecting plate 702 is formed on the circuit substrate 10, and the thermal radiation reflecting plate 702 is used to reflect infrared radiation transmitted into the first cavity 602 (shown in fig. 6) back into the thermopile structure plate 20 when the device is in operation, thereby improving the accuracy of the thermopile sensor.

In a specific embodiment, a thermal radiation isolation plate 701 may also be formed on the circuit substrate 10 such that the thermal radiation isolation plate 701 is located below the thermal radiation reflection plate 702.

The thermal radiation isolation plate 701 can isolate heat generated by the circuit substrate, so that the heat of the circuit substrate is prevented from being transferred to the thermopile structure plate, and the measurement precision of the thermopile sensor is improved.

A first trench 600 is formed in the supporting layer 601 covering the circuit substrate.

The material of the thermal radiation reflecting plate 702 is a conductive material and/or a photonic crystal material, the conductive material is one or more of a metal material, a metal silicide material, and a semiconductor material, the metal silicide may be titanium silicide (TiSi), tungsten silicide (WSi), or aluminum silicide (AlSi), and the like, and the doped semiconductor may be a polysilicon layer or an amorphous silicon layer or a silicon germanium layer doped with P-type or N-type dopant, for example. The material of the heat radiation shielding plate 701 is metal.

Specifically, the heat radiation reflecting plate 702 and the heat radiation shielding plate 701 may be formed by a series of processes of metal deposition, photolithography, etching, or the like, or a metal lift-off process.

In one embodiment, the circuit substrate 10 includes a thermal radiation corresponding region 20B, the thermal radiation corresponding region 20B corresponds to the thermal radiation sensing region, and the step of forming the thermal radiation reflecting plate and the thermal radiation isolating plate under the first trench may include:

forming a support layer 601 on the circuit substrate;

patterning the supporting layer to form an initial groove;

filling the initial trench with a first thickness to form the heat radiation spacer 701, the heat radiation spacer 701 being located at the bottom of the initial trench;

the initial trench of the second thickness is filled to form the thermal radiation reflecting plate 702, the thermal radiation reflecting plate 702 covers at least the thermal radiation separating plate 701, and the portion of the initial trench which is not filled is the first trench 600.

Wherein, when the thermal radiation separation plate 701 and the thermal radiation reflection plate 702 are metal materials, the separation material layer and the reflection material layer may be formed by a deposition process, respectively. When the thermal radiation spacer 701 and the thermal radiation reflecting plate 702 are metal silicides, the step of forming the spacer material layer includes: firstly, forming a silicon layer, and then carrying out metal silicification on the silicon layer; also, the reflective material layer may be formed in this manner. When the thermal radiation spacer 701 and the thermal radiation reflecting plate 702 are doped semiconductors, the forming of the spacer material layer includes: forming a semiconductor layer, and then carrying out N-type and/or P-type doping on the semiconductor layer; also, the reflective material layer may be formed in this manner.

In one embodiment, the heat radiation spacer 701 and the heat radiation reflecting plate 702 may further form a first passivation layer 710, the first passivation layer 710 at least covers the heat radiation spacer 701, and the heat radiation reflecting plate 702 at least covers the first passivation layer 710, thereby achieving the separation of the heat radiation spacer 701 and the heat radiation reflecting plate 702. Specifically, after the step of filling the initial trench of the first thickness to form the thermal radiation shielding plate 701, the step of filling the initial trench of the second thickness to form the thermal radiation reflecting plate 702 and the first trench 600 further includes: the initial trench of the third thickness is filled to form a first passivation layer 710, the first passivation layer 710 at least covers the heat radiation spacer 701, and the heat radiation reflecting plate at least covers the first passivation layer 710. The first passivation material layer may be formed using a deposition process. Of course, the step of removing the reflective material layer and the spacer material layer outside the heat radiation corresponding region 20B further includes: the first passivation layer outside the heat radiation corresponding region 20B is removed to form a first passivation layer 710.

In one embodiment, the step of forming the first trench on the circuit substrate 10 and forming the thermal radiation reflecting plate 702 and the thermal radiation separating plate 701 below the first trench 600 further comprises: the initial trench of the fourth thickness is filled to form a third passivation layer 730, the third passivation layer 730 at least covering the thermal radiation reflecting plate 702. The third passivation layer 730 serves to protect the heat radiation reflection plate 702. In other embodiments, the third passivation layer 730 may not be formed.

The material of the third passivation layer 730 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, low-K dielectric, high-K dielectric, and metal nitride.

Specifically, the third passivation layer 730 covering the heat radiation reflecting plate 702 may be formed after the heat radiation spacer 701 and the heat radiation reflecting plate 702 are formed.

In one embodiment, the step of forming the thermal radiation reflecting plate and the thermal radiation isolating plate under the first trench may further include:

forming a thermal radiation reflecting plate 702 and a thermal radiation spacer 701 on the circuit substrate, the thermal radiation spacer 701 covering at least the circuit substrate, the thermal radiation reflecting plate 702 covering at least the thermal radiation spacer 701;

forming a support layer 601, the support layer 601 covering at least the heat radiation reflecting plate 702 and a part of the circuit substrate exposed from the heat radiation reflecting plate 702;

the support layer 601 is patterned to form the first grooves 600 corresponding to the heat radiation corresponding regions 20B.

The depth of the first trench 600 formed by the support layer 601 is less than or equal to the thickness of the support layer 601. A layer of support material (not shown) may be formed by a deposition process, the layer of support material covers the first and second conductive

plug interconnect lines

300a and 300b and the thermopile structure, and is patterned by a photolithography and etching process to form the first trench 600, and the remaining layer of support material forms the support layer 601. The supporting layer 601 is used to provide a basis for the subsequent formation of the first cavity, and on the other hand, the supporting layer 601 may also cover the first and second conductive

plug interconnection lines

300a and 300b and the thermopile structure, so as to avoid contamination or oxidation of the corresponding structures and to achieve the necessary insulation isolation between adjacent conductive plug interconnection lines in adjacent first interconnection structures.

The material of the support layer 601 may be one or more of silicon dioxide, silicon nitride, silicon oxynitride, and the like.

Wherein the step of forming the thermal radiation reflecting plate 702 and the thermal radiation spacer 701 on the circuit substrate may include:

forming a layer of isolating material (not shown) overlying the circuit substrate;

forming a layer of reflective material (not shown) overlying the layer of spacer material;

removing the reflective material layer and the isolation material layer outside the thermal radiation corresponding region 20B, and using the remaining reflective material layer as the thermal radiation reflecting plate 702 and the remaining isolation material layer as the thermal radiation isolating plate 701.

The formation methods of the thermal radiation isolation plate 701 and the thermal radiation reflection plate 702 are as described above, and are not described herein again.

In one embodiment, a first passivation layer 710 may be further formed between the heat radiation spacer 701 and the heat radiation reflection plate 702, thereby achieving the isolation of the heat radiation spacer 701 and the heat radiation reflection plate 702. Of course, the step of removing the reflective material layer and the spacer material layer outside the heat radiation corresponding region 20B further includes: the first passivation layer outside the heat radiation corresponding region 20B is removed to form a first passivation layer 710.

Of course, in an embodiment, after the forming the heat radiation reflecting plate 702 and the heat radiation isolating plate 701, before the bonding the circuit substrate and the thermopile structure plate, further includes:

a second passivation layer 720 is formed, and the second passivation layer 720 covers the circuit substrate exposed from the heat radiation reflecting plate 702. The thickness of the second passivation layer is not limited, and the surface of the second passivation layer may be flush with the surface of the thermal radiation reflection plate 702 or the second passivation layer may further cover the thermal radiation reflection plate 702 as long as the surface of the second passivation layer is ensured to be a plane.

It should be noted that the thermal radiation reflecting plate 702 and the thermal radiation separating plate 701 cover at least the thermal radiation corresponding region 20B of the circuit substrate, which means that the thermal radiation reflecting plate 702 and the thermal radiation separating plate 701 may cover the peripheral region of the thermal radiation corresponding region 20B in addition to the thermal radiation corresponding region 20B of the circuit substrate.

In another embodiment, the process of forming the thermal radiation spacer 701 and the thermal radiation reflecting plate 702 may include: forming a dielectric layer (not shown) on the circuit substrate 10, the dielectric layer having an opening corresponding to at least the heat radiation corresponding region of the substrate; filling the opening to form the heat radiation spacer 701; the thermal radiation reflecting plate 702 is formed on the thermal radiation spacer 701, and the thermal radiation reflecting plate 702 covers at least the thermal radiation spacer 701. Specifically, in the step of filling the opening to form the thermal radiation spacer 701, the thermal radiation spacer 701 may completely fill or even cover the opening such that the thermal radiation reflecting plate 702 is located above the opening, rather than filling into the opening, and in another embodiment, the thermal radiation spacer 701 may also partially fill the opening such that the thermal radiation reflecting plate 702 is located partially or completely within the opening.

In another embodiment, the process of forming the thermal radiation spacer 701 and the thermal radiation reflecting plate 702 may include: forming a dielectric material layer (not shown) covering the circuit substrate 10; removing the dielectric material layer in the heat radiation corresponding region 20B to form an opening (not shown) corresponding to at least the heat radiation corresponding region of the substrate, with the remaining dielectric material layer as a dielectric layer; sequentially forming an isolation material layer and a reflection material layer which conformally cover the dielectric layer and the opening, wherein the reflection material layer is positioned above the isolation material layer; and removing the isolating material layer and the reflecting material layer outside the opening, wherein the rest isolating material layer is taken as a heat radiation isolating plate 701, and the rest reflecting material layer is taken as a heat radiation reflecting plate 702. In this step, the openings may be openings for forming only the thermal radiation separating plate 701 and the thermal radiation reflecting plate 701, and the corresponding opening depths may be adapted to the sum of the thicknesses of the thermal radiation separating plate 701 and the thermal radiation reflecting plate 702, or may be smaller than the sum of the thicknesses for forming the thermal radiation separating plate 701 and the thermal radiation reflecting plate 702. Note that, when the spacer material layer and the reflective material layer outside the opening are removed, a Chemical Mechanical Polishing (CMP) process may be used.

In one embodiment, the first passivation layer 710 is further formed after the thermal radiation spacer 701 is formed and before the thermal radiation reflection plate 702 is formed, thereby achieving the isolation of the thermal radiation spacer 701 and the thermal radiation reflection plate 702. Specifically, a thermal radiation spacer 701 is formed, a first passivation layer 710 is formed to cover at least the thermal radiation spacer 701; the heat radiation reflecting plate 702 is formed on the first passivation layer 710.

In another embodiment, the process of forming the thermal radiation spacer 701 and the thermal radiation reflecting plate 702 may include: forming a first dielectric layer (not shown) on the circuit substrate, the first dielectric layer having a first opening corresponding to at least the heat radiation corresponding region of the substrate; filling the first opening to form the thermal radiation spacer 701; forming a second dielectric layer covering the first dielectric layer and the heat radiation isolation plate 701; patterning the second dielectric layer to form a second opening, wherein the second opening at least corresponds to the heat radiation corresponding area of the substrate, and the depth of the second opening is smaller than or equal to the thickness of the second dielectric layer; the second opening is filled to form the thermal radiation reflecting plate 702.

Specifically, a first dielectric layer can be deposited on the circuit substrate, and the first dielectric layer can also fill the first needle measuring points and the second needle measuring points; photoetching and etching the first dielectric layer to form a first opening in the first dielectric layer; depositing a thermal radiation isolation material to fill the first opening, etching to remove the excess thermal radiation isolation material, and forming the remaining thermal radiation isolation material into a thermal radiation isolation plate 701; forming a second dielectric layer on the thermal radiation isolation plate 701, wherein the second dielectric layer covers the first dielectric layer and the thermal radiation isolation plate 701, and photoetching and etching the second dielectric layer to form a second opening on the second dielectric layer. The depth of the second opening may be less than or equal to the thickness of the second dielectric layer, and when the depth of the second opening is equal to the thickness of the second dielectric layer, the lower surface of the thermal radiation reflecting plate 702 formed by subsequently filling the second opening is in contact with the upper surface of the thermal radiation insulating plate 701; when the depth of the second opening is less than the thickness of the second dielectric layer, the second dielectric layer may also function to isolate the heat radiation reflecting plate 702 from the heat radiation insulating plate 701, i.e., the second dielectric layer between the heat radiation reflecting plate 702 and the heat radiation insulating plate 701 functions as the first passivation layer 710 in other embodiments.

In one embodiment, a third passivation layer 730 having a planar surface is further formed on the heat radiation reflecting plate 702, the third passivation layer 730 at least covers the heat radiation reflecting plate 702, and the third passivation layer 730 protects the heat radiation reflecting plate 702. In other embodiments, the third passivation layer 730 may not be formed.

Specifically, the third passivation layer 730 covering the heat radiation reflecting plate 702 may be formed after the heat radiation spacer 701 and the heat radiation reflecting plate 702 are formed. Alternatively, a third passivation material layer (not shown) may be deposited by a deposition process and planarized by a Chemical Mechanical Polishing (CMP) process to form the third passivation layer 730 with a planar surface.

Bonding the circuit substrate 10 and the thermopile structure plate 20, so that the first trench 600 is sandwiched between the thermopile structure plate 10 and the circuit substrate 10 to form a first cavity 602, and the projection of the thermal radiation sensing region 20A and the projection of the thermal radiation corresponding region 20B on the circuit substrate 10 are overlapped, and the first interconnection structure, the thermal radiation reflecting plate 702 and the thermal radiation isolation plate 701 are all located below the thermopile structure.

In the embodiment of the invention, the first groove 600 is formed in the part of the supporting layer 601 opposite to the thermal radiation sensing area by adopting an etching process, and after the thermopile structure plate 20 is bonded with the circuit substrate 10, the first groove 600 is clamped between the thermopile structure plate and the circuit substrate to form the first cavity 602, so that the process is simple, the first cavity 602 can be used for thermal insulation, the heat received by the thermopile structure is prevented from being conducted to the circuit substrate below the first cavity 602, the loss of the sensing information corresponding to the opened first groove 600 is avoided, and the measurement accuracy of the sensor is improved.

Referring to fig. 6, after the circuit substrate 10 is bonded to the thermopile structure plate, the first interconnection structure may be located below the thermopile structure or above the thermopile structure.

Work as first interconnect structure is located during the below of thermopile structure, the below that first interconnect structure is located the thermopile structure can not form and block infrared radiation, makes infrared radiation transmit unobstructed to the route of thermopile structure, can reduce infrared radiation simultaneously and transmit to keeping apart the cavity, improves the measurement accuracy of thermopile sensor, can avoid first interconnect structure to the direct absorption of thermal radiation simultaneously, avoids causing the influence to the circuit substrate device, improves the stability of signal.

In order to locate the first interconnect structure below the thermopile structure, the thermopile structure plate 20 may be bonded upside down on the circuit substrate 10.

After the thermopile structure plate 20 is bonded to the circuit substrate 10, the first interconnection structure, the thermal radiation reflecting plate 702, and the thermal radiation isolation plate 701 are all located under the thermopile structure. The first interconnection structure is located the below of thermopile structure and can not form the infrared radiation and block, makes the route of infrared radiation transmission to thermopile structure unobstructed, can reduce infrared radiation simultaneously and transmit to keeping apart the cavity, improves thermopile sensor's measurement accuracy, can avoid first interconnection structure to the direct absorption of thermal radiation simultaneously, avoids causing the influence to the circuit substrate device, improves the stability of signal.

In one embodiment, the step of bonding the circuit substrate 10 and the thermopile structure plate 20 includes: the thermopile structure plate and the first interconnect layer are fixed upside down on the side of the circuit substrate having the

readout interconnect structures

104a, 104b.

In one embodiment, after bonding the thermopile structure plate and the thermopile structure plate 20, the thermal radiation reflecting plate 702 is vertically spaced from the thermopile structure by an odd number of 1/4 of the wavelength of the infrared radiation. Specifically, the vertical distance between the thermal radiation reflecting plate 702 and the thermopile structure may be adjusted by controlling the bonding process, so that the thermal radiation reflecting plate exerts the maximum reflection capability on the residual radiation penetrating through the thermopile structure plate.

Specifically, the vertical distance between the thermal radiation reflecting plate 702 and the thermopile structure 203a/203b is about an odd multiple of 1/4 of the wavelength λ of the incident radiation, e.g., about λ/4, 3 λ/4, 5 λ/4, etc. This enables a maximum reflection of the residual radiation penetrating the thermopile structure plate by the thermal radiation reflection plate 702.

Referring to fig. 7, in the embodiment of the invention, a thinning process is further performed on a side of the thermopile structure plate away from the circuit substrate, so as to remove the first substrate 200. Therefore, the integration thickness can be reduced, and the manufacturing difficulty of the subsequent second interconnection structure is reduced.

Specifically, the first substrate 200 may be removed by a suitable removal process (e.g., chemical mechanical polishing, etching, or stripping) according to the material of the first substrate 200.

Referring to fig. 8, the method for manufacturing the thermopile sensor further includes: forming

second interconnect structures

40a, 40b, the

second interconnect structures

40a, 40b electrically connecting the

readout interconnect structures

104a, 104b and the first interconnect structures. The

second interconnect structures

40a, 40b are used to output electrical signals of the first and

readout interconnect structures

104a, 104b. Wherein the second interconnection structures 40A, 40b are formed on the thermopile structure plate 20 at the periphery of the heat radiation sensing region 20A.

Specifically, the

second interconnect structures

40a and 40b may have various structures.

In one embodiment, the step of forming the

second interconnect structures

40a, 40b may include: forming a first interconnect via (not shown) and a second interconnect via (not shown) on a side of the thermopile structure plate facing away from the circuit substrate, the first interconnect via exposing a first interconnect structure of the thermopile structure plate, the second interconnect via exposing a readout interconnect structure in the circuit substrate; forming an insulating medium layer on the side walls of the first interconnection through hole and the second interconnection through hole; forming a first plug in the first interconnect via and a second plug in the second interconnect via; and forming a plug interconnection line on the surface of the thermopile structure plate, wherein the plug interconnection line is connected with the first plug and the second plug.

In one embodiment, the

second interconnect structures

40a, 40b are formed by a re-routing process, which specifically includes a process of forming the

second plugs

401a, 401b, a process of forming the

first plugs

403a, 403b, and a process of forming the

plug interconnect lines

402a, 402 b. The order of performing the processes for forming the

second plugs

401a and 401b and the processes for forming the

first plugs

403a and 403b is not limited. The second plugs 401a, the first plugs 403a, and the plug interconnect lines 402a constitute a second interconnect structure 40a, and the second plugs 401b, the first plugs 403b, and the plug interconnect lines 402b constitute a second interconnect structure 40b.

The process of forming the

first plugs

403a, 403b specifically includes: first, the thermopile structure plate 20, the first isolation layer 301, the support layer 601, the second passivation layer 720 and a portion of the interlayer dielectric material layer 103 at the periphery of the thermal radiation sensing region 20A are etched to form first contact holes (not shown) respectively exposing portions of the top surfaces of the

readout interconnection structures

104a, 104 b; then, covering an insulating medium layer on the side wall of the first contact hole, wherein the insulating medium layer is used for insulating and isolating the conductive material filled subsequently from the thermopile structure plate 20, the material of the insulating medium layer may include at least one of silicon oxide, silicon nitride, silicon oxynitride, metal nitride, high-K dielectric, low-K dielectric, and the like, and the bottom of the insulating medium layer exposes a part of the top surface of the corresponding

readout interconnection structure

104a, 104 b; next, the first contact hole is filled with a conductive material such as metal (e.g., tungsten, copper), and the excess conductive material covering the surface of the dielectric layer 201 is removed by a chemical mechanical polishing process, so as to form

first plugs

403a and 403b. In one embodiment, the bottom end of the first plug 403a is electrically connected to the readout interconnect structure 104a. The bottom end of the first plug 403b is electrically connected to the readout interconnect 104b.

The process of forming the

second plugs

401a, 401b specifically includes: first, the thermopile structure plate 20 at the periphery of the thermal radiation sensing region 20A is etched to form a second contact hole (not shown) exposing a part of the surface of the first interconnect structure; then, covering an insulating medium layer on the side wall of the second contact hole, wherein the insulating medium layer is used for insulating and isolating the conductive material filled subsequently from the thermopile structure plate 20, the material of the insulating medium layer may include at least one of silicon oxide, silicon nitride, silicon oxynitride, metal nitride, a high-K medium, a low-K medium and the like, and the bottom of the insulating medium layer exposes the surface of the corresponding first interconnection structure; next, the second contact hole is filled with a conductive material such as metal (e.g., tungsten, copper), and the excess conductive material covering the surface of the dielectric layer 201 is removed by a chemical mechanical polishing process, so as to form the

second plugs

401a and 401b. In one embodiment, the bottom end of the second plug 401a is electrically connected to the first conductive plug interconnect line 300 a. The bottom end of the second plug 401b is electrically connected to the second conductive plug interconnect line 300b.

The process of forming the

plug interconnect lines

402a, 402b specifically includes: depositing a metal layer on the surfaces of the

first plugs

403a and 403b, the

second plugs

401a and 401b and the dielectric layer 201; the metal layer is subjected to photolithography and etching to remove the metal layer in the thermal radiation sensing region 20A, and the remaining metal layer forms plug

interconnect lines

402a, 402b, the plug interconnect line 402a covers the top ends of the first plug 403a and the second plug 401a and electrically connects the top end of the first plug 403a and the top end of the second plug 401a, and the plug interconnect line 402b covers the top ends of the first plug 403b and the second plug 401b and electrically connects the top end of the first plug 403b and the top end of the second plug 401b.

It should be noted that when the thermopile structure plate 20 is formed based on a non-conductive material plate, the insulating medium layer may be omitted on the sidewalls of the conductive material in the

second plugs

401a, 401b and the

first plugs

403a, 403b.

Of course, the structure of the second interconnection structure may have other forms.

Referring to fig. 11, fig. 11 is a schematic structural diagram of another thermopile sensor according to an embodiment of the present invention.

As shown in fig. 11, the second interconnect structure may include third and fourth plugs 110A, 110b provided at the periphery of the heat radiation sensing region 20A, the third plugs including thermopile sub-plugs (shown as 400A, 400b in fig. 11) penetrating the thermopile structure plate 20 and circuit substrate sub-plugs (shown as 109a, 109b in fig. 11) penetrating the support layer 601.

The circuit substrate sub-plugs 109a, 109b and the fourth plugs 110a, 110b may be formed by etching and filling before the thermopile structure board is bonded to the circuit substrate, and the thermopile sub-plugs 400a, 400b are formed after bonding, which is similar to the above method for forming the

first plugs

403a, 403a and will not be described herein again.

Specifically, one third plug is mainly composed of the thermopile sub-plug 400a and the circuit substrate sub-plug 109a, and the other third plug is mainly composed of the thermopile sub-plug 400b and the circuit substrate sub-plug 109 b. The bottom end of the thermopile sub-plug 400a and the top end of the circuit substrate sub-plug 109a are bonded and electrically connected, the top end of the thermopile sub-plug 400a is exposed by the cover and the thermopile structure plate 20, and the bottom end of the circuit substrate sub-plug 109a is electrically connected to the readout interconnection structure 104a. The bottom end of the thermopile sub-plug 400b and the top end of the circuit substrate sub-plug 109b are bonded and electrically connected, the top end of the thermopile sub-plug 400b is exposed by the cover and the thermopile structure plate 20, and the bottom end of the circuit substrate sub-plug 109b is electrically connected to the readout interconnection structure 104b. The fourth plug 110a and the circuit substrate sub-plug 109a are located on the same side and penetrate through the supporting layer 601, the top end of the fourth plug 110a is bonded and electrically connected to the first conductive plug interconnection line 300a, the bottom end of the fourth plug 110a is electrically connected to the readout interconnection structure 104a, the fourth plug 110b and the circuit substrate sub-plug 109b are located on the same side and penetrate through the supporting layer 601, the top end of the fourth plug 110ba is bonded and electrically connected to the second conductive plug interconnection line 300b, and the bottom end of the fourth plug 110ba is electrically connected to the readout interconnection structure 104b. The first interconnect structure in the first interconnect layer is a multi-layer metal interconnect structure, and the first conductive plug interconnect line 300a and the second conductive plug interconnect line 300b respectively include a plurality of metal layers and conductive vias electrically connecting two adjacent metal layers, at this time, the bottom layer structure of the first conductive plug interconnect line 300a close to the first thermal sensing microstructure 203a is electrically connected to the first thermal sensing microstructure 203a, the top layer structure far away from the first thermal sensing microstructure 203a is electrically connected to the readout interconnect structure 104a in the substrate 10 through the fourth plug 110a, the bottom layer structure of the second conductive plug interconnect line 300b close to the second thermal sensing microstructure 203b is electrically connected to the second thermal sensing microstructure 203b, and the top layer structure far away from the second thermal sensing microstructure 203b is electrically connected to the readout interconnect structure 104b in the substrate 10 through the fourth plug 110 b.

Referring to fig. 12, fig. 12 is a schematic structural diagram of another thermopile sensor according to an embodiment of the present invention.

As shown in fig. 12, the second interconnect structure may further include:

third plugs

403a, 403b and

fourth plugs

404a, 404b. The

third plugs

403a and 403b are formed by a contact hole process, and the structure and position of the third plugs are the same as those of the

first plugs

403a and 403b in the thermopile sensor shown in fig. 10, which is not described herein again. The

fourth plugs

404a, 404b may be formed by etching and filling before bonding the thermopile structure plate and the circuit substrate.

The interconnection structure in the first interconnection layer 30 is a multilayer metal interconnection structure, and the first conductive plug interconnection line 300a and the second conductive plug interconnection line 300b respectively include a plurality of metal layers and a conductive via electrically connecting two adjacent metal layers, where the bottom structure of the first conductive plug interconnection line 300a close to the first thermal-sensing microstructure 203a is electrically connected to the first thermal-sensing microstructure 203a, and a portion of the surface of the top structure far away from the first thermal-sensing microstructure 203a and a portion of the surface of the readout interconnection structure 104a are bonded together and electrically connected by the fourth plug 404 a. The bottom structure of the second conductive plug interconnect line 300b close to the second heat-sensing microstructure 203b is electrically connected to the second heat-sensing microstructure 203b, and a portion of the surface of the top structure far from the second heat-sensing microstructure 203b and a portion of the surface of the readout interconnect structure 104b are bonded together and electrically connected by the fourth plug 404b.

Referring to fig. 9-10, after forming the second interconnect structures 40A, 40b, a cap is further disposed on the thermopile sensor to protect the thermal radiation sensing region 20A of the thermopile sensor.

Specifically, a sealing cover with a second groove is provided;

bonding the cover to the thermopile structure plate with the second trench sandwiched between the cover and the thermopile structure plate forming a second cavity 502, with the second cavity 502 aligned with the first cavity 602;

and cutting the sealing cover to at least expose the plug interconnection line.

A radiation penetration window may be formed above the thermal radiation sensing region of the cover.

Wherein, the material of closing cap can be glass, plastics, semiconductor etc, through inciting somebody to action the closing cap bonding arrives thermopile structural slab deviates from circuit substrate's surface, in order to cover the thermal radiation induction zone 20A of thermopile structural slab, and, based on the setting of second slot makes the thermal radiation induction zone 20A top of thermopile structural slab is cavity structures, has avoided the contact of relevant material to the thermal radiation induction zone of thermopile structural slab to avoid causing the influence to the thermal radiation induction zone 20A of thermopile structural slab.

The shape of the radiation transmission window can be selected and arranged according to requirements, such as a circle, a rectangle and the like. The material of the radiation transmission window comprises one or two of a semiconductor (such as silicon, wire or ring, silicon-on-insulator and the like) or an organic filter material (such as polyethylene, polypropylene and the like).

An infrared antireflection film may be provided on the radiation transmission window.

In one embodiment, the step of providing the cap with the second groove comprises: providing a third substrate, depositing a cavity material layer on the third substrate, etching the cavity material layer until the surface of the third substrate is exposed, forming a second groove in the cavity material layer, and forming a cavity wall 501 by the residual cavity material; in another embodiment, a third substrate is provided, and then a partial thickness of the third substrate is etched to form a second trench 502 in the third substrate, where the material of the cavity wall 501 is the same as the material of the third substrate;

then, bonding the cover to the dielectric layer 201, and sandwiching the second trench between the cover and the thermopile structure plate to form a second cavity 502 aligned with the first cavity 602; the arrangement of the second cavity 502 can reduce the direct absorption of the incident thermal radiation by the upper layer structure as much as possible, and simultaneously store the incident thermal radiation to a certain extent, so that the incident radiation heat can be received by the thermopile structure to the maximum extent, and the performance of the thermopile sensor can be improved.

Next, the edges of the third substrate are trimmed by a laser cutting process or the like to expose the surfaces of the

plug interconnect lines

402a, 402b, thereby making the

plug interconnect lines

402a, 402b respective externally connected contact pads of the thermopile sensor.

In the manufacturing method of the thermopile sensor provided in the embodiments of the present invention, after the circuit substrate is bonded to the thermopile structure plate, the first interconnect structure is located below the thermopile structure. Since the first interconnection structure is located below the thermopile structure, the thermopile structure is not blocked from absorbing infrared radiation, so that the measurement accuracy of the thermopile sensor can be improved.

In the manufacturing method of the thermopile sensor provided by the embodiment of the invention, the first cavity is formed by being clamped between the first interconnection layer and the circuit substrate, so that thermal insulation can be performed through the first cavity, heat received by the thermopile structure is prevented from being conducted to the circuit substrate below the first cavity, loss of infrared radiation is further avoided, and the measurement accuracy of the thermopile sensor is improved.

In the method for manufacturing the thermopile sensor provided by the embodiment of the invention, the thermal radiation reflecting plate and the thermal radiation isolating plate are formed below the first groove, the thermal radiation reflecting plate can reflect infrared radiation transmitted into the isolation cavity back to the thermopile structure plate, so that the accuracy of the thermopile sensor is improved, the thermal radiation isolating plate can thermally insulate the circuit substrate below and the thermal radiation sensing area above, the influence of heat generated by the circuit substrate below on the thermal radiation sensing area above is prevented, and the measurement accuracy of the thermopile sensor can also be improved. In the manufacturing method of the thermopile sensor provided in the embodiment of the present invention, after the circuit substrate is bonded to the thermopile structure plate, a circuit substrate is disposed below the first cavity surrounded by the circuit substrate and the first interconnection layer, so that radiation loss corresponding to an open cavity can be avoided, the measurement accuracy of the thermopile sensor is improved, vertical system integration of devices is realized without increasing an area, interconnection length from a sensing signal to a readout circuit, signal loss and noise are reduced, and miniaturization of the thermopile sensor is facilitated; in addition, the method is favorable for further extending to the 3D system integration of manufacturing the active thermal imaging sensor array, the CMOS readout pixel array and peripheral circuits.

In order to solve the above problem, embodiments of the present invention further provide a thermopile sensor.

As shown in fig. 10, the thermopile sensor according to the present embodiment includes a thermopile structure plate 20 and a circuit substrate 10 bonded in sequence along the incident radiation direction (i.e., from top to bottom in fig. 12). The thermopile structure plate 20 has a heat radiation sensing region 20A in which a thermopile structure is formed and a first interconnection layer in which at least a first interconnection structure is formed, the first interconnection structure being electrically connected to the thermopile structure; a first cavity 602 is defined among the circuit substrate 10, the thermopile structure plate 20, and the first interconnection layer, the thermopile structure is disposed above the first cavity 602, a thermal radiation reflecting plate 702 and a thermal radiation isolating plate 701 are disposed at the bottom of the first cavity 602, and the thermal radiation reflecting plate 702 is located above the thermal radiation isolating plate 701.

The thermal radiation isolation plate 701 is used for thermally insulating a subsequently formed isolation cavity and preventing infrared radiation received by the thermopile structure from being conducted into the circuit substrate below the first cavity 602; the thermal radiation reflecting plate 702 is used to reflect infrared radiation transmitted into the first cavity 602 back into the thermopile structure plate during operation of the device, thereby improving the accuracy of the thermopile sensor.

The material of the thermal radiation reflecting plate 702 is a conductive material and/or a photonic crystal material, the conductive material is one or more of a metal material, a metal silicide material, and a semiconductor material, the metal silicide may be titanium silicide (TiSi), tungsten silicide (WSi), or aluminum silicide (AlSi), and the like, and the doped semiconductor may be a polysilicon layer or an amorphous silicon layer or a silicon germanium layer doped with P-type or N-type dopant, for example.

The material of the heat radiation shielding plate 701 is metal.

In an embodiment of the present invention, a first passivation layer 710 may be formed between the thermal radiation spacer 701 and the thermal radiation reflecting plate 702, thereby achieving the isolation of the thermal radiation spacer 701 from the thermal radiation reflecting plate 702.

In an embodiment of the present invention, a third passivation layer 730 may be formed on the thermal radiation reflecting plate 702 to cover at least the thermal radiation reflecting plate 702, and the upper surface of the thermal radiation reflecting plate 702 may be protected by the third passivation layer 730. In other embodiments, the upper surface of the heat radiation reflecting plate 702 may be exposed by the third passivation layer 730.

It should be noted that the thermal radiation reflecting plate 702 and the thermal radiation separating plate 701 cover at least the thermal radiation sensing area, that is, the thermal radiation reflecting plate 702 and the thermal radiation separating plate 701 may cover only the thermal radiation sensing area, or may cover both the thermal radiation sensing area and the periphery of the thermal radiation sensing area. Therefore, in an embodiment, when the thermal radiation reflecting plate 702 and the thermal radiation spacer 701 do not completely cover the periphery of the thermal radiation sensing region, the second passivation layer 720 provides a base for depositing a material by surrounding the thermal radiation reflecting plate and the thermal radiation spacer through the second passivation layer 720.

In one embodiment, the perpendicular distance between the thermal radiation reflecting plate 702 and the thermopile structure of the first thermal induction microstructure 203a, the second thermal induction microstructure 203b, etc. is an odd multiple of 1/4 of the wavelength λ of the incident radiation, such as λ/4, 3 λ/4, 5 λ/4, etc., thereby enabling a maximum reflection capability of the thermal radiation reflecting plate 702 for the residual radiation penetrating the thermopile structure plate 20.

In the thermopile sensor provided by the embodiment of the invention, the first interconnection structure is positioned below the thermopile structure. Because the first interconnection structure is positioned below the thermopile structure, the thermopile structure is not blocked from absorbing infrared radiation, so that the measurement accuracy of the thermopile sensor can be improved.

In the thermopile sensor provided by the embodiment of the invention, the first cavity can be thermally insulated, so that heat received by the thermopile structure is prevented from being conducted to the circuit substrate below the first cavity, the loss of infrared radiation is further avoided, and the measurement accuracy of the thermopile sensor is improved.

In the thermopile sensor provided by the embodiment of the invention, the thermal radiation reflecting plate and the thermal radiation isolating plate are formed below the first groove, the thermal radiation reflecting plate can reflect infrared radiation transmitted into the isolating cavity back to the thermopile structure plate, so that the accuracy of the thermopile sensor is improved, the thermal radiation isolating plate can thermally insulate the lower circuit substrate from the upper thermal radiation sensing area, the heat generated by the lower circuit substrate is prevented from influencing the upper thermal radiation sensing area, and the measurement accuracy of the thermopile sensor can also be improved.

In the thermopile sensor provided in the embodiment of the present invention, the circuit substrate is disposed below the first cavity surrounded by the circuit substrate and the first interconnection layer, so that radiation loss corresponding to an open cavity can be avoided, the measurement accuracy of the thermopile sensor is improved, vertical system integration of devices is realized without increasing an area, shortening of interconnection length from a sensing signal to a readout circuit, signal loss and noise is facilitated, and miniaturization of the thermopile sensor is facilitated; in addition, it is beneficial to further extend to 3D system integration of fabricating active thermal imaging sensor arrays with CMOS readout pixel arrays and peripheral circuits. The thermopile structure plate 20 may be selected from any suitable material known to those skilled in the art, such as a semiconductor substrate material, e.g., silicon-on-insulator, germanium, silicon germanium, gallium arsenide, indium phosphide, etc. The thermopile structure in the thermopile structure plate 20 includes at least one heat sensing microstructure, which may be formed of any suitable heat conducting material, for example, the material of the heat sensing microstructure includes at least one of a metal, an undoped semiconductor, a doped semiconductor, and a metal silicide, wherein the material of the undoped semiconductor or the doped semiconductor includes at least one of silicon, germanium, gallium arsenide, or indium phosphide, and the dopant of the doped semiconductor includes an N-type (e.g., arsenic, germanium, etc.) or P-type (e.g., boron fluoride, phosphorus, etc.) dopant. Optionally, the thermopile structure plate 20 is a semiconductor substrate, and the thermal sensing microstructure in the thermopile structure includes N-type and/or P-type doped regions formed in the semiconductor substrate, so that the fabrication of the thermopile structure is compatible with a CMOS process, thereby simplifying the process and reducing the cost.

In one embodiment, the thermopile structure includes a first heat sensing microstructure 203a and a second heat sensing microstructure 203b of different materials, the first heat sensing microstructure 203a being N-type doped single crystal silicon and the second heat sensing microstructure 203b being P-type doped single crystal silicon. The first and second

heat sensing microstructures

It should be noted that, in a specific embodiment, the first thermal-sensing microstructure 203a and the second thermal-sensing microstructure 203b are both single-layer structures, but the technical solution of the present invention is not limited thereto, and in other embodiments of the present invention, the first thermal-sensing microstructure 203a and the second thermal-sensing microstructure 203b may also be stacked structures respectively.

In one embodiment, the thermopile structure plate 20 includes a dielectric layer 201 and a semiconductor layer 202, the dielectric layer 201 includes at least one of silicon dioxide, silicon nitride, etc., the semiconductor layer 202 may be single crystal silicon or polysilicon, and the thermopile structure includes at least one heat-induced microstructure formed in the semiconductor layer 202.

The material of the first interconnection structure can comprise metal such as copper, titanium, aluminum, tungsten and the like, and/or metal silicide and the like. The first interconnection structure includes a first conductive plug interconnection line 300a and a second conductive plug interconnection line 300b, the first conductive plug interconnection line 300a is electrically connected to the first thermal-sensing microstructure 203a, and the second conductive plug interconnection line 300b is electrically connected to the second thermal-sensing microstructure 203b.

In one embodiment, a first isolation layer 301 is formed on the first interconnect structure, and the first isolation layer 301 covers the first thermal sensing microstructure 203a, the second thermal sensing microstructure 203b, the first conductive plug interconnect 300a and the second conductive plug interconnect 300b to protect the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b and to achieve the necessary insulation isolation between adjacent conductive plug interconnects in adjacent first interconnect structures.

In one embodiment, the first interconnection structure is a single-layer structure, and the first conductive plug interconnection line 300a and the second conductive plug interconnection line 300b are both a metal wire, the first conductive plug interconnection line 300a has one end electrically connected to the first thermal sensing microstructure 203a and the other end electrically connected to the readout interconnection structure 104a in the readout circuitry of the circuit substrate 10 through the second interconnection structure 40a, and the second conductive plug interconnection line 300b has one end electrically connected to the second thermal sensing microstructure 203b and the other end electrically connected to the readout interconnection structure 104b in the readout circuitry of the circuit substrate 10 through the second interconnection structure 40b. Therefore, the integration thickness of the thermopile sensor is reduced, and the miniaturization of the device is facilitated. In other embodiments of the present invention, the first interconnect structure may also be a multi-layer metal interconnect structure.

In one embodiment, a support layer 601 is formed on the first interconnect structure. The depth of the first grooves 600 of the support layer 601 may be less than or equal to the thickness of the support layer 601. The supporting layer 601 is used to provide a basis for the subsequent formation of the first cavity 602, and on the other hand, the supporting layer 601 may also cover the first and second conductive

plug interconnection lines

The circuit substrate 10 may include a second base 100 in which the circuit substrate 10 is formed, a device structure and

readout interconnection structures

104a, 104b electrically connected to the device structure, the

readout interconnection structures

104a, 104b being formed on the second base 100.

read interconnect structures

104a, 104b may be electrically connected by bottom contact plugs that are in direct electrical contact with corresponding terminals of the device structure and a multi-layer metal interconnect structure that is electrically connected to the bottom contact plugs, thereby achieving electrical connection of the read interconnect structure to the device structure. Wherein, an interlayer dielectric material layer 103 is further formed on the second substrate 100, thereby isolating adjacent metal interconnection layers. The interlayer dielectric material 103 may comprise at least one of silicon dioxide, silicon nitride, a low K dielectric having a dielectric constant K lower than silicon dioxide, a high K dielectric having a K higher than silicon dioxide, a metal nitride, and the like.

In one embodiment, the circuit substrate is configured with a readout circuit, the thermopile sensor further includes a second interconnection structure disposed at the periphery of the thermal radiation sensing region, and the readout circuit is electrically connected to the first interconnection structure through the second interconnection structure. The second interconnection structures 40A and 40b are rewiring structures formed by the same rewiring process and are located on the periphery of the thermal radiation sensing area 20A, so that the direct absorption of the second interconnection structures to thermal radiation can be avoided while the electric connection between the reading circuit in the circuit substrate 10 and the thermopile structure in the thermopile structure plate 20 is realized, the overall vertical thickness of the thermopile sensor can be reduced, the miniaturization of the thermopile sensor is facilitated, and the performance reliability of the device is improved.

The second interconnection structure comprises a first plug positioned in the thermopile structure plate, and the first plug is connected with the first interconnection structure; a second plug penetrating through the thermopile structure plate and electrically connected with the readout circuit; and a plug interconnect on the thermopile structure plate, the plug interconnect connecting the first plug and the second plug.

Specifically, the second interconnect structure 40a includes a second plug 401a, a first plug 403a and a plug interconnect 402a, the second interconnect structure 40b includes a second plug 401b, a first plug 403b and a plug interconnect 402b, the plug interconnects 402a and 402b are formed on a side of the thermopile structure plate 20 facing away from the first cavity 602, the

second plugs

401a and 401b are disposed in the thermopile structure plate 20, a bottom end of the second plug 401a is electrically connected to the first conductive plug interconnect 300a, a top end is electrically connected to the plug interconnect 402a, a bottom end of the second plug 401b is electrically connected to the second conductive plug interconnect 300b, and a top end is electrically connected to the plug interconnect 402b, the

first plugs

403a and 403b penetrate through the thermopile structure plate 20 and the first interconnect layer 30, a top end of the first plug 403a is electrically connected to the plug interconnect 402a, and a bottom end is electrically connected to the readout interconnect 104a in the circuit substrate 10; the top end of the first plug 403b is electrically connected to the plug interconnect line 402b, and the bottom end is electrically connected to the readout interconnect structure 104b in the circuit substrate 10.

In addition, in one embodiment, since the thermopile structure plate 20 is formed based on a semiconductor substrate, in order to avoid leakage between the

second plugs

401a and 401b and the

first plugs

403a and 403b and the thermopile structure plate 20, the sidewalls of the conductive materials in the

second plugs

401a and 401b and the

first plugs

403a and 403b are further surrounded by an insulating dielectric layer, and the material of the insulating dielectric layer includes at least one of silicon oxide, silicon nitride, silicon oxynitride, metal nitride, high-K dielectric and low-K dielectric. In other embodiments of the present invention, when the thermopile structure plate 20 is formed based on a non-conductive material plate, the enclosure of the insulating medium layer may be omitted on the sidewalls of the conductive material in the

second plugs

401a, 401b and the

first plugs

403a, 403b.

With continued reference to fig. 11, as shown in fig. 11, the second interconnect structure may include third and fourth plugs 110A, 110b disposed at the periphery of the heat radiation sensing region 20A, the third plugs including thermopile sub-plugs (400A, 400b in fig. 11) penetrating the thermopile structure plate 20 and circuit substrate sub-plugs (109 a, 109b in fig. 11) penetrating the support layer 601.

first plugs

403a, 403a and will not be described herein again.

Specifically, one third plug is mainly composed of the thermopile sub-plug 400a and the circuit substrate sub-plug 109a, and the other third plug is mainly composed of the thermopile sub-plug 400b and the circuit substrate sub-plug 109 b. The bottom end of the thermopile sub-plug 400a and the top end of the circuit substrate sub-plug 109a are bonded and electrically connected, the top end of the thermopile sub-plug 400a is exposed by the cover and the thermopile structure plate 20, and the bottom end of the circuit substrate sub-plug 109a is electrically connected to the readout interconnection structure 104a. The bottom end of the thermopile sub-plug 400b is bonded to and electrically connected to the top end of the circuit substrate sub-plug 109b, the top end of the thermopile sub-plug 400b is exposed by the cover and the thermopile structure plate 20, and the bottom end of the circuit substrate sub-plug 109b is electrically connected to the readout interconnection structure 104b. The fourth plug 110a and the circuit substrate sub-plug 109a are located on the same side and penetrate through the supporting layer 601, the top end of the fourth plug 110a is bonded and electrically connected with the first conductive plug interconnection line 300a, the bottom end of the fourth plug 110a is electrically connected with the readout interconnection structure 104a, the fourth plug 110b and the circuit substrate sub-plug 109b are located on the same side and penetrate through the supporting layer 601, the top end of the fourth plug 110b is bonded and electrically connected with the second conductive plug interconnection line 300b, and the bottom end of the fourth plug 110b is electrically connected with the readout interconnection structure 104b.

The first interconnect structure in the first interconnect layer 30 is a multi-layer metal interconnect structure, and the first conductive plug interconnect line 300a and the second conductive plug interconnect line 300b respectively include a plurality of metal layers and a conductive via electrically connecting two adjacent metal layers, at this time, the bottom layer structure of the first conductive plug interconnect line 300a close to the first thermal sensing microstructure 203a is electrically connected to the first thermal sensing microstructure 203a, the top layer structure far away from the first thermal sensing microstructure 203a is electrically connected to the readout interconnect structure 104a in the substrate 10 through the fourth plug 110a, the bottom layer structure of the second conductive plug interconnect line 300b close to the second thermal sensing microstructure 203b is electrically connected to the second thermal sensing microstructure 203b, and the top layer structure far away from the second thermal sensing microstructure 203b is electrically connected to the readout interconnect structure 104b in the substrate 10 through the fourth plug 110 b.

With continued reference to fig. 12, as shown in fig. 12, the second interconnect structure may further include:

third plugs

403a, 403b and

fourth plugs

404a, 404b. The

third plugs

403a, 403b are formed by a contact hole process, and the structure and position thereof are the same as the

first plugs

403a, 403b in the thermopile sensor shown in fig. 10, and are not repeated herein. The

fourth plugs

404a, 404b may be formed by etching and filling before the thermopile structure plate is bonded to the circuit substrate.

In a specific embodiment, the thermopile sensor further includes a cover bonded on a side of the thermopile structure plate 20 facing away from the circuit substrate 10, and a second cavity 502 is sandwiched between the cover and the thermopile structure plate 20, and the second cavity 502 is aligned with the first cavity 602. The arrangement of the second cavity 502 can reduce the direct absorption of the incident thermal radiation by the upper layer structure as much as possible, and simultaneously store the incident thermal radiation to a certain extent, so that the incident radiation heat can be received by the thermopile structure to the maximum extent, and the performance of the thermopile sensor can be improved.

A radiation penetration window is formed in a portion of the cover above the thermal radiation sensing region, the radiation penetration window being adapted to transmit infrared radiation. The shape of the radiation penetration window can be selected according to the requirement, such as a circle, a rectangle and the like. An infrared antireflection film may be provided on the radiation transmission window.

The material of the radiation transparent window comprises one or two of a semiconductor (such as silicon, wire or ring, silicon on insulator, etc.) or an organic filter material (such as polyethylene, polypropylene, etc.). In an alternative embodiment, the cover may comprise a third substrate and a cavity wall 501 formed on a side of the third substrate facing the thermopile structure plate 20, the cavity wall 501 and the dielectric layer 201 enclosing a second cavity 502. The material of the third substrate may be any suitable material known to those skilled in the art, such as glass, plastic, semiconductor, etc. The material of the chamber wall 501 may be the same as or different from the material of the third substrate.

In an optional embodiment, the thermopile structure plate and the first interconnect layer are provided with a cavity connecting through hole, and the cavity connecting through hole communicates the first cavity and the second cavity.

It should be noted that the thermopile sensor of the present invention is not limited to the specific structure examples in the above embodiments, and in other embodiments of the present invention, modifications and omissions are made to the corresponding structure in the thermopile sensor of the above embodiments on the premise of achieving the same function, and the obtained thermopile sensor also belongs to the protection scope of the technical solution of the present invention.

The embodiment of the invention also provides a sensor module which comprises the thermopile sensor. Compared with the existing sensor, the measurement accuracy of the sensor module is improved.

The embodiment of the invention also provides a terminal which comprises at least one processor and at least one thermopile sensor, wherein the thermopile sensor transmits a sensing signal to the processor. The terminal also has at least one lens and filter and associated electronic processor components. The terminal can be a temperature measuring device such as a forehead temperature gun, an ear temperature gun, a food temperature detecting instrument and the like, can also be a qualitative/quantitative analysis instrument of gas components, and can also be intelligent household appliances, lamp switches or medical equipment and the like. The temperature measuring device can also be a mobile terminal with a thermopile sensor, such as a mobile phone, a computer, a panel and the like, and has a temperature measuring function; in an embodiment, the electronic device is a thermal imager, and thermopile structures of the thermal imager are arranged in an array so as to realize thermal imaging of an object.

Although the embodiments of the present invention have been disclosed, the embodiments of the present invention are not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present embodiments, and it is intended that the scope of the present embodiments be defined by the appended claims.

Claims

1. A method of making a thermopile sensor, comprising:

providing a circuit substrate, wherein the circuit substrate comprises a heat radiation corresponding area, and the heat radiation corresponding area corresponds to the heat radiation induction area; forming a thermal radiation reflecting plate on the circuit substrate, and forming a first groove on a supporting layer covering the circuit substrate, wherein the first groove is located in the thermal radiation corresponding region, the thermal radiation reflecting plate is located below the first groove, a third passivation layer is formed between the thermal radiation reflecting plate and the first groove, and the supporting layer covers the exposed part of the circuit substrate of the thermal radiation reflecting plate;

bonding the supporting layer and the thermopile structure plate, so that the first groove is clamped between the thermopile structure plate and the circuit substrate to form a first cavity, and the thermal radiation reflecting plate is positioned below the thermopile structure;

further comprising:

providing a cover with a second groove;

bonding the cover to the side, away from the circuit substrate, of the thermopile structure plate, so that the second groove is clamped between the cover and the thermopile structure plate to form a second cavity, and the second cavity at least covers the heat radiation induction area;

and cutting the sealing cover, wherein a radiation penetrating window is formed above the heat radiation sensing area of the sealing cover.

2. The method of fabricating a thermopile sensor according to claim 1, wherein the step of forming a heat radiation reflecting plate on the circuit substrate and forming a first trench in a support layer covering the circuit substrate is preceded by the step of:

forming a thermal radiation spacer on the circuit substrate, the thermal radiation reflecting plate being located above the thermal radiation spacer;

after the thermoelectric stack structural plate is provided, the method further comprises the following steps:

forming a first interconnection layer on the thermopile structure plate, wherein at least a first interconnection structure is formed in the first interconnection layer and is electrically connected with the thermopile structure;

after the support layer is bonded with the thermopile structure plate, the first interconnection structure, the thermal radiation reflection plate, and the thermal radiation isolation plate are all located below the thermopile structure.

3. The method of fabricating a thermopile sensor according to claim 2,

the step of forming the thermal radiation reflecting plate and the thermal radiation isolating plate on the circuit substrate and forming the first trench in the supporting layer covering the circuit substrate includes:

forming a supporting layer on the circuit substrate;

patterning the supporting layer to form an initial groove, wherein the initial groove is positioned in the heat radiation corresponding region;

filling the initial trench with a first thickness to form a thermal radiation spacer, the thermal radiation spacer being located at the bottom of the initial trench;

filling the initial trench with a second thickness to form a thermal radiation reflecting plate, wherein the thermal radiation reflecting plate at least covers the thermal radiation isolating plate, and the unfilled part of the initial trench is the first trench.

4. The method of fabricating a thermopile sensor according to claim 3, wherein after the step of filling the initial trench of the first thickness to form the thermal radiation isolating plate, the step of filling the initial trench of the second thickness to form the thermal radiation reflecting plate and the first trench further comprises before the step of:

filling the initial trench of the third thickness to form a first passivation layer covering at least the heat radiation spacer, the heat radiation reflecting plate covering at least the first passivation layer.

5. The method of fabricating a thermopile sensor according to claim 3, wherein the forming a thermal radiation reflecting plate and a thermal radiation isolating plate on the circuit substrate and forming a first trench in a support layer covering the circuit substrate further comprises:

filling the initial trench of a fourth thickness to form a third passivation layer covering at least the thermal radiation reflecting plate.

6. The method of making a thermopile sensor of claim 2,

forming a thermal radiation reflecting plate and a thermal radiation isolating plate on the circuit substrate, wherein the thermal radiation isolating plate at least covers the circuit substrate, the thermal radiation reflecting plate at least covers the thermal radiation isolating plate, and the thermal radiation reflecting plate and the thermal radiation isolating plate are both positioned in the thermal radiation corresponding area;

forming a support layer covering at least the heat radiation reflection plate and a part of the circuit substrate exposed from the heat radiation reflection plate;

and patterning the support layer to form the first groove, wherein the first groove is positioned in the heat radiation corresponding area.

7. The method of fabricating a thermopile sensor according to claim 6, wherein the step of forming a thermal radiation reflecting plate and a thermal radiation isolating plate on the circuit substrate comprises:

forming an isolation material layer at least covering the circuit substrate;

forming a reflective material layer at least covering the spacer material layer;

and removing the reflecting material layer and the isolating material layer outside the heat radiation corresponding region, taking the residual reflecting material layer as a heat radiation reflecting plate, and taking the residual isolating material layer as a heat radiation isolating plate.

8. The method of fabricating a thermopile sensor according to claim 6, wherein the step of forming a thermal radiation reflecting plate and a thermal radiation isolating plate on the circuit substrate includes:

forming a dielectric layer on the circuit substrate, wherein the dielectric layer is provided with an opening, and the opening at least corresponds to the heat radiation corresponding area of the substrate;

filling the opening to form the thermal radiation isolation plate;

on the heat radiation spacer, the heat radiation reflecting plate is formed, the heat radiation reflecting plate covering at least the heat radiation spacer.

9. The method of fabricating a thermopile sensor of any one of claims 1-8, wherein the vertical distance of the thermal radiation reflecting plate from the thermopile structure is an odd multiple of 1/4 of the wavelength of infrared radiation.

10. The method of any of claims 1-8, wherein the thermopile structure comprises at least one heat-sensing microstructure comprising a material comprising at least one of a metal, an undoped semiconductor, a doped semiconductor, and a metal silicide; the undoped semiconductor or the doped semiconductor material comprises at least one of silicon, germanium, gallium arsenide, or indium phosphide, and the doped semiconductor dopant comprises an N-type or P-type dopant.

11. The method of making a thermopile sensor of claim 10, wherein the step of providing the thermopile structure plate comprises:

providing a first substrate, wherein a semiconductor layer is formed on the surface of the first substrate;

and carrying out N-type and/or P-type ion doping on partial region of the semiconductor layer to form an N-type doped region and/or a P-type doped region as the thermopile structure.

12. The method of fabricating a thermopile sensor according to claim 11, wherein the first base is a silicon-on-insulator substrate and the semiconductor layer is a top layer single crystal silicon of the silicon-on-insulator substrate.

13. The method of fabricating a thermopile sensor of any one of claims 1-8, wherein said thermopile structure plate comprises a first substrate on which said thermopile structure is formed, and further comprising, after said bonding of said circuit substrate to said thermopile structure plate: and removing the first substrate.

14. The method of fabricating a thermopile sensor of any one of claims 1-8, wherein the material of the thermal radiation reflecting plate comprises an electrically conductive material comprising at least one of a metal, a metal silicide, an undoped semiconductor, and a doped semiconductor, and/or a photonic crystal material.

15. The method of fabricating a thermopile sensor according to any one of claims 2-8, wherein the material of the thermal radiation spacer comprises a metal.

16. The method of manufacturing a thermopile sensor according to claim 2, wherein a readout circuit is disposed in the circuit substrate, the method further comprising:

forming a second interconnect structure on the thermopile structure plate at a periphery of the thermal radiation sensing region, the second interconnect structure electrically connecting the readout circuitry and the first interconnect structure.

17. The method of fabricating a thermopile sensor of claim 16, wherein the second interconnect structure comprises:

the first plug penetrates through the thermopile structure plate and the supporting layer, and the bottom end of the first plug is electrically connected with the readout circuit;

a second plug, a bottom end of the second plug electrically connected to the first interconnect structure;

a plug interconnect on the thermopile structure plate, the plug interconnect connecting the first plug and the second plug.

18. The method of fabricating a thermopile sensor of claim 16, wherein the second interconnect structure includes:

the third plug penetrates through the thermopile structure plate and the supporting layer, and the bottom end of the third plug is electrically connected with the readout circuit;

and the fourth plug penetrates through the supporting layer and is electrically connected with the readout circuit and the first interconnection structure.

19. The method of making a thermopile sensor of claim 18, wherein the third plug comprises:

the circuit substrate sub-plug is electrically connected with the reading circuit;

and the thermopile sub-plug is electrically connected with the first interconnection structure, and after the circuit substrate is bonded with the thermopile structure plate, the thermopile sub-plug is electrically connected with the circuit substrate sub-plug.