CN112117365A

CN112117365A - Method for manufacturing thermopile sensor

Info

Publication number: CN112117365A
Application number: CN202010615278.5A
Authority: CN
Inventors: 黄河
Original assignee: Smic Ningbo Co ltd Shanghai Branch
Current assignee: Smic Ningbo Co ltd Shanghai Branch; Ningbo Semiconductor International Corp Shanghai Branch
Priority date: 2020-06-30
Filing date: 2020-06-30
Publication date: 2020-12-22

Abstract

The embodiment of the invention provides a manufacturing method of a thermopile sensor, which comprises the following steps: providing a thermopile structure plate and a circuit substrate, wherein the thermopile structure plate comprises a thermal radiation induction area, a thermopile structure is formed in the thermal radiation induction area, and the circuit substrate comprises a thermal radiation isolation area; forming a supporting structure on the circuit substrate, wherein a heat radiation isolation plate and a sacrificial structure which are longitudinally stacked from bottom to top are formed in the supporting structure, and the heat radiation isolation plate and the sacrificial structure at least cover the heat radiation isolation region; bonding the thermopile structure plate on the surface of one side of the circuit substrate, on which the supporting structure is formed, so that the heat radiation induction area vertically corresponds to the heat radiation isolation area; and removing the sacrificial structure to form a first cavity between the thermopile structure plate and the circuit substrate. The manufacturing method of the thermopile sensor can improve the measurement accuracy of the thermopile sensor.

Description

Method for manufacturing thermopile sensor

Technical Field

The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing method of a thermopile sensor.

Background

The thermopile sensor is a temperature detection device, and the temperature detection is realized by converting sensed infrared information into corresponding signals according to a certain rule and outputting the signals.

With the rapid development of micro-electro-mechanical systems (MEMS) technology, the miniaturized thermopile sensor manufactured based on MEMS micromachining technology is widely applied to the fields of temperature measurement, gas sensing, optical imaging, and the like, due to its advantages of small size, low price, and the like.

However, the device accuracy of the existing thermopile sensor is to be improved.

Disclosure of Invention

The invention aims to provide a manufacturing method of a thermopile sensor to improve the precision of a device.

In order to solve the above problems, the present invention provides a method for manufacturing a thermopile sensor, the method comprising:

providing a thermopile structure plate and a circuit substrate, wherein the thermopile structure plate comprises a thermal radiation induction area, a thermopile structure is formed in the thermal radiation induction area, and the circuit substrate comprises a thermal radiation isolation area;

forming a supporting structure on the circuit substrate, wherein a heat radiation isolation plate and a sacrificial structure which are longitudinally stacked from bottom to top are formed in the supporting structure, and the heat radiation isolation plate and the sacrificial structure at least cover the heat radiation isolation region;

bonding the thermopile structure plate on the surface of one side of the circuit substrate, on which the supporting structure is formed, so that the heat radiation induction area vertically corresponds to the heat radiation isolation area;

and removing the sacrificial structure to form a first cavity between the thermopile structure plate and the circuit substrate.

Compared with the prior art, the technical scheme of the invention has the following advantages:

in the embodiment of the invention, the circuit substrate is arranged below the first cavity, so that radiation loss corresponding to the opened first cavity can be avoided, and the measurement precision of the device is improved. In addition, the scheme that the circuit substrate is arranged below the first cavity realizes vertical system integration of the device under the condition of not increasing the area, is favorable for shortening the interconnection length from the sensing signal to the reading circuit, signal loss and noise, and is favorable for miniaturization of the device; in addition, it is beneficial to further extend to 3D system integration of fabricating active thermal imaging sensor arrays with CMOS readout pixel arrays and peripheral circuits. The high-integration thermopile sensor is favorable for being applied to a thermal imager with a thermopile structure in array arrangement, is used for imaging temperature, or is applied to a small-size mobile terminal such as a mobile phone, a tablet personal computer and the like, and is used for mobile temperature measurement and the like.

According to the embodiment of the invention, the thermal radiation isolation plate is formed below the first cavity and is used for realizing thermal insulation of the thermal radiation sensing area of the circuit substrate and the thermopile structure plate and preventing thermal radiation in the circuit substrate from being conducted to the thermopile structure plate, so that the precision of a device is influenced.

In addition, the first cavity is formed through the sacrificial structure in the embodiment of the invention, so that the sacrificial structure can support the corresponding device structure in the process of forming the device, the defects of collapse and the like of the corresponding device structure are avoided, and the yield of the device is further improved.

Drawings

Fig. 1 to 10 are schematic structural diagrams of steps in a method for forming a thermopile sensor according to an embodiment of the present invention;

FIG. 11 is a schematic diagram of a method of forming a thermopile sensor in accordance with an embodiment of the present invention;

fig. 12 is a schematic structural diagram of a method for forming a thermopile sensor according to an embodiment of the present invention.

Detailed Description

The device accuracy of the existing thermopile sensor needs to be improved.

The inventor analyzes and considers that the traditional thermopile sensor realizes the transmission of sensing signals by manufacturing a thermocouple pair by depositing polysilicon/metal on a dielectric film to sense temperature information, then forming a heat insulation cavity below the dielectric film by a manufacturing method of back silicon anisotropic wet etching to increase heat resistance, and electrically connecting the thermocouple pair to a reading circuit formed on the opposite side of the thermocouple. However, the device formed by the method has no substrate structure below, and heat in the heat insulation cavity can still be lost in a certain form, so that the measurement accuracy of the thermopile sensor is not high.

In order to solve the above technical problem, an embodiment of the present invention provides a method for manufacturing a thermopile sensor, where the method includes:

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.

Fig. 1 to fig. 10 are schematic structural diagrams of steps in a method for manufacturing a sensor according to an embodiment of the present invention.

Firstly, provide thermopile structural slab and circuit substrate, the thermopile structural slab includes the heat radiation induction zone, be formed with the thermopile structure in the heat radiation induction zone, circuit substrate includes the heat radiation isolation region.

The thermopile structure plate is formed with a thermopile structure to realize the induction of infrared radiation, and the circuit substrate is formed with a reading circuit for processing the induction signal in the thermopile structure.

In the step of providing the thermopile structure plate 20, in an embodiment of the present invention, the thermopile structure plate may include a first substrate on which the thermopile structure is formed. Wherein the first substrate may be any suitable substrate material known to those skilled in the art, such as a bulk semiconductor substrate material of silicon, germanium, silicon germanium, gallium arsenide, indium phosphide, or the like.

In this embodiment, the first substrate is a silicon-on-insulator substrate, the silicon-on-insulator substrate includes a bottom semiconductor layer 200, an insulating layer 201, and a top semiconductor layer 202 stacked in sequence from bottom to top, and the thermopile structure is formed in the top semiconductor layer 202. In the subsequent process, the back surface of the substrate is thinned, and the stop position of the thinning treatment is convenient to control by adopting the silicon-on-insulator substrate. The material of the bottom semiconductor layer 200 may be an undoped semiconductor material (e.g., polysilicon or single crystal silicon, etc.); the material of the insulating layer 201 includes one or more of silicon oxide, silicon nitride, and silicon oxynitride; the material of the top semiconductor layer 202 may be an undoped semiconductor material (e.g., polysilicon or single crystal silicon), an N-type doped semiconductor material, or a P-type doped semiconductor material, and the formation process of the top semiconductor layer 202 includes an epitaxial process or an ion implantation process. As an example, the material of the bottom semiconductor layer 200 and the top semiconductor layer 202 is single crystal silicon, and the material of the insulating layer 201 is silicon oxide. In other embodiments, the first substrate may have a single-layer structure, and both the underlying semiconductor layer and the insulating layer may be omitted.

The thermopile structure includes at least one heat-sensing microstructure, which may be formed of any suitable thermally conductive material, for example, the material of the heat-sensing microstructure includes at least one of a metal, an undoped semiconductor material, a doped semiconductor material, and a metal silicide. The undoped semiconductor material or the doped semiconductor material each comprises one or more of silicon, germanium, gallium arsenide, and indium phosphide, and the doped semiconductor material has doping ions comprising N-type ions (e.g., arsenic, germanium, etc.) or P-type ions (e.g., boron fluoride, phosphorus, etc.).

In this embodiment, the thermopile structure includes a first thermal sensing microstructure 203a and a second thermal sensing microstructure 203b with different materials, the first thermal sensing microstructure 203a is N-type doped single crystal silicon, and the second thermal sensing microstructure 203b is P-type doped single crystal silicon. The first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b may be linear (e.g., straight line, curved line, broken line, etc.), array, or comb. The first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b may have a substantially symmetrical structure, for example, when the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b are linear structures, the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b have substantially the same length, which is beneficial to generating a substantially symmetrical thermal sensing effect between the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b, thereby being beneficial to improving the measurement accuracy of the thermopile sensor.

In addition, the entire distribution area of the first heat-sensing microstructures 203a and the entire distribution area of the second heat-sensing microstructures 203b may be arranged side by side in the plane of the thermopile structure plate 20 without overlapping, or may have partial areas nested so as to have at least partial overlapping. As an example, the overall distribution area of the first thermal sensing microstructure 203a and the overall distribution area of the second thermal sensing microstructure 203b partially overlap in the plane of the thermopile structure plate 20, for example, the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b are both comb-type structures, and a part of comb teeth of the first thermal sensing microstructure 203a are inserted into corresponding comb tooth gaps of the second thermal sensing microstructure 203b, so that the thermopile sensor performance can be further improved without increasing the surface area of the thermopile sensor.

In this embodiment, in the step of providing the thermopile structure plate, the step of forming the thermopile structure includes: providing a first substrate; and carrying out N-type ion doping on a partial region of the first substrate to form an N-type doped region, carrying out P-type ion doping on a partial region of the first substrate to form a P-type doped region, wherein the N-type doped region and the P-type doping are used as a thermopile structure. The N-type doped region serves as the first thermal sensing microstructure 203a, the P-type doped region serves as the second thermal sensing microstructure 203b, and the thermal sensing microstructure in the thermopile structure 203 comprises the N-type doped region and the P-type doped region formed in the first substrate, so that the fabrication of the thermopile structure is compatible with a CMOS (complementary metal oxide semiconductor) process, the process is simplified, and the cost is reduced. In this embodiment, the first substrate is a silicon-on-insulator substrate, and accordingly, the thermopile structure is formed in the top semiconductor layer 202.

Of course, the thermopile structure is not limited to a structure obtained by a doping method, and may be another structure obtained by another method.

In this embodiment, the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b are both single-layer structures. In other embodiments, the first thermal sensing microstructure and the second thermal sensing microstructure may also be stacked structures, and in this case, the first thermal sensing microstructure and the second thermal sensing microstructure may be formed by performing ion implantation on the first substrate multiple times, where implantation doses or implantation energies or doping ion types of two adjacent ion implantations are different, at least one of doping concentrations and doping ion types of two adjacent layers above and below are different, and subsequently, a first interconnection layer is further formed on the thermopile structure plate, at least a first interconnection structure electrically connected to the thermopile structure is formed in the first interconnection layer, and different doping regions may be coupled in series or in parallel by the first interconnection structure in the first interconnection layer, so that the performance of the thermopile sensor may be further improved while the surface area of the thermopile sensor is not increased.

Furthermore, the materials of the first and second thermal-induced

microstructures

203a and 203b are not limited to doped semiconductor materials. In other embodiments, the corresponding thermal-induced microstructures may also be formed on the first substrate by at least one of patterned etching of the metal layer, patterned etching of the semiconductor layer, and silicidation of the semiconductor layer. Correspondingly, the material of the heat-sensitive microstructure may also be at least one of a metal, an undoped semiconductor material, a metal silicide, and the like. In other embodiments, the thermopile structure may have only one heat-sensitive microstructure, or at least three heat-sensitive microstructures of different materials, different structures, or both different materials and different structures, thereby forming different heat-sensitive microstructures. The material of the heat-sensitive microstructure comprises at least one of a metal, an undoped semiconductor material, a doped semiconductor material and a metal silicide; the undoped semiconductor material or the doped semiconductor material includes at least one of silicon, germanium, gallium arsenide, and indium phosphide, and the doped semiconductor material includes N-type ions or P-type ions.

The distribution area of the thermopile structure serves as a heat radiation sensing area 20A, and the area around the heat radiation sensing area 20A is used for the subsequent fabrication of a second interconnect structure.

Wherein a thermopile structure and a first interconnect structure electrically connected to the thermopile structure may be formed within the thermal radiation sensing region. Specifically, the forming step of the first interconnect structure may include:

referring to fig. 2, a first interconnect structure electrically connected to the thermopile structure is formed on the thermopile structure plate 20.

Wherein the first interconnect structure is for subsequent electrical connection to the readout circuitry.

The first interconnect structure may include a first interconnect line 300a electrically connected to the first heat-sensing microstructure 203a, and a second interconnect line 300b electrically connected to the second heat-sensing microstructure 203 b.

In an embodiment of the present invention, the first interconnect structure may be formed on the semiconductor layer 202 through a series of processes such as metal layer deposition, photolithography, etching, or metal lift-off (liff-off). The first interconnect structure may be a single metal layer or a multi-layer metal structure. In the embodiment of the invention, the first interconnection structure is a single-layer metal layer so as to reduce the integration thickness of the device.

Further, in the embodiment of the present invention, the first interconnect structure is further covered with an interconnect passivation layer 301. The interconnect passivation layer 301 is used to cover the first and

second interconnect lines

300a and 300b and the thermopile structure to prevent contamination or oxidation of the corresponding structures. Specifically, the interconnect passivation layer 301 may be formed by forming the interconnect passivation layer (not shown) by a deposition process and planarizing the top surface of the interconnect passivation layer by a Chemical Mechanical Polishing (CMP) process.

In the embodiment of the present invention, the material of the first interconnect structure may be one or more of metals such as copper, titanium, aluminum, tungsten, and/or metal silicide materials. The material of the interconnect passivation layer 301 may be one or more of silicon dioxide, silicon nitride, silicon oxynitride, and the like.

In the step of providing the circuit substrate, referring to fig. 3, the circuit substrate 10 includes a second substrate 100, a readout circuitry formed on the second substrate 100. The readout circuit is suitable for being electrically connected with the thermopile structure, so that the readout circuit on the circuit substrate processes the electric signal of the thermopile structure.

The circuit substrate 10 may be a CMOS substrate that performs a FEOL (front end of line) process and a BEOL (back end of line) process and a wafer probe test, and has a readout circuit formed therein to process an electrical signal of the thermopile structure. The FEOL process and the BEOL process are both conventional process technologies for manufacturing CMOS integrated circuits in the art, and wafer probing is a conventional test scheme for testing performance of CMOS integrated circuits in the art, which is not described herein again.

The second substrate 100 may be any suitable semiconductor substrate material known to those skilled in the art, such as silicon, silicon-on-insulator, germanium, silicon germanium, gallium arsenide, indium phosphide, or the like. The second substrate 100 has formed therein, through a CMOS manufacturing process, respective electronic elements, which may include at least one of MOS transistors, resistors, diodes, capacitors, memories, etc., and device isolation structures 101 between adjacent electronic elements, which are used to constitute a readout circuit.

In the embodiment of the present invention, an electronic component in the circuit substrate is taken as an example of a MOS transistor, wherein the MOS transistor 102 includes a gate 102a, and a source 102b and a drain 102c located at two sides of the gate 102 a. The device isolation structure 101 may be formed by a local field oxidation process or a Shallow Trench Isolation (STI) process. The readout circuitry (including the readout interconnects 104a, 104b) may be electrically connected through a bottom contact plug in direct electrical contact with a corresponding terminal of the electronic component and a multi-layer metal interconnect electrically connected to the bottom contact plug, thereby achieving electrical connection of the readout circuitry to the electronic component.

Wherein an interlayer dielectric material 103 is further formed on the second substrate 100, so as to isolate adjacent metal interconnection layers. Wherein the interlayer dielectric material 103 of the circuit substrate 10 also exposes

openings

105a, 105b of a portion of the surface of the

readout interconnect structures

104a, 104b of the readout circuitry to form probing points for wafer probing.

In the embodiment of the present invention, the thermal radiation isolation region 10A may be a region corresponding to a device structure distribution, and the thermal radiation isolation region corresponds to the thermal radiation sensing region, specifically, a projection of the thermal radiation isolation region on the circuit substrate may be the same as a projection of the thermal radiation sensing region on the thermopile structure plate, so that the thermal radiation sensing region coincides with the thermal radiation isolation region in a subsequent bonding process, thereby achieving alignment between the thermopile substrate and the circuit substrate.

Referring to fig. 4 to 5, a support structure including a heat radiation isolation plate and a sacrificial structure stacked vertically from bottom to top is formed on the circuit substrate, the heat radiation isolation plate and the sacrificial structure covering at least the heat radiation isolation region.

In the step of forming the support structure, the thermal radiation isolation plate may be formed first, and then the sacrificial structure may be formed.

In this embodiment, the support structure further includes a support dielectric layer surrounding the thermal radiation isolation plate and the sacrificial structure, and a surface of the support dielectric layer is a plane to provide support for a subsequently formed first cavity and to provide a flat surface for a subsequent bonding process.

In this embodiment, the thermal radiation isolation plate may be formed first, and then the sacrificial structure may be formed, specifically, the following process may be included:

referring to fig. 4, a heat radiation isolation plate 401 is formed on the circuit substrate to cover at least the heat radiation isolation region.

The thermal radiation isolation plate 401 is used for realizing thermal insulation of a thermal radiation induction area of the circuit substrate and the thermopile structure plate, and prevents thermal radiation in the circuit substrate from conducting to the thermopile structure plate, thereby affecting the precision of the device.

The material of the thermal radiation isolation plate 404 is metal.

Specifically, the heat radiation separating plate 401 may be formed on the surface of the circuit substrate by a series of processes such as metal deposition, photolithography, etching, or a metal lift-off (liff-off) process. In an alternative example, the process of forming the heat radiation shielding plate may include: forming an isolation material layer covering the circuit substrate; forming a first passivation material layer overlying the isolation material layer; and removing the isolation material layer and the first passivation material layer outside the thermal radiation isolation region, taking the residual isolation material layer as a thermal radiation isolation plate, and taking the residual first passivation material layer as a first passivation layer.

In another alternative example, the process of forming the heat radiation shielding plate may include: forming a first supporting material layer covering the circuit substrate; removing the first support material layer in the thermal radiation isolation region to form an isolation groove, and taking the rest first support material layer as a support structure; sequentially forming an isolation material layer and a first passivation material layer which conformally cover the first support layer and the isolation groove, wherein the first passivation material layer is positioned above the isolation material layer; and removing the isolation material layer and the first passivation material layer outside the isolation groove, taking the rest isolation material layer as a heat radiation isolation plate, and taking the rest first passivation material layer as a first passivation layer. Wherein the material of the support structure may comprise one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride and boron carbonitride. The depth of the isolation trench is adapted to the thickness of the layer structure formed in the isolation trench, the isolation trench may be a trench for forming only the thermal radiation isolation plate, and the corresponding trench depth is adapted to the sum of the thicknesses of the thermal radiation isolation plate and the first passivation layer. It should be noted that, when removing the isolation material layer outside the isolation trench, a Chemical Mechanical Polishing (CMP) process may be used for removal.

Wherein, when the heat radiation separation plate 401 is a metal material, the separation material layer may be formed through a deposition process. When the heat radiation spacer 401 is a metal silicide, the spacer material layer is formed by: a silicon layer is formed first, and then metal silicidation is performed on the silicon layer. When the heat radiation spacer 401 is a doped semiconductor, the spacer material layer is formed by: the semiconductor layer is formed first, and then the semiconductor layer is doped with N type and/or P type.

In the embodiment of the present invention, a first passivation layer (not shown in the drawings) is used to achieve protection of the heat radiation shielding plate. Specifically, the first passivation layer may be formed using a deposition process.

Wherein, the material of the first passivation layer comprises one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride and boron carbonitride.

Referring to fig. 5, a sacrificial structure 400 is formed on the heat radiation isolation plate 401, and the sacrificial structure 400 covers at least the heat radiation isolation region 10A.

The sacrificial structure 400 is used to occupy a space for the first cavity, so that the first cavity can be formed by removing the sacrificial structure in a subsequent process.

The material of the sacrificial structure can react with the gas phase etchant to form a gaseous material, or can be converted into a gaseous material after being irradiated or heated, so that the difficulty of subsequently removing the sacrificial structure can be reduced, and the performance of the formed first cavity can be ensured.

In the embodiment of the present invention, a first passivation layer is formed on the heat radiation spacer 401, and in this step, a sacrificial structure, specifically, a sacrificial structure 400 is formed on the first passivation layer. In an embodiment of the present invention, the sacrificial structure 400 may be formed on the surface of the first passivation layer through a series of processes of sacrificial material deposition, photolithography, etching, and the like. The sacrificial structure 400 covers at least the thermal radiation isolation region 10A for alignment with the thermal radiation sensing region of the thermopile structure plate such that the sacrificial structure 400 after the bonding process covers at least the thermal radiation sensing region 20A.

Specifically, in this embodiment, the process of forming the sacrificial structure 400 may include: forming a sacrificial material layer completely covering one side of the circuit substrate having the heat radiation spacer; and removing the sacrificial material layer outside the thermal radiation isolation region, and taking the residual sacrificial material layer as a sacrificial structure. Wherein the sacrificial material layer can be formed by deposition, growth, and the like.

It should be noted that, based on the characteristics of the etching process, the cross section of the sacrificial structure may be a trapezoid or an inverted trapezoid, and in the process that the sacrificial structure is formed in an incomplete regular shape, the minimum size of the sacrificial structure may be at least covered by the thermal radiation sensing region.

After the sacrificial structure 400 is formed, in the embodiment of the present invention, a second supporting layer may be further formed on the circuit substrate 10, so that the second supporting layer is supported on the side surface of the sacrificial structure, and after the sacrificial structure is removed, a predetermined cavity structure may be formed, and a flat surface is provided for a subsequent process. Wherein the material of the second support may comprise one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride and boron carbonitride.

In other embodiments of the present invention, the forming of the sacrificial structure may be further implemented by the following processes: forming a second support material layer completely covering a side of the circuit substrate having the thermal radiation spacer; etching and removing the second support material layer of the thermal radiation isolation region to form a first sacrificial groove, wherein the rest second support material layer is used as a second support layer; and forming a sacrificial structure filled in the first sacrificial groove. Specifically, a sacrificial material filling the first sacrificial trench and higher than the second support layer may be formed by deposition, growth, and the like, and a Chemical Mechanical Polishing (CMP) process is further used to planarize a top surface of the sacrificial material, and the sacrificial material filled in the first sacrificial trench is used as a sacrificial structure. Alternatively, in another embodiment of the present invention, it is also possible to directly form an isolation trench having a trench depth corresponding to the sum of the thicknesses of the heat radiation isolation plate and the sacrificial structure when the isolation trench is formed in the previous step, and directly form a sacrificial structure in the isolation trench to completely fill the isolation trench.

In this embodiment, the first passivation layer and the second support layer may constitute a support dielectric layer 402, and the support dielectric layer 402, the heat radiation shielding plate 401, and the sacrificial structure 400 may serve as a support structure. Wherein the material of the sacrificial structure 400 is different from the material of the second support layer.

Referring to fig. 6, the thermopile structure plate 20 is bonded on the surface of the circuit substrate 10 on the side where the support structure is formed, such that the heat radiation sensing region vertically corresponds to the heat radiation isolation region.

After the thermopile structure plate 20 is bonded to the surface of the circuit substrate 10 on which the support structure is formed, the first interconnect structure may be located below the thermopile structure or above the thermopile structure.

When first interconnect structure is located when the below of thermopile structure, can not form and block infrared radiation, make infrared radiation transmit unobstructed to the route of thermopile structure, can reduce infrared radiation simultaneously and transmit to first cavity, improve the measurement accuracy of device.

The thermopile structure plate 20 may be bonded upside down on the circuit substrate 10 in order to locate the first interconnect structure below the thermopile structure.

In the embodiment of the present invention, the inversely bonding the thermopile structure plate 20 on the circuit substrate 10 specifically includes: and inversely fixing the thermopile structure plate on the circuit substrate.

Referring to fig. 7, in the embodiment of the invention, the side of the thermopile structure plate 20 away from the circuit substrate 10 is further thinned, and the bottom semiconductor layer 200 is removed.

The integration thickness is reduced by removing the bottom semiconductor layer, and the manufacturing difficulty of a subsequent release hole and a second interconnection structure is reduced.

Specifically, a suitable removing process (e.g., chemical mechanical polishing, etching, or stripping) may be selected according to the material of the bottom semiconductor layer 200 to remove the bottom semiconductor layer 200.

Referring to fig. 8, an embodiment of the present invention further includes: forming a second interconnection structure on the thermopile structure plate 20 at the periphery of the thermal radiation sensing region, the second interconnection structure electrically connecting the readout circuitry and the first interconnection structure. The second interconnect structure is used for outputting the electrical signals of the first interconnect structure and the readout circuit. Wherein a second interconnection structure 60A, 60b may be formed on the thermopile structure plate 20 at the periphery of the heat radiation sensing region 20A.

The second interconnect structure may include

first plugs

601a, 601b electrically connecting the sensing circuits,

second plugs

603a, 603b electrically connecting the thermopile structure, and plug

interconnect lines

602a, 602b connecting the first and second plugs.

Specifically, the process of forming the second interconnect structure may include: forming a first interconnect via exposing the

readout interconnect structures

104a, 104b of the readout circuitry in the circuit substrate and a second interconnect via exposing the first interconnect structures of the thermopile structure plate on a side of the thermopile structure plate facing away from the circuit substrate; forming an insulating medium layer on the side walls of the first interconnection through hole and the second interconnection through hole; forming first plug plugs 601a, 601b in the first interconnect via, and forming second plug plugs 603a, 603b in the second interconnect via; plug

interconnect lines

602a, 602b are formed on the surface of the thermopile structure plate, and the

plug interconnect lines

602a, 602b connect the

first plugs

601a, 601b and the

second plugs

603a, 603 b.

As an example, the

second interconnect structures

60a and 60b are formed by a rewiring process, which specifically includes: etching the thermopile structure plate 20 and the supporting dielectric layer at the periphery of the thermal radiation sensing region 20A to form first interconnect vias (not shown) respectively exposing partial top surfaces of the

readout interconnect structures

104a, 104b of the readout circuitry; the thermopile structure plate 20 at the periphery of the thermal radiation sensing region 20A is etched to form a second interconnect via (not shown) exposing a part of the surface of the first interconnect structure.

Then, an insulating dielectric layer is covered on the sidewalls of the first and second interconnect vias, the insulating dielectric layer is used for insulating and isolating the subsequently filled conductive material from the thermopile structure plate 20, the material of the insulating dielectric layer may include one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride, and boron carbonitride, and the bottom of the insulating dielectric layer exposes a portion of the top surface of the

readout interconnect structure

104a, 104b of the corresponding readout circuitry and the surface of the corresponding first interconnect structure.

Next, conductive materials such as metal (e.g., tungsten, copper) are filled in the first and second interconnect vias, and excess conductive materials covering the surface of the dielectric layer 201 are removed by chemical mechanical polishing or the like to form

first plugs

601a and 601b and

second plugs

603a and 603 b. In this embodiment, the bottom end of the first plug 601a is electrically connected to the readout interconnect structure 104a of the readout circuitry. The bottom end of the first plug 601b is electrically connected to the readout interconnection 104b of the readout circuitry; the bottom end of the second plug 603a is electrically connected to the first interconnect structure 300 a.

The process of forming the

plug interconnect lines

602a, 602b specifically includes: depositing a metal layer (e.g., aluminum, copper) on the surfaces of the

first plugs

601a, 601b, the

second plugs

603a, 603b, and the dielectric layer 201; next, the metal layer is subjected to photolithography and etching to remove the metal layer in the heat-sensing radiation region 20A, the remaining metal layer forms plug

interconnect lines

602a and 602b, the plug interconnect line 602a covers the top ends of the first plug 601a and the second plug 603a and electrically connects the top end of the first plug 601a and the top end of the second plug 603a, and the plug interconnect line 602b covers the top ends of the first plug 601b and the second plug 603b and electrically connects the top end of the first plug 601b and the top end of the second plug 603 b.

It should be noted that when the thermopile structure plate 20 is formed based on a non-conductive material plate, the insulating medium layer may be omitted on the sidewalls of the conductive material in the

second plugs

603a, 603b and the

first plugs

601a, 601 b. In addition, the formation process of the

second interconnect structures

60a and 60b is not limited to be performed before the first cavities are formed, and may be performed after the first cavities are formed.

Referring to fig. 11, fig. 11 is a schematic structural diagram of another method for forming a thermopile sensor according to an embodiment of the present invention. In other embodiments of the present invention, the

second interconnect structures

61a, 61b may include:

third plugs

611a, 611b, penetrating the support structure and electrically connected to the

readout interconnect structure

104a, 104b of the readout circuitry and the thermopile structure;

fourth plugs

612a, 612b, the

fourth plugs

612a, 612b penetrating the thermopile structure plate 20, the support structure, and bottom ends electrically connected with the

readout interconnects

104a, 104b of the readout circuitry.

Correspondingly, the forming process of the second interconnection structure may further include: forming the

third plugs

611a, 611b on the circuit substrate before the plate bonding of the thermopile structure 20 on the circuit substrate 10, the

third plugs

611a, 611b being electrically connected to the

readout interconnect structures

104a, 104b of the readout circuitry; after the bonding of the thermopile structure plate 20 on the circuit substrate 10, forming a third interconnect via on a side of the thermopile structure plate 20 facing away from the circuit substrate 10, the third interconnect via exposing the

readout interconnect structures

104a, 104b of the readout circuitry in the circuit substrate; forming an insulating medium layer on the side wall of the third interconnection through hole;

third plugs

611a, 611b are formed in the first interconnect via. The forming method of the

fourth plugs

612a and 612b is the same as that of the

first plugs

601a and 601b, and is not described herein again.

Referring to fig. 12, fig. 12 is a schematic structural diagram of another method for forming a thermopile sensor according to an embodiment of the present invention. In another embodiment of the present invention, the

second interconnect structures

61a, 61b may include: a third plug and a fourth plug.

The fourth plug may further include:

circuit substrate second sub-plugs 622a, 622b electrically connected to the readout circuitry;

and the second thermopile sub-plugs 623a and 623b, after the thermopile structure plate 20 is bonded on the circuit substrate 10, the second thermopile sub-plug 623a is electrically connected with the second circuit substrate sub-plug 622a, and the second thermopile sub-plug 623b is electrically connected with the second circuit substrate sub-plug 622 b.

Correspondingly, the forming process of the fourth plug may further include: before the bonding of the thermopile structure plate 20 on the circuit substrate 10, forming the

third plugs

621a, 621b and circuit substrate second sub-plugs 622a, 622b on the side of the circuit substrate 20 having the

readout interconnections

104a, 104b of the readout circuit, the

third plugs

621a, 621b being electrically connected to the

readout interconnections

104a, 104b of the readout circuit, the circuit substrate second sub-plugs 622a, 622b being electrically connected to the

readout interconnections

104a, 104b of the readout circuit; forming thermopile second sub-plugs 623a, 623b on the side of the thermopile structure plate 20 having the first interconnect structure, the thermopile second sub-plugs 623a, 623b penetrating the thermopile structure plate 20 and aligned with the circuit substrate second sub-plugs 622a, 622b of the circuit substrate 10; after the thermopile structure plate is bonded to the circuit substrate, the thermopile second sub-plug 623a is electrically connected to the circuit substrate second sub-plug 622a, and the thermopile second sub-plug 623b is electrically connected to the circuit substrate second sub-plug 622 b.

Of course, if the first interconnection structure is located below the thermopile structure 20 after the thermopile structure plate 20 is bonded on the circuit substrate 10, the third plug may include: the first thermopile sub-plug is positioned on one side, facing the circuit substrate, of the thermopile structure plate and is electrically connected with the first interconnection structure; and the first sub-plug of the circuit substrate is positioned on the circuit substrate and penetrates through the supporting structure, and after the thermopile structure plate is bonded on the circuit substrate, the first sub-plug of the thermopile is electrically connected with the first sub-plug of the circuit substrate. It is understood that the thermopile first sub-plug and the circuit substrate first sub-plug are both formed before the thermopile structure plate 20 is bonded on the circuit substrate 10. The forming method of the first sub-plug of the thermopile is similar to the forming method of the second sub-plugs 622a and 622b of the circuit substrate, and is not repeated herein.

Referring to fig. 9, the sacrificial structure is removed, and a first cavity 403 is formed between the thermopile structure plate and the circuit substrate.

In an embodiment of the present invention, the step of forming the first cavity 403 may include: forming at least one release hole 50 in a surface of the thermopile structure plate facing away from the circuit substrate, the release hole exposing a portion of the sacrificial structure; the sacrificial structure is removed through the release holes to form a first cavity 403.

Specifically, the at least one release hole 50 may be formed by drilling a hole from the side of the thermopile structure plate 20 opposite to the substrate 10 to expose the surface of the sacrificial structure 400 through a laser drilling or etching process.

The release holes 50 serve as cavity connecting channels to communicate the first cavity with the external space, so that the air pressure of the first cavity 403 is balanced, and the problems of warping and the like of the thermopile structure plate 20 are avoided.

Next, an etchant, which may be a vapor phase etchant or a liquid etchant, is introduced into the release hole 50 to remove the sacrificial structure 400, thereby forming a first cavity 403. Optionally, a cleaning agent, a drying agent, or the like may be further introduced into the release hole 50 to clean and dry the surface of the first cavity 403. Wherein the cleaning agent can be deionized water or nitrogen or inert gas, and the drying agent can be isopropanol gas and the like.

Referring to fig. 10, in the embodiment of the present invention, a cover 70 is further provided on the thermopile sensor to protect the heat radiation sensing region 10A of the thermopile sensor.

Specifically, the step of forming the closure may include: providing a closure having a second cavity; bonding the cover to a surface of the side of the thermopile structure plate facing away from the circuit substrate such that the second cavity of the cover is aligned with the thermal radiation sensing region of the thermopile structure plate; removing part of the cover, and exposing at least part of the second interconnection structure of the thermopile structure plate by the remained cover.

A radiation transmissive window (not shown) is formed above the thermal radiation sensing region of the cover 70, the radiation transmissive window being adapted to transmit infrared radiation. The shape of the radiation penetration window can be selected according to the requirement, such as a circle, a rectangle and the like. The material of the radiation transparent window comprises one or two of a semiconductor (such as silicon, wire or ring, silicon on insulator, etc.) or an organic filter material (such as polyethylene, polypropylene, etc.).

An infrared antireflection film may be provided on the radiation transmission window.

The capping material of the sidewall of the second cavity and the capping material of the top of the second cavity may be the same or different, and in the embodiment of the present invention, the capping material of the sidewall of the second cavity and the capping material of the top of the second cavity are different, so as to facilitate removal of the capping of the top of the second cavity. The closing cap material at second cavity top can be glass, plastics, semiconductor etc. through with the closing cap bonding arrives thermopile structural slab deviates from circuit substrate's surface, in order to cover the thermal radiation induction zone of thermopile structural slab, and, based on the setting of second cavity makes the thermal radiation induction zone top of thermopile structural slab is cavity structures, has avoided the contact of relevant material to the thermal radiation induction zone of thermopile structural slab to avoid causing the influence to the thermal radiation induction zone of thermopile structural slab.

In the embodiment of the invention, the circuit substrate is further bonded below the first cavity, so that radiation loss corresponding to the opened first cavity can be avoided, and the measurement accuracy of the device is improved. In addition, the scheme that the circuit substrate is further bonded below the first cavity realizes vertical system integration of the device under the condition of not increasing the area, is favorable for shortening the interconnection length from the sensing signal to the reading circuit, signal loss and noise, and is favorable for miniaturization of the device; in addition, it is beneficial to further extend to 3D system integration of fabricating active thermal imaging sensor arrays with CMOS readout pixel arrays and peripheral circuits. The high-integration thermopile sensor is favorable for being applied to a thermal imager with a thermopile structure in array arrangement, is used for imaging temperature, or is applied to a small-size mobile terminal such as a mobile phone, a tablet personal computer and the like, and is used for mobile temperature measurement and the like.

According to the embodiment of the invention, after the bonding of the thermopile structure plate, the first interconnection structure is positioned below the thermopile structure, so that the infrared radiation is not blocked, the path for transmitting the infrared radiation to the thermopile structure is smooth, the transmission of the infrared radiation to the first cavity can be reduced, and the measurement precision of the device is improved.

In addition, the first cavity is formed through the sacrificial structure in the embodiment of the invention, so that the sacrificial structure can support the corresponding device structure in the process of forming the thermopile sensor, the defects of collapse and the like of the corresponding device structure are avoided, and the yield of the device is further improved.

It should be noted that, specific descriptions of the methods for forming the thermopile sensor according to the present embodiment may be referred to each other, and are not repeated herein.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A method of making a thermopile sensor, comprising:

2. The method of fabricating a thermopile sensor according to claim 1, wherein a first interconnect structure electrically connected to the thermopile structure is further formed in the thermal radiation sensing region;

after the thermopile structure plate is bonded on the surface of the circuit substrate on the side where the support structure is formed, the first interconnect structure is located below the thermopile structure.

3. The method of making a thermopile sensor of claim 1, wherein said step of providing a thermopile structure plate comprises:

providing a first substrate;

and carrying out N-type ion doping on a partial region of the first substrate to form an N-type doped region, carrying out P-type ion doping on a partial region of the first substrate to form a P-type doped region, wherein the N-type doped region and the P-type doped region are used as a thermopile structure.

4. The method for manufacturing a thermopile sensor according to claim 3, wherein the first substrate is a silicon-on-insulator substrate including a bottom semiconductor layer, an insulating layer, and a top semiconductor layer stacked in this order from bottom to top, the thermopile structure being formed in the top semiconductor layer;

after bonding the thermopile structure plate on the surface of the circuit substrate on the side where the supporting structure is formed, and before removing the sacrificial structure, the manufacturing method of the thermopile sensor further comprises the following steps: and removing the bottom semiconductor layer.

5. The method of fabricating a thermopile sensor of claim 1, wherein the step of forming a support structure surrounds the thermal radiation shield and sacrificial structure, the support structure having a planar surface.

6. The method of fabricating a thermopile sensor according to claim 5, wherein the step of forming the thermal radiation shield and sacrificial structure comprises:

forming a heat radiation isolation plate covering at least the heat radiation isolation region on the circuit substrate;

a sacrificial structure is formed over the thermal radiation isolation panel, the sacrificial structure covering at least the thermal radiation isolation region.

7. The method of manufacturing a thermopile sensor according to claim 6, wherein said forming a thermal radiation isolation plate on said circuit substrate covering at least said thermal radiation isolation region comprises:

forming an isolation material layer covering the circuit substrate;

forming a first passivation material layer overlying the isolation material layer;

and removing the isolation material layer and the first passivation material layer outside the thermal radiation isolation region, taking the residual isolation material layer as a thermal radiation isolation plate, and taking the residual first passivation material layer as a first passivation layer.

8. The method of manufacturing a thermopile sensor according to claim 6, wherein said forming a thermal radiation isolation plate on said circuit substrate covering at least said thermal radiation isolation region comprises:

forming a first supporting material layer covering the circuit substrate;

removing the dielectric material layer in the thermal radiation isolation region to form an isolation groove, and taking the rest first support material layer as the support structure;

sequentially forming an isolation material layer and a first passivation material layer which conformally cover the supporting dielectric layer and the isolation groove, wherein the first passivation material layer is positioned above the isolation material layer;

and removing the isolation material layer and the first passivation material layer outside the isolation groove, taking the rest isolation material layer as a heat radiation isolation plate, and taking the rest first passivation material layer as a first passivation layer.

9. The method of fabricating a thermopile sensor according to claim 7 or 8, wherein said forming a sacrificial structure above said thermal radiation shield comprises:

forming a sacrificial material layer completely covering one side of the circuit substrate having the heat radiation spacer;

removing the sacrificial material layer outside the thermal radiation isolation region, and taking the remaining sacrificial material layer as a sacrificial structure;

a second support layer is formed on the circuit substrate.

10. The method of fabricating a thermopile sensor according to claim 7 or 8, wherein said forming a sacrificial structure above said thermal radiation shield comprises:

forming a second support material layer completely covering a side of the circuit substrate having the thermal radiation spacer;

etching and removing the second support material layer of the thermal radiation isolation region to form a first sacrificial groove, and taking the remaining second support material layer as a second support layer;

and forming a sacrificial structure filled in the first sacrificial groove.

11. The method of manufacturing a thermopile sensor according to claim 2, wherein a readout circuit is disposed in the circuit substrate, the method further comprising:

forming a second interconnection structure on the thermopile structure plate at the periphery of the thermal radiation sensing region, the second interconnection structure electrically connecting the readout circuitry and the first interconnection structure.

12. The method of fabricating a thermopile sensor of claim 11, wherein the second interconnect structure comprises:

the first plug penetrates through the thermopile structure plate and the support structure, and the bottom end of the first plug is electrically connected with the readout circuit;

a second plug, a bottom end of the second plug being electrically connected to the first interconnect structure;

a plug interconnect on the thermopile structure plate, the plug interconnect connecting the first plug and the second plug.

13. The method of fabricating a thermopile sensor of claim 11, wherein the second interconnect structure comprises:

the third plug penetrates through the supporting structure, and the bottom end of the third plug is electrically connected with the reading circuit;

and the fourth plug penetrates through the thermopile structure plate and the support structure, and the bottom end of the fourth plug is electrically connected with the reading circuit.

14. The method of making a thermopile sensor of claim 13, wherein the third plug comprises:

the first thermopile sub-plug is positioned on one side, facing the circuit substrate, of the thermopile structure plate and is electrically connected with the first interconnection structure;

and the first sub-plug of the circuit substrate is positioned on the circuit substrate and penetrates through the supporting structure, and after the thermopile structure plate is bonded on the circuit substrate, the first sub-plug of the thermopile is electrically connected with the first sub-plug of the circuit substrate.

15. The method of making a thermopile sensor of claim 13, wherein the fourth plug comprises:

a second sub-plug of a thermopile penetrating the thermopile structure plate and electrically connected with the first interconnect structure;

and the second sub-plug of the circuit substrate is positioned on the circuit substrate and penetrates through the supporting structure, and after the thermopile structure plate is bonded on the circuit substrate, the second sub-plug of the thermopile is electrically connected with the second sub-plug of the circuit substrate.

16. The method of fabricating a thermopile sensor of claim 1, wherein said removing said sacrificial structure comprises:

forming at least one release hole on the surface of the thermopile structure plate, which faces away from the circuit substrate, wherein the release hole exposes part of the sacrificial structure;

and removing the sacrificial structure through the release hole to form a first cavity.

17. The method of fabricating a thermopile sensor of claim 1, wherein said removing said sacrificial structure further comprises:

providing a cover having a second cavity with a radiation penetration window formed over the thermal radiation sensing region of the cover;

bonding the cover to a surface of the side of the thermopile structure plate facing away from the circuit substrate such that the second cavity of the cover is aligned with the thermal radiation sensing region of the thermopile structure plate;

and removing part of the cover, so that the rest of the cover exposes part of the second interconnection structure of the thermopile structure plate.

18. The method of claim 1, wherein the sacrificial structure is at least one of germanium and amorphous carbon.

19. The method of fabricating a thermopile sensor according to claim 1, wherein the material of the thermal radiation spacer is metal.