CN112117364B

CN112117364B - Manufacturing method of thermopile sensor

Info

Publication number: CN112117364B
Application number: CN202010615245.0A
Authority: CN
Inventors: 黄河
Original assignee: Smic Ningbo Co ltd Shanghai Branch
Current assignee: Smic Ningbo Co ltd Shanghai Branch
Priority date: 2020-06-30
Filing date: 2020-06-30
Publication date: 2023-02-21
Anticipated expiration: 2040-06-30
Also published as: CN112117364A

Abstract

A method of fabricating a thermopile sensor, the method comprising: providing a thermopile structure plate and a circuit substrate; forming a heat radiation reflecting plate on the circuit substrate; forming a patterned sacrificial structure on one side of the circuit substrate, which is provided with the heat radiation reflecting plate, wherein the projection of the sacrificial structure on the circuit substrate at least covers the heat radiation corresponding area; bonding the thermopile structure plate on the surface of one side of the circuit substrate, where the sacrificial structure is formed, so that the heat radiation sensing area vertically corresponds to the heat radiation corresponding area after bonding; and removing the sacrificial structure, forming a first cavity between the thermopile structure plate and the circuit substrate, and forming a first cavity between the thermopile structure plate and the circuit substrate, so that the precision of the device is improved.

Description

Method for manufacturing thermopile sensor

Technical Field

The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing method of a thermopile sensor.

Background

The thermopile sensor is a temperature detection device, and the temperature detection is realized by converting sensed infrared information into corresponding signals according to a certain rule and outputting the signals.

With the rapid development of micro-electro-mechanical systems (MEMS) technology, miniaturized thermopile sensors manufactured based on MEMS micromachining technology are widely used in the fields of temperature measurement, gas sensing, optical imaging, etc. due to their advantages of small size, low price, etc.

However, the device accuracy of the existing thermopile sensor is to be improved.

Disclosure of Invention

The invention provides a manufacturing method of a thermopile sensor, which aims to improve the precision of a device.

In order to solve the above problems, the present invention provides a method for manufacturing a thermopile sensor, the method comprising:

providing a thermopile structure plate and a circuit substrate, wherein the thermopile structure plate comprises a thermal radiation induction area, a thermopile structure is formed in the thermal radiation induction area, and the circuit substrate comprises a thermal radiation corresponding area corresponding to the thermal radiation induction area;

forming a heat radiation reflecting plate on the circuit substrate;

forming a patterned sacrificial structure on one side of the circuit substrate, which is provided with the thermal radiation reflecting plate, wherein the projection of the sacrificial structure on the circuit substrate at least covers the thermal radiation corresponding area;

bonding the thermopile structure plate on the surface of one side of the circuit substrate, which is provided with the sacrificial structure, so that the heat radiation induction area vertically corresponds to the heat radiation corresponding area after bonding;

and removing the sacrificial structure to form a first cavity between the thermopile structure plate and the circuit substrate.

Compared with the prior art, the technical scheme of the invention has the following advantages:

in the embodiment of the invention, the circuit substrate is arranged below the first cavity, so that radiation loss corresponding to the opened first cavity can be avoided, and the measurement precision of the device is improved. In addition, the scheme that the circuit substrate is arranged below the first cavity realizes vertical system integration of the device under the condition of not increasing the area, is favorable for shortening the interconnection length from a sensing signal to a reading circuit, signal loss and noise, and is favorable for miniaturization of the device; in addition, it is beneficial to further extend to 3D system integration of fabricating active thermal imaging sensor arrays with CMOS readout pixel arrays and peripheral circuits. The high-integration thermopile sensor is favorable for being applied to a thermal imager with a thermopile structure arranged in an array so as to realize temperature imaging, or applied to a small-size mobile terminal such as a mobile phone, a tablet personal computer and the like so as to realize mobile temperature measurement and the like.

According to the embodiment of the invention, the thermal radiation reflecting plate is formed below the first cavity, so that infrared radiation transmitted into the first cavity can be reflected back to the thermopile structure plate, and the precision of the device is improved.

In addition, the first cavity is formed through the sacrificial structure in the embodiment of the invention, so that the sacrificial structure can support the corresponding device structure in the process of forming the device, the defects of collapse and the like of the corresponding device structure are avoided, and the yield of the device is further improved.

Drawings

Fig. 1 to 10 are schematic structural diagrams of steps in a method for forming a thermopile sensor according to an embodiment of the present invention.

Detailed Description

The device accuracy of the existing thermopile sensor needs to be improved.

The inventor analyzes and considers that the traditional thermopile sensor realizes the transmission of sensing signals by manufacturing a thermocouple pair by depositing polysilicon/metal on a dielectric film to sense temperature information, then forming a heat insulation cavity below the dielectric film by a manufacturing method of back silicon anisotropic wet etching to increase heat resistance, and electrically connecting the thermocouple pair to a circuit structure formed on the opposite side of the thermocouple. However, the device formed by the method has no substrate structure below, and heat in the heat insulation cavity can still be lost in a certain form, so that the measurement accuracy of the thermopile sensor is not high.

In order to solve the above technical problem, an embodiment of the present invention provides a method for manufacturing a thermopile sensor, where the method includes: providing a thermopile structure plate and a circuit substrate, wherein the thermopile structure plate comprises a thermal radiation sensing area, a thermopile structure is formed in the thermal radiation sensing area, and the circuit substrate comprises a thermal radiation corresponding area corresponding to the thermal radiation sensing area; forming a heat radiation reflecting plate on the circuit substrate; forming a patterned sacrificial structure on one side of the circuit substrate, which is provided with the heat radiation reflecting plate, wherein the projection of the sacrificial structure on the circuit substrate at least covers the heat radiation corresponding area; bonding the thermopile structure plate on the surface of one side of the circuit substrate, where the sacrificial structure is formed, so that the heat radiation sensing area vertically corresponds to the heat radiation corresponding area after bonding; and removing the sacrificial structure to form a first cavity between the thermopile structure plate and the circuit substrate.

In the embodiment of the invention, the circuit substrate is further bonded below the first cavity, so that radiation loss corresponding to the opened first cavity can be avoided, and the measurement accuracy of the device is improved. In addition, the scheme that the circuit substrate is further bonded below the first cavity realizes vertical system integration of the device under the condition of not increasing the area, is favorable for shortening the interconnection length from the sensing signal to the reading circuit, signal loss and noise, and is favorable for miniaturization of the device; in addition, it is beneficial to further extend to 3D system integration of fabricating active thermal imaging sensor arrays with CMOS readout pixel arrays and peripheral circuits.

In addition, the first cavity is formed through the sacrificial structure in the embodiment of the invention, so that the sacrificial structure can support the corresponding device structure in the process of forming the thermopile sensor, and the defects of collapse and the like of the corresponding device structure are avoided, thereby further improving the yield of the device.

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.

Fig. 1 to fig. 10 are schematic structural diagrams of steps in a method for manufacturing a sensor according to an embodiment of the present invention.

First, a thermopile structure plate (refer to fig. 1) including a heat radiation sensing region in which a thermopile structure and a first interconnection structure electrically connected to the thermopile structure are formed, and a circuit substrate (refer to fig. 2) including a heat radiation corresponding region are provided.

The thermopile structure plate is formed with a thermopile structure to realize the induction of infrared radiation, and the circuit substrate is formed with a circuit structure for processing the induction signal in the thermopile structure.

In the step of providing the thermopile structure plate 20, in an embodiment of the present invention, the thermopile structure plate may include a first substrate on which the thermopile structure is formed. Wherein the first substrate may be any suitable substrate material known to those skilled in the art, such as a bulk semiconductor substrate material of silicon, germanium, silicon germanium, gallium arsenide, indium phosphide, or the like.

In this embodiment, the first substrate is a silicon-on-insulator substrate, the silicon-on-insulator substrate includes a bottom semiconductor layer 200, an insulating layer 201, and a top semiconductor layer 202 stacked in sequence from bottom to top, and the thermopile structure is formed in the top semiconductor layer 202. In the subsequent process, the back surface of the substrate is thinned, and the stop position of the thinning treatment is convenient to control by adopting the silicon-on-insulator substrate. The material of the bottom semiconductor layer 200 may be an undoped semiconductor material (e.g., polysilicon or single crystal silicon, etc.); the material of the insulating layer 201 includes one or more of silicon oxide, silicon nitride, and silicon oxynitride; the material of the top semiconductor layer 202 may be an undoped semiconductor material (e.g., polysilicon or single crystal silicon), an N-type doped semiconductor material, or a P-type doped semiconductor material, and the formation process of the top semiconductor layer 202 includes an epitaxial process or an ion implantation process. As an example, the material of the bottom semiconductor layer 200 and the top semiconductor layer 202 is single crystal silicon, and the material of the insulating layer 201 is silicon oxide. In other embodiments, the first substrate may have a single-layer structure, and both the underlying semiconductor layer and the insulating layer may be omitted.

The thermopile structure includes at least one heat-sensing microstructure, which may be formed of any suitable thermally conductive material, for example, the material of the heat-sensing microstructure includes at least one of a metal, an undoped semiconductor material, a doped semiconductor material, and a metal silicide. The undoped semiconductor material or the doped semiconductor material each comprises one or more of silicon, germanium, gallium arsenide, and indium phosphide, and the doped semiconductor material has doping ions comprising N-type ions (e.g., arsenic, germanium, etc.) or P-type ions (e.g., boron fluoride, phosphorus, etc.).

In this embodiment, the thermopile structure includes a first thermal sensing microstructure 203a and a second thermal sensing microstructure 203b with different materials, the first thermal sensing microstructure 203a is N-type doped single crystal silicon, and the second thermal sensing microstructure 203b is P-type doped single crystal silicon. The first thermal-sensing microstructures 203a and the second thermal-sensing microstructures 203b may be linear (e.g., straight line, curved line, or broken line), array, or comb. The first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b may have a substantially symmetrical structure, for example, when the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b are linear structures, the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b have substantially the same length, which is beneficial to generating a substantially symmetrical thermal sensing effect between the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b, thereby being beneficial to improving the measurement accuracy of the thermopile sensor.

In addition, the entire distribution area of the first heat-sensing microstructures 203a and the entire distribution area of the second heat-sensing microstructures 203b may be arranged side by side in the plane of the thermopile structure plate 20 without overlapping, or may have partial areas nested so as to have at least partial overlapping. As an example, the overall distribution area of the first thermal sensing microstructure 203a and the overall distribution area of the second thermal sensing microstructure 203b partially overlap in the plane of the thermopile structure plate 20, for example, the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b are comb-shaped structures, and a part of comb teeth of the first thermal sensing microstructure 203a are inserted into corresponding comb tooth gaps of the second thermal sensing microstructure 203b, so that the performance of the thermopile sensor can be further improved without increasing the surface area of the thermopile sensor.

In this embodiment, in the step of providing the plate of the thermopile structure, the step of forming the thermopile structure includes: providing a first substrate; and carrying out N-type ion doping on a partial region of the first substrate to form an N-type doped region, carrying out P-type ion doping on a partial region of the first substrate to form a P-type doped region, wherein the N-type doped region and the P-type doped region are used as a thermopile structure. The N-type doped region serves as the first thermal sensing microstructure 203a, the P-type doped region serves as the second thermal sensing microstructure 203b, and the thermal sensing microstructure in the thermopile structure 203 includes the N-type doped region and the P-type doped region formed in the first substrate, so that the fabrication of the thermopile structure is compatible with the CMOS process, thereby simplifying the process and reducing the cost. In this embodiment, the first substrate is a silicon-on-insulator substrate, and accordingly, the thermopile structure is formed in the top semiconductor layer 202.

In this embodiment, the first thermal sensing microstructure 203a and the second thermal sensing microstructure 203b are both single-layer structures. In other embodiments, the first thermal sensing microstructure and the second thermal sensing microstructure may also be stacked structures, and in this case, the first thermal sensing microstructure and the second thermal sensing microstructure may be formed by performing ion implantation on the first substrate for multiple times, where implantation doses or implantation energies or doping ion types of two adjacent ion implantations are different, at least one of doping concentrations and doping ion types of two adjacent layers above and below are different, and subsequently, a first interconnection layer is further formed on the thermopile structure plate, and at least a first conductive interconnection structure electrically connected to the thermopile structure is formed in the first interconnection layer, and different doping regions may be coupled in series or in parallel by the first conductive interconnection structure in the first interconnection layer, so that the performance of the thermopile sensor may be further improved without increasing the surface area of the thermopile sensor.

Furthermore, the materials of the first and second thermal-induced

microstructures

203a and 203b are not limited to doped semiconductor materials. In other embodiments, the thermal-induced microstructures may be formed on the first substrate by at least one of a patterned etching of the metal layer, a patterned etching of the semiconductor layer, and a silicidation of the semiconductor layer. Accordingly, the material of the thermally induced microstructure may also be at least one of a metal, an undoped semiconductor material, a metal silicide, and the like. In other embodiments, the thermopile structure may have only one heat-sensitive microstructure, or at least three heat-sensitive microstructures, which are different in material, structure, or both material and structure, thereby forming different heat-sensitive microstructures. The material of the heat-sensitive microstructure comprises at least one of a metal, an undoped semiconductor material, a doped semiconductor material and a metal silicide; the undoped semiconductor material or the doped semiconductor material includes at least one of silicon, germanium, gallium arsenide, and indium phosphide, and the doped semiconductor material includes N-type ions or P-type ions.

The distribution area of the thermopile structure serves as a heat radiation sensing area 20A, and the area around the heat radiation sensing area 20A is used for the subsequent fabrication of a second interconnect structure.

Wherein a thermopile structure and a first interconnect structure electrically connected with the thermopile structure are formed in the thermal radiation sensing region. Specifically, the forming step of the first interconnect structure may include:

referring to fig. 2, a first interconnect structure electrically connected to the thermopile structure is formed on the thermopile structure plate 20.

Wherein the first interconnect structure is configured to subsequently electrically connect with the third interconnect structure.

The first interconnect structure may include a first conductive interconnect line 300a electrically connected to the first heat-sensing microstructure 203a, and a second conductive interconnect line 300b electrically connected to the second heat-sensing microstructure 203 b.

In an embodiment of the present invention, the first interconnect structure may be formed on the semiconductor layer 202 through a series of processes such as metal layer deposition, photolithography, etching, or metal lift-off (liff-off). The first interconnect structure may be a single metal layer or a multi-layer metal structure. In the embodiment of the invention, the first interconnection structure is a single-layer metal layer so as to reduce the integration thickness of the device.

Further, in the embodiment of the present invention, the first interconnect structure is further covered with an interconnect passivation layer 301. The interconnect passivation layer 301 is used to cover the first and second

conductive interconnect lines

300a and 300b and the thermopile structure to prevent contamination or oxidation of the corresponding structures. Specifically, the interconnect passivation layer 301 may be formed by forming the interconnect passivation layer (not shown) by a deposition process and planarizing the top surface of the interconnect passivation layer by a Chemical Mechanical Polishing (CMP) process.

In the embodiment of the present invention, the material of the first interconnect structure may be one or more of metals such as copper, titanium, aluminum, tungsten, and/or metal silicide materials. The material of the interconnect passivation layer 301 may be one or more of silicon dioxide, silicon nitride, silicon oxynitride, and the like.

In the step of providing the circuit substrate, referring to fig. 3, the circuit substrate 10 includes a second substrate 100, a circuit structure formed on the second substrate 100, and a third interconnect structure electrically connected to the circuit structure, and the circuit substrate is used to electrically connect the thermopile structure through the third interconnect structure, so that the circuit structure on the circuit substrate processes an electrical signal of the thermopile structure.

The circuit substrate 10 may be a CMOS substrate that performs a FEOL (front end of line) process and a BEOL (back end of line) process and a wafer probe test, and has a circuit structure formed therein to process an electrical signal of the thermopile structure. The FEOL process and the BEOL process are both conventional process technologies for manufacturing CMOS integrated circuits in the art, and wafer probing is a conventional test scheme for testing performance of CMOS integrated circuits in the art, which is not described herein again.

Wherein the second substrate 100 may be any suitable semiconductor substrate material known to those skilled in the art, such as silicon, silicon-on-insulator, germanium, silicon germanium, gallium arsenide, indium phosphide, etc. The second substrate 100 has formed therein, through a CMOS manufacturing process, respective electronic elements, which may include at least one of MOS transistors, resistors, diodes, capacitors, memories, etc., and device isolation structures 101 located between adjacent electronic elements, which are used to constitute a circuit structure.

In the embodiment of the present invention, an electronic component in the circuit substrate is taken as an MOS transistor as an example, wherein the MOS transistor 102 includes a gate 102a, and a source 102b and a drain 102c located at two sides of the gate 102 a. The device isolation structure 101 may be formed by a local field oxidation process or a Shallow Trench Isolation (STI) process. The third interconnect structure (including 104a, 104 b) may be electrically connected through a bottom contact plug in direct electrical contact with a corresponding terminal of the electronic component and a multi-layer metal interconnect structure electrically connected to the bottom contact plug, thereby achieving electrical connection of the third interconnect structure to the electronic component.

Wherein an interlayer dielectric material 103 is further formed on the second substrate 100, so as to isolate adjacent metal interconnection layers. The interlayer dielectric material 103 of the circuit substrate 10 also exposes the

openings

105a and 105b on part of the surfaces of the

third interconnect structures

104a and 104b to form probing points for wafer probing.

In the embodiment of the present invention, the heat radiation corresponding region 10A may be a region corresponding to a device structure distribution, and the heat radiation corresponding region corresponds to the heat radiation sensing region, specifically, a projection of the heat radiation corresponding region on the circuit substrate may be the same as a projection of the heat radiation sensing region on the thermopile structure board, so that the heat radiation sensing region and the heat radiation corresponding region are overlapped in a subsequent bonding process, thereby achieving alignment between the thermopile substrate and the circuit substrate.

Referring to fig. 4, a heat radiation reflecting plate is formed on the circuit substrate.

The thermal radiation reflecting plate 401 is used for reflecting infrared radiation transmitted into the first cavity back to the thermopile structure plate when the device works, so that the infrared radiation received by the thermopile structure is prevented from being conducted into the circuit substrate below the first cavity, and the precision of the device is improved.

In the embodiment of the present invention, before the heat radiation reflecting plate is formed, a heat radiation separating plate 404 is further formed on the circuit substrate.

The thermal radiation isolation plate 404 is used to achieve thermal insulation of the thermal radiation sensing area of the circuit substrate and the thermopile structure plate, and prevent thermal radiation in the circuit substrate from being conducted to the thermopile structure plate, thereby affecting the precision of the device.

Wherein the thermal radiation separation plate and the thermal radiation reflection plate may be formed at the same time, and particularly, referring to fig. 4, a thermal radiation separation plate 404 and a thermal radiation reflection plate 401 covering at least the thermal radiation corresponding region are formed at the side of the circuit substrate having the third interconnection structure, wherein the thermal radiation reflection plate 401 is located on the thermal radiation separation plate 404.

The material of the thermal radiation reflecting plate 401 is a conductive material and/or a photonic crystal material, the conductive material is one or more of a metal material, a metal silicide material, and a semiconductor material, the metal silicide may be titanium silicide (TiSi), tungsten silicide (WSi), or aluminum silicide (AlSi), and the like, and the doped semiconductor may be a polysilicon layer or an amorphous silicon layer or a silicon germanium layer doped with P-type or N-type dopant, for example. The material of the thermal radiation spacer 404 is one or more of a metal material, a metal silicide material, and a semiconductor material.

Specifically, the heat radiation cutoff plate 404 and the heat radiation reflection plate 401 may be formed on the surface of the circuit substrate on the side having the third interconnect structure by a series of processes of metal deposition, photolithography, etching, or the like, or a metal lift-off (liff-off) process. In an alternative example, the process of forming the thermal radiation spacer and the thermal radiation reflecting plate may include: forming an isolation material layer covering the circuit substrate; forming a first passivation material layer overlying the isolation material layer; forming a reflective material layer overlying the first passivation material layer; and removing the isolating material layer, the first passivation material layer and the reflection material layer outside the heat radiation corresponding region, taking the rest isolating material layer as a heat radiation isolating plate, taking the rest first passivation material layer as a first passivation layer and taking the rest reflection material layer as a heat radiation reflecting plate.

In another alternative example, the process of forming the thermal radiation spacer and the thermal radiation reflecting plate may include: forming a first supporting material layer covering the circuit substrate; removing the first support material layer in the area corresponding to the heat radiation to form an isolation groove, and taking the rest first support material layer as a first support layer; sequentially forming an isolation material layer, a first passivation material layer and a reflection material layer which conformally cover the first support layer and the isolation groove, wherein the reflection material layer is positioned above the first passivation material layer, and the first passivation material layer is positioned above the isolation material layer; and removing the isolation material layer, the first passivation material layer and the reflection material layer outside the isolation groove, taking the rest isolation material layer as a thermal radiation isolation plate, taking the rest first passivation material layer as a first passivation layer and taking the rest reflection material layer as a thermal radiation reflection plate. Wherein, the material of the first support layer may include one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride, and boron carbonitride. The depth of the isolation trench is adapted to the thickness of the layer structure formed in the isolation trench, the isolation trench may be a trench for forming only the thermal radiation isolation plate and the thermal radiation reflection plate, and the corresponding trench depth is adapted to the sum of the thicknesses of only the thermal radiation isolation plate, the first passivation layer, and the thermal radiation reflection plate. Note that, when the isolation material layer and the reflective material layer outside the isolation trench are removed, a Chemical Mechanical Polishing (CMP) process may be used.

Wherein, when the heat radiation separation plate 404 and the heat radiation reflection plate 401 are metal materials, the separation material layer and the reflection material layer may be formed by a deposition process, respectively. When the thermal radiation spacer 404 and the thermal radiation reflection plate 401 are metal silicides, the step of forming the spacer material layer includes: firstly, forming a silicon layer, and then carrying out metal silicification on the silicon layer; also, the reflective material layer may be formed in this manner. When the thermal radiation separation plate 404 and the thermal radiation reflection plate 401 are doped semiconductors, the formation of the separation material layer includes: forming a semiconductor layer, and then carrying out N-type and/or P-type doping on the semiconductor layer; also, the reflective material layer may be formed in this manner.

In the embodiment of the present invention, a first passivation layer (not shown in the drawings) is used to achieve the isolation of the heat radiation spacer and the heat radiation reflecting plate. Specifically, the first passivation layer may be formed using a deposition process.

Wherein, the material of the first passivation layer comprises one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride and boron carbonitride.

In the embodiment of the present invention, a second passivation layer (not shown) having a planar surface is further formed on the heat radiation reflecting plate to facilitate a subsequent process.

Specifically, a second passivation layer covering the thermal radiation reflecting plate may be formed after the thermal radiation spacer and the thermal radiation reflecting plate are formed. Alternatively, a deposition process may be used to deposit a second passivation material layer (not shown), and a Chemical Mechanical Polishing (CMP) process may be used to planarize the top surface of the second passivation material layer to form a second passivation layer with a planar surface. Wherein the second passivation layer may bury the heat radiation reflection plate 401 therein, or a top surface of the second passivation layer may be flush with a top surface of the heat radiation reflection plate 401 to provide a flat surface for a subsequent process.

The material of the second passivation layer includes one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride, and boron carbonitride.

Referring to fig. 5, a patterned sacrificial structure 400 is formed on the side of the circuit substrate having the heat radiation reflecting plate 401, and a projection of the sacrificial structure 400 on the circuit substrate covers at least the heat radiation corresponding region 10A.

The sacrificial structure 400 is used to occupy a space for the first cavity, so that the first cavity can be formed by removing the sacrificial structure in a subsequent process.

The material of the sacrificial structure can react with the gas phase etchant to form a gaseous material, or can be converted into a gaseous material after being irradiated or heated, so that the difficulty of subsequently removing the sacrificial structure can be reduced, and the performance of the formed first cavity can be ensured.

In the embodiment of the present invention, a second passivation layer is formed on the heat radiation reflecting plate 401, and in this step, a patterned sacrificial structure, specifically, a patterned sacrificial structure 400 is formed on the second passivation layer.

In an embodiment of the present invention, the sacrificial structure 400 may be formed on the surface of the second passivation layer through a series of processes of sacrificial material deposition, photolithography, etching, and the like. The sacrificial structure 400 covers at least the heat radiation corresponding region 10A for alignment with the heat radiation sensing region of the thermopile structure plate such that the sacrificial structure 400 after the bonding process covers at least the heat radiation sensing region 20A.

Specifically, in this embodiment, the process of forming the sacrificial structure 400 may include: forming a sacrificial material layer completely covering one side of the circuit substrate having the heat radiation spacer; and removing the sacrificial material layer outside the heat radiation corresponding region, and taking the residual sacrificial material layer as a sacrificial structure. Wherein the sacrificial material layer can be formed by deposition, growth, and the like.

It should be noted that, based on the characteristics of the etching process, the cross section of the sacrificial structure may be a trapezoid or an inverted trapezoid, and in the process that the sacrificial structure is formed in an incomplete regular shape, the minimum size of the sacrificial structure may be at least covered by the thermal radiation sensing region.

It should be further noted that, in the embodiment of the present invention, the thickness of the sacrificial material layer needs to be strictly controlled, so that the vertical distance between the thermal radiation reflecting plate 401 and the thermopile structure in the bonded device structure is an odd multiple of 1/4 of the wavelength of the infrared radiation, thereby enabling the thermal radiation reflecting plate 401 to exert the maximum reflection capability on the residual radiation penetrating through the thermopile structure plate 20.

After the sacrificial structure 400 is formed, in the embodiment of the present invention, a second supporting layer flush with the top surface of the sacrificial structure 400 may be further formed on the circuit substrate 10, so that the second supporting layer is supported on the side surface of the sacrificial structure, and after the sacrificial structure is removed, a predetermined cavity structure may be formed, and a flat surface may be provided for a subsequent process. Wherein the material of the second support may comprise one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride and boron carbonitride.

In other embodiments of the present invention, the forming of the patterned sacrificial structure may be further implemented by the following processes: forming a second support material layer completely covering a side of the circuit substrate having the thermal radiation spacer; etching and removing the second support material layer in the heat radiation corresponding area to form a first sacrificial groove, wherein the rest second support material layer is used as a second support layer; and forming a sacrificial structure filled in the first sacrificial groove. Wherein the filling may be that the sacrificial structure is formed within the first sacrificial trench flush with the second support layer. Specifically, a sacrificial material filling the first sacrificial trench and higher than the second support layer may be formed through deposition, growth, and the like, and a Chemical Mechanical Polishing (CMP) process is further used to planarize a top surface of the sacrificial material until the sacrificial material is flush with the second support layer, and the sacrificial material filled in the first sacrificial trench is used as a sacrificial structure. Alternatively, in another embodiment of the present invention, it is also possible to directly form an isolation trench having a trench depth corresponding to the sum of the thicknesses of the heat radiation isolation plate, the heat radiation reflection plate, and the sacrificial structure when the isolation trench is formed in the previous step directly, and to directly form a sacrificial structure in the isolation trench to completely fill the isolation trench.

In the present embodiment, the second passivation layer and the second support layer may constitute a support dielectric layer 402, and the support dielectric layer 402, the thermal radiation reflecting plate 401, the thermal radiation insulating plate 404, and the sacrificial structure 400 may serve as a support structure. Wherein the material of the sacrificial structure 400 is different from the material of the second support layer and the thermal radiation reflection plate 401.

In other embodiments of the present invention, it is also possible to form the thermal radiation spacer first and form the thermal radiation reflecting plate and the sacrificial structure simultaneously in a subsequent process. The specific process comprises the following steps: forming a heat radiation spacer covering one side of the circuit substrate; forming a first passivation layer covering the heat radiation spacer; forming a third support material layer covering a side of the circuit substrate having the heat radiation spacer; removing part of the third support material layer in the heat radiation corresponding region to form a second sacrificial groove, and taking the rest third support material layer as a third support layer; sequentially forming a reflecting material layer and a sacrificial material layer covering the third supporting layer and the second sacrificial grooves, wherein the sacrificial material layer is positioned above the reflecting material layer; and removing the reflecting material layer and the sacrificial material layer outside the second sacrificial groove, taking the remaining sacrificial material layer as a sacrificial structure, and taking the reflecting material layer on the bottom surface of the sacrificial structure and the side surface of the sacrificial structure as a heat radiation reflecting plate. Wherein the material of the third support layer may include one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride, and boron carbonitride. The depth of the second sacrificial groove is adapted to the thickness of the layer structure to be formed in the second sacrificial groove, which is adapted to the sum of the thicknesses of the heat radiation reflecting plate and the sacrificial structure. It should be noted that, when the reflective material layer and the sacrificial material layer outside the second sacrificial trench are removed, a Chemical Mechanical Polishing (CMP) process may be used for the removal.

Referring to fig. 6, the thermopile structure plate 20 is bonded on the surface of the circuit substrate 10 on the side where the sacrificial structure is formed, so that the heat radiation sensing region vertically corresponds to the heat radiation corresponding region after bonding.

In this embodiment, the thermopile structure plate 20 may be inversely bonded on the circuit substrate 10, so that the first interconnection structure is located below the thermopile structure, and thus infrared radiation is not blocked, a path through which infrared radiation is transmitted to the thermopile structure is unobstructed, and meanwhile, transmission of infrared radiation to the first cavity may be reduced, and measurement accuracy of the device is improved.

In the embodiment of the present invention, the reversely bonding the thermopile structure plate 20 on the circuit substrate 10 specifically includes: and fixing the thermopile structure plate in an inverted mode on the side, provided with the third interconnection structure, of the circuit substrate.

In the embodiment of the present invention, after the thermopile structure plate 20 is inversely bonded on the circuit substrate 10, the vertical distance of the thermal radiation reflecting plate 401 from the thermopile structure is an odd number multiple of 1/4 of the wavelength of infrared radiation. Specifically, the vertical distance between the top surface 401 of the thermal radiation reflecting plate and the top surface of the thermopile structure may be adjusted by controlling the bonding process, so that the radiation reflecting plate 401 exerts the maximum reflection capability on the residual radiation penetrating through the thermopile structure plate 20.

Specifically, the vertical distance between the thermal radiation reflecting plate 401 and the thermopile structure 203a/203b is about an odd multiple of 1/4 of the wavelength λ of the incident radiation, e.g., about λ/4, 3 λ/4, 5 λ/4, etc. Thereby enabling the maximum reflection capacity of the thermal radiation reflection plate 401 for the residual radiation penetrating the thermopile structure plate 20.

Referring to fig. 7, in the embodiment of the invention, the side of the thermopile structure plate 20 away from the circuit substrate 10 is further thinned, and the bottom semiconductor layer 200 is removed.

The integration thickness is reduced by removing the bottom semiconductor layer, and the manufacturing difficulty of a subsequent release hole and a second interconnection structure is reduced.

Specifically, a suitable removing process (e.g., chemical mechanical polishing, etching, or stripping) may be selected according to the material of the bottom semiconductor layer 200 to remove the bottom semiconductor layer 200.

Referring to fig. 8, the embodiment of the present invention further forms a second interconnect structure on a side of the thermopile structure plate 20 facing away from the circuit substrate 10, the second interconnect structure connecting the first interconnect structure and the third interconnect structure.

The second interconnection structure is used for outputting the electric signals of the first interconnection structure and the third interconnection structure. Wherein a second interconnection structure 60A, 60b may be formed on the thermopile structure plate 20 at the periphery of the heat radiation sensing region 20A.

The second interconnect structure may include

first plugs

601a, 601b electrically connecting the third interconnect structure,

second plugs

603a, 603b electrically connecting the thermopile structure, and plug

interconnect lines

602a, 602b connecting the first and second plugs.

Specifically, the process of forming the second interconnect structure may include: forming a first interconnection through hole and a second interconnection through hole on one side of the thermopile structure plate, which faces away from the circuit substrate, wherein the first interconnection through hole exposes the third interconnection structure in the circuit substrate, and the second interconnection through hole exposes the first interconnection structure of the thermopile structure plate; forming an insulating medium layer on the side walls of the first interconnection through hole and the second interconnection through hole; forming a first plug in the first interconnect via and a second plug in the second interconnect via; and forming a plug interconnection line on the surface of the thermopile structure plate, wherein the plug interconnection line is connected with the first plug and the second plug.

As an example, the

second interconnection structures

60a and 60b are formed by a rewiring process, which specifically includes: etching the thermopile structure plate 20 and the supporting dielectric layer at the periphery of the thermal radiation sensing region 20A to form first interconnect vias (not shown) respectively exposing partial top surfaces of the

third interconnect structures

104a, 104 b; the thermopile structure plate 20 at the periphery of the thermal radiation sensing region 20A is etched to form a second interconnect via (not shown) exposing a part of the surface of the first interconnect structure.

Then, an insulating dielectric layer is covered on the sidewalls of the first and second interconnect vias, the insulating dielectric layer is used for insulating and isolating the subsequently filled conductive material from the thermopile structure plate 20, the material of the insulating dielectric layer may include one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon oxycarbonitride, silicon oxynitride, boron nitride, and boron carbonitride, and the bottom of the insulating dielectric layer exposes a portion of the top surface of the corresponding

third interconnect structure

104a, 104b and the surface of the corresponding first interconnect structure.

Next, conductive materials such as metal (e.g., tungsten, copper) are filled in the first and second interconnection vias, and excess conductive materials covering the surface of the dielectric layer 201 are removed by chemical mechanical polishing or the like to form first and

second plugs

601a, 601b, 603a, 603b having top surfaces flush with the top surface of the dielectric layer 201. In this embodiment, the bottom end of the first plug 601a is electrically connected to the third interconnect structure 104 a. The bottom end of the first plug 601b is electrically connected to the third interconnect structure 104 b; the bottom end of the second plug 603a is electrically connected to the first interconnect structure 300 a.

The process of forming the

plug interconnect lines

602a, 602b specifically includes: depositing a metal layer (e.g., aluminum, copper) on the surfaces of the

first plugs

601a, 601b, the

second plugs

603a, 603b, and the dielectric layer 201; next, the metal layer is subjected to photolithography and etching to remove the metal layer in the heat-sensing radiation region 20A, the remaining metal layer forms plug

interconnect lines

602a and 602b, the plug interconnect line 602a covers the top ends of the first plug 601a and the second plug 603a and electrically connects the top end of the first plug 601a and the top end of the second plug 603a, and the plug interconnect line 602b covers the top ends of the first plug 601b and the second plug 603b and electrically connects the top end of the first plug 601b and the top end of the second plug 603b.

It should be noted that when the thermopile structure plate 20 is formed based on a non-conductive material plate, the insulating medium layer may be omitted on the sidewalls of the conductive material in the

second plugs

603a, 603b and the

first plugs

601a, 601 b. In addition, the formation process of the

second interconnect structures

60a and 60b is not limited to be performed before the first cavities are formed, and may be performed after the first cavities are formed.

In other embodiments of the present invention, the second interconnect structure may include a first plug and a third plug, and correspondingly, the forming process of the second interconnect structure may further include: before the bonding of the thermopile structure plate and the circuit substrate, first forming a first plug and a third plug on the side of the thermopile structure plate having the first interconnection structure, the first plug penetrating the thermopile structure plate and being aligned with the third interconnection structure of the circuit substrate, the third plug being electrically connected to the first interconnection structure and being aligned with the third interconnection structure of the circuit substrate, forming a fourth plug and a fifth plug on the side of the circuit substrate having the sacrificial structure and being electrically connected with the third interconnection structure, the fourth plug and the fifth plug being respectively aligned with the first plug and the third plug, wherein the first plug is used for penetrating the thermopile structure plate and being aligned with the third interconnection structure of the circuit substrate, the third plug is electrically connected to the third interconnection structure of the circuit substrate through the fourth plug after the bonding of the thermopile structure plate and the circuit substrate, the third plug is electrically connected to the first interconnection structure and is used for being aligned with the third interconnection structure of the circuit substrate, and the third plug is electrically connected to the third interconnection structure of the circuit substrate through the fifth plug after the bonding of the thermopile structure plate and the circuit substrate. And further electrically connecting a third plug to the fifth plug and a first plug to the fourth plug by a conductive bonding material when the thermopile structure board and the circuit substrate are bonded, so that the third plug and the fifth plug electrically connect the first interconnect structure and the third interconnect structure, and the first plug and the fourth plug serve as output terminals to draw out corresponding electrical signals.

In another embodiment of the present invention, it is further possible to first form a third plug on the thermopile structure plate, the third plug being electrically connected to the first interconnect structure and aligned with the third interconnect structure of the circuit substrate, and form a fourth plug electrically connected to the third interconnect structure on the side of the circuit substrate having the sacrificial structure, the fourth plug being aligned with the third plug, before bonding the thermopile structure plate and the circuit substrate; and further electrically connecting a third plug to the third interconnect structure when the thermopile structure plate and the circuit substrate are bonded, and further extending through the first plug of the thermopile structure plate after bonding, the first plug being electrically connected to the third interconnect structure of the circuit substrate. Wherein, in the step of bonding the thermopile structure plate and the circuit substrate, a third plug is electrically connected to the third interconnect structure through a conductive bonding material.

Referring to fig. 9, the sacrificial structure is removed, and a first cavity 403 is formed between the thermopile structure plate and the circuit substrate.

In an embodiment of the present invention, the step of forming the first cavity 403 may include: forming at least one release hole 50 in a surface of the thermopile structure plate facing away from the circuit substrate, the release hole exposing a portion of the sacrificial structure; the sacrificial structure is removed through the release holes to form a first cavity 403.

Specifically, the at least one release hole 50 may be formed by drilling a hole from the side of the thermopile structure plate 20 opposite to the substrate 10 to expose the surface of the sacrificial structure 400 through a laser drilling or etching process.

The release holes 50 serve as cavity connecting channels to communicate the first cavity with the external space, so that the air pressure of the first cavity 403 is balanced, and the problems of warping and the like of the thermopile structure plate 20 are avoided.

Next, an etchant, which may be a vapor etchant or a liquid etchant, is introduced into the release hole 50 to remove the sacrificial structure 400, so as to form the first cavity 403. Optionally, a cleaning agent, a drying agent, or the like may be further introduced into the release hole 50 to clean and dry the surface of the first cavity 403. The cleaning agent can be deionized water or nitrogen or inert gas, and the drying agent can be isopropanol gas and the like.

Referring to fig. 10, in the embodiment of the present invention, a cover plate 70 is further provided on the thermopile sensor to protect the heat radiation sensing region 10A of the thermopile sensor.

Specifically, the step of forming the cap plate may include: providing a cover plate with a second cavity, wherein a radiation penetrating window is formed on the cover plate at the bottom of the second cavity and corresponds to the heat radiation sensing area; bonding the cover plate to the surface of the side of the thermopile structure plate facing away from the circuit substrate, so that the opening of the second cavity of the cover plate faces the circuit substrate, and the radiation penetrating window is aligned with the thermal radiation sensing area of the thermopile structure plate; and removing part of the cover plate, so that the rest cover plate exposes at least part of the second interconnection structure of the thermopile structure plate.

The cover plate material of the second cavity side wall and the cover plate material of the second cavity top can be the same or different, and in the embodiment of the invention, the cover plate material of the second cavity side wall and the cover plate material of the second cavity top are different, so that the cover plate of the second cavity top can be removed conveniently. The apron material at second cavity top can be for glass, plastics, semiconductor etc. through inciting somebody to action the apron is bonded extremely the thermopile structural slab deviates from circuit substrate's surface, in order to cover the thermal radiation induction zone of thermopile structural slab, and, based on the setting of second cavity makes the thermal radiation induction zone top of thermopile structural slab is the cavity structures, has avoided the contact of relevant material to the thermal radiation induction zone of thermopile structural slab to avoid causing the influence to the thermal radiation induction zone of thermopile structural slab.

The radiation transmission window is used for transmitting infrared rays. In one embodiment, an infrared antireflection film may be further disposed above the radiation transmission window.

The material of the radiation penetration window comprises one or two of a semiconductor (such as silicon, germanium or silicon on insulator, etc.) and an organic filter material (such as polyethylene, polypropylene, etc.).

The shape of the radiation penetrating window can be regular shapes such as rectangle, square or circle, and can also be other irregular shapes.

In the embodiment of the invention, the circuit substrate is further bonded below the first cavity, so that radiation loss corresponding to the opened first cavity can be avoided, and the measurement accuracy of the device is improved. In addition, the scheme that the circuit substrate is further bonded below the first cavity realizes vertical system integration of the device under the condition of not increasing the area, is favorable for shortening the interconnection length from the sensing signal to the reading circuit, signal loss and noise, and is favorable for miniaturization of the device; in addition, the method is favorable for further extending to the 3D system integration of manufacturing the active thermal imaging sensor array, the CMOS readout pixel array and peripheral circuits.

According to the embodiment of the invention, the thermal radiation reflecting plate is formed below the first cavity, so that the infrared radiation transmitted into the first cavity can be reflected back to the thermopile structure plate, and the precision of the device is improved.

In the embodiment of the invention, the thermal radiation isolation plate is further formed below the thermal radiation reflection plate of the first cavity and is used for realizing thermal insulation of the thermal radiation induction area of the circuit substrate and the thermopile structure plate and preventing the thermal radiation in the circuit substrate from being conducted to the thermopile structure plate so as to influence the precision of the device.

According to the embodiment of the invention, after the bonding of the thermopile structure plate, the first interconnection structure is positioned below the thermopile structure, so that the infrared radiation is not blocked, the path for transmitting the infrared radiation to the thermopile structure is smooth, the transmission of the infrared radiation to the first cavity can be reduced, and the measurement precision of the device is improved.

In addition, the first cavity is formed through the sacrificial structure in the embodiment of the invention, so that the sacrificial structure can support the corresponding device structure in the process of forming the thermopile sensor, the defects of collapse and the like of the corresponding device structure are avoided, and the yield of the device is further improved.

It should be noted that, specific descriptions of the methods for forming the thermopile sensor according to the present embodiment may be referred to each other, and are not repeated herein.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A method of making a thermopile sensor, comprising:

forming a heat radiation reflecting plate on the circuit substrate;

forming a patterned sacrificial structure on one side of the circuit substrate, which is provided with the heat radiation reflecting plate, wherein the projection of the sacrificial structure on the circuit substrate at least covers the heat radiation corresponding region, and a second supporting layer is formed on the side part of the sacrificial structure;

removing the sacrificial structure, and forming a first cavity between the thermopile structure plate and the circuit substrate;

the forming of the patterned sacrificial structure comprises:

forming a second support material layer completely covering a side of the circuit substrate having the thermal radiation reflecting plate;

etching and removing the second support material layer in the heat radiation corresponding area to form a first sacrificial groove, and taking the remaining second support material layer as the second support layer;

forming a sacrificial structure filled in the first sacrificial trench;

after removing the sacrificial structure, the method further comprises:

providing a cover plate with a second cavity, wherein a radiation penetrating window is formed on the cover plate at the bottom of the second cavity and corresponds to the heat radiation sensing area;

bonding the cover plate to the surface of the side of the thermopile structure plate facing away from the circuit substrate, so that the opening of the second cavity of the cover plate faces the circuit substrate, and the radiation penetrating window is aligned with the thermal radiation sensing area of the thermopile structure plate;

and removing part of the cover plate, so that the rest cover plate exposes part of the second interconnection structure of the thermopile structure plate.

2. The method of claim 1, wherein after providing the thermopile structure plate and the circuit substrate and before forming the heat radiation reflecting plate on the circuit substrate, the method further comprises:

forming a thermal radiation spacer on the circuit substrate;

after providing the thermopile structure plate and the circuit substrate, before the bonding step, the method further includes: forming a first interconnect structure on the thermopile structure plate in electrical connection with the thermopile structure.

3. The method of manufacturing of claim 2, wherein the step of providing a thermopile structure plate comprises:

providing a first substrate;

and carrying out N-type ion doping on a partial region of the first substrate to form an N-type doped region, carrying out P-type ion doping on a partial region of the first substrate to form a P-type doped region, wherein the N-type doped region and the P-type doped region are used as a thermopile structure.

4. The method according to claim 3, wherein the first substrate is a silicon-on-insulator substrate, the silicon-on-insulator substrate comprises a bottom semiconductor layer, an insulating layer and a top semiconductor layer stacked in sequence from bottom to top, and the thermopile structure is formed in the top semiconductor layer;

after bonding, before removing the sacrificial structure, the manufacturing method further comprises: and removing the bottom semiconductor layer.

5. The manufacturing method according to claim 2, wherein the thermal radiation shielding plate and the thermal radiation reflecting plate are simultaneously formed, and the thermal radiation shielding plate and the thermal radiation reflecting plate are simultaneously formed on the circuit substrate, comprising:

forming an isolation material layer covering the circuit substrate;

forming a first passivation material layer overlying the isolation material layer;

forming a reflective material layer overlying the first passivation material layer;

and removing the isolating material layer, the first passivation material layer and the reflection material layer outside the heat radiation corresponding region, taking the rest isolating material layer as a heat radiation isolating plate, taking the rest first passivation material layer as a first passivation layer and taking the rest reflection material layer as a heat radiation reflecting plate.

6. The manufacturing method according to claim 2, wherein the thermal radiation shielding plate and the thermal radiation reflecting plate are simultaneously formed, and the thermal radiation shielding plate and the thermal radiation reflecting plate are simultaneously formed on the circuit substrate, comprising:

forming a first supporting material layer covering the circuit substrate;

removing the first support material layer in the area corresponding to the heat radiation to form an isolation groove, and taking the rest first support material layer as a first support layer;

sequentially forming an isolation material layer, a first passivation material layer and a reflection material layer which conformally cover the first support layer and the isolation groove, wherein the reflection material layer is positioned above the first passivation material layer, and the first passivation material layer is positioned above the isolation material layer;

and removing the isolation material layer, the first passivation material layer and the reflection material layer outside the isolation groove, taking the rest isolation material layer as a thermal radiation isolation plate, taking the rest first passivation material layer as a first passivation layer and taking the rest reflection material layer as a thermal radiation reflection plate.

7. The method of claim 2, wherein after forming the heat radiation reflecting plate on the circuit substrate and before forming the patterned sacrificial structure, further comprising:

and forming a second passivation layer having a planar surface on the heat radiation reflecting plate.

8. The manufacturing method according to claim 2, wherein the heat radiation reflecting plate and the sacrificial structure are formed simultaneously, and the step of simultaneously forming the heat radiation reflecting plate and the sacrificial structure includes:

forming a third support material layer covering a side of the circuit substrate having the heat radiation spacer;

removing part of the third support material layer in the heat radiation corresponding region to form a second sacrificial groove, and taking the rest third support material layer as a third support layer;

sequentially forming a reflecting material layer and a sacrificial material layer covering the third supporting layer and the second sacrificial grooves, wherein the sacrificial material layer is positioned above the reflecting material layer;

and removing the reflecting material layer and the sacrificial material layer outside the second sacrificial groove, taking the remaining sacrificial material layer as a sacrificial structure, and taking the reflecting material layer on the bottom surface of the sacrificial structure and the side surface of the sacrificial structure as a heat radiation reflecting plate.

9. The method of manufacturing according to claim 1, wherein after the bonding step, a vertical distance of the thermal radiation reflecting plate from the thermopile structure is an odd multiple of 1/4 of a wavelength of infrared radiation.

10. The method of manufacturing according to claim 2, wherein the circuit substrate includes a third interconnect structure, and after the bonding of the thermopile structure plate on the surface of the circuit substrate on the side where the sacrificial structure is formed and before the removing of the sacrificial structure, the method further comprises:

and forming a second interconnection structure on one side of the thermopile structure plate, which is far away from the circuit substrate, wherein the second interconnection structure is electrically connected with the first interconnection structure and the third interconnection structure.

11. The method of manufacturing of claim 10, wherein the second interconnect structure includes a first plug, a second plug, and a plug interconnect line connecting the first plug and the second plug, the forming of the second interconnect structure including:

forming a first interconnection through hole and a second interconnection through hole on one side of the thermopile structure plate, which faces away from the circuit substrate, wherein the first interconnection through hole exposes the third interconnection structure in the circuit substrate, and the second interconnection through hole exposes the first interconnection structure of the thermopile structure plate;

forming an insulating medium layer on the side walls of the first interconnection through hole and the second interconnection through hole;

forming a first plug in the first interconnect via and a second plug in the second interconnect via;

and forming a plug interconnection line on the surface of the thermopile structure plate, wherein the plug interconnection line is connected with the first plug and the second plug.

12. The method of manufacturing of claim 10, wherein the second interconnect structure includes a first plug and a third plug, and a fourth plug and a fifth plug, and the step of forming the second interconnect structure includes:

after the forming of the patterned sacrificial structure, before the bonding of the thermopile structure plate on the surface of the circuit substrate on the side on which the sacrificial structure is formed, forming a first plug and a third plug on the side of the thermopile structure plate on which the first interconnection structure is formed, wherein the first plug penetrates through the thermopile structure plate and is aligned with the third interconnection structure of the circuit substrate, and the third plug is electrically connected to the first interconnection structure and is aligned with the third interconnection structure of the circuit substrate; forming a fourth plug and a fifth plug electrically connected with the third interconnection structure on one side of the circuit substrate with the sacrificial structure, wherein the fourth plug and the fifth plug are respectively aligned with the first plug and the third plug;

in the step of bonding the thermopile structure plate on the surface of the circuit substrate on the side where the support structure is formed, the first and third plugs are electrically connected to the fourth and fifth plugs, respectively.

13. The method of manufacturing of claim 10, wherein the second interconnect structure includes a first plug, a third plug, and a fourth plug, and the step of forming the second interconnect structure includes:

after the patterned sacrificial structure is formed and before the thermopile structure plate is bonded on the surface of the circuit substrate on the side provided with the sacrificial structure, forming a third plug on the side provided with the first interconnection structure of the thermopile structure plate, wherein the third plug is electrically connected to the first interconnection structure and is aligned with the third interconnection structure of the circuit substrate; forming a fourth plug electrically connected with the third interconnection structure on one side of the circuit substrate with the sacrificial structure, wherein the fourth plug is aligned with the third plug;

in the step of bonding the thermopile structure plate on the surface of the circuit substrate on the side where the support structure is formed, the third plug is electrically connected to the fourth plug;

and after the step of bonding the thermopile structure plate on the surface of the side, provided with the supporting structure, of the circuit substrate, forming a first plug penetrating through the thermopile structure plate, wherein the first plug is electrically connected with a third interconnection structure of the circuit substrate.

14. The method of manufacturing of claim 1, wherein said removing the sacrificial structure comprises:

forming at least one release hole on the surface of the thermopile structure plate, which faces away from the circuit substrate, wherein the release hole exposes part of the sacrificial structure;

and removing the sacrificial structure through the release hole to form a first cavity.

15. The method of claim 2, wherein the sacrificial structure is at least one of germanium and amorphous carbon; the material of the thermal radiation reflecting plate is a conductive material and/or a photonic crystal material, and the conductive material is one or more of a metal material, a metal silicide material and a semiconductor material; the material of the heat radiation isolation plate is one or more of a metal material, a metal silicide material and a semiconductor material.