CN102566339A - Global alignment mark and global alignment method - Google Patents
Global alignment mark and global alignment method Download PDFInfo
- Publication number
- CN102566339A CN102566339A CN2011103420627A CN201110342062A CN102566339A CN 102566339 A CN102566339 A CN 102566339A CN 2011103420627 A CN2011103420627 A CN 2011103420627A CN 201110342062 A CN201110342062 A CN 201110342062A CN 102566339 A CN102566339 A CN 102566339A
- Authority
- CN
- China
- Prior art keywords
- alignment mark
- global alignment
- side wall
- signal sources
- global
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011103420627A CN102566339A (en) | 2011-11-02 | 2011-11-02 | Global alignment mark and global alignment method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011103420627A CN102566339A (en) | 2011-11-02 | 2011-11-02 | Global alignment mark and global alignment method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102566339A true CN102566339A (en) | 2012-07-11 |
Family
ID=46412046
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2011103420627A Pending CN102566339A (en) | 2011-11-02 | 2011-11-02 | Global alignment mark and global alignment method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102566339A (en) |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001035776A (en) * | 1999-07-22 | 2001-02-09 | Seiko Epson Corp | Method for manufacturing semiconductor device, and reticle |
JP2001267215A (en) * | 2000-03-16 | 2001-09-28 | Nikon Corp | Positional information measuring instrument and aligner |
US20030003677A1 (en) * | 2001-06-27 | 2003-01-02 | Canon Kabushiki Kaisha | Alignment method, exposure apparatus and device fabrication method |
CN1963679A (en) * | 2006-11-24 | 2007-05-16 | 上海微电子装备有限公司 | Alignment mark structure for aligning wafer |
US20090096116A1 (en) * | 2007-10-16 | 2009-04-16 | Macronix International Co., Ltd. | Alignment mark and mehtod for forming the same |
CN101446766A (en) * | 2007-11-27 | 2009-06-03 | 上海华虹Nec电子有限公司 | Exposure and alignment mark on silicon chip |
CN101515116A (en) * | 2008-02-21 | 2009-08-26 | Asml荷兰有限公司 | Mark structure for coarse wafer alignment and method for manufacturing such a mark structure |
CN101750899A (en) * | 2008-12-04 | 2010-06-23 | 上海华虹Nec电子有限公司 | Lithography layout and method for measuring lithography deformation thereof |
US20110089581A1 (en) * | 2009-10-19 | 2011-04-21 | Victor Pol | Semiconductor wafer having scribe lane alignment marks for reducing crack propagation |
CN102044538A (en) * | 2009-10-02 | 2011-05-04 | 富晶电子股份有限公司 | Semiconductor chip, seal ring structure and manufacturing method thereof |
-
2011
- 2011-11-02 CN CN2011103420627A patent/CN102566339A/en active Pending
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001035776A (en) * | 1999-07-22 | 2001-02-09 | Seiko Epson Corp | Method for manufacturing semiconductor device, and reticle |
JP2001267215A (en) * | 2000-03-16 | 2001-09-28 | Nikon Corp | Positional information measuring instrument and aligner |
US20030003677A1 (en) * | 2001-06-27 | 2003-01-02 | Canon Kabushiki Kaisha | Alignment method, exposure apparatus and device fabrication method |
CN1963679A (en) * | 2006-11-24 | 2007-05-16 | 上海微电子装备有限公司 | Alignment mark structure for aligning wafer |
US20090096116A1 (en) * | 2007-10-16 | 2009-04-16 | Macronix International Co., Ltd. | Alignment mark and mehtod for forming the same |
CN101446766A (en) * | 2007-11-27 | 2009-06-03 | 上海华虹Nec电子有限公司 | Exposure and alignment mark on silicon chip |
CN101515116A (en) * | 2008-02-21 | 2009-08-26 | Asml荷兰有限公司 | Mark structure for coarse wafer alignment and method for manufacturing such a mark structure |
CN101750899A (en) * | 2008-12-04 | 2010-06-23 | 上海华虹Nec电子有限公司 | Lithography layout and method for measuring lithography deformation thereof |
CN102044538A (en) * | 2009-10-02 | 2011-05-04 | 富晶电子股份有限公司 | Semiconductor chip, seal ring structure and manufacturing method thereof |
US20110089581A1 (en) * | 2009-10-19 | 2011-04-21 | Victor Pol | Semiconductor wafer having scribe lane alignment marks for reducing crack propagation |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9209137B2 (en) | Multiple seal-ring structure for the design, fabrication, and packaging of integrated circuits | |
CN103529658B (en) | Method for aligning square wafer in primary photolithography technique | |
CN103811407B (en) | The back-patterned process of silicon chip | |
CN103246155B (en) | Photolithography mask and exposure method thereof | |
US20180358255A1 (en) | Semiconductor wafer device and manufacturing method thereof | |
US20160079181A1 (en) | Traceable integrated circuits and production method thereof | |
CN101644898A (en) | Method for measuring alignment precision among lithography machines with different magnifications | |
CN107065450A (en) | A kind of power semiconductor chip, the reticle and its exposure method of the chip | |
CN104979223A (en) | Wafer bonding process | |
CN103091974B (en) | Photolithography mask structure | |
CN103811298A (en) | Manufacturing method for test alignment chip | |
CN102566339A (en) | Global alignment mark and global alignment method | |
CN102063010A (en) | Optical proximity correction method | |
CN102436151A (en) | Forming method of photoetching layout | |
CN203117634U (en) | Compatible mask reference design layout | |
CN104281010A (en) | Forming method and substrate | |
CN201955619U (en) | Layout structure of photoetching alignment graph in semiconductor manufacture | |
CN102540699A (en) | Novel photomask reference mark pattern | |
CN102436132A (en) | Method for optical proximity correction based on different substrates | |
JP2010258298A (en) | Semiconductor integrated circuit chip and layout method thereof | |
CN101692425B (en) | Novel design method for ESD protection | |
US8912671B2 (en) | Semiconductor device having alignment mark | |
CN104992927A (en) | Sawing method for making wafer contain dies of a variety of different sizes | |
CN102543954B (en) | Overlay mark | |
CN102445865A (en) | Photo-etching graphic alignment marking method capable of reducing alignment bias of photo-etching machine |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140425 |
|
C10 | Entry into substantive examination | ||
C41 | Transfer of patent application or patent right or utility model | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20140425 Address after: 201203 Shanghai Zhangjiang hi tech park Zuchongzhi Road No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 818 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
|
C12 | Rejection of a patent application after its publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20120711 |