CN104992927A - Sawing method for making wafer contain dies of a variety of different sizes - Google Patents

Abstract

The invention relates to a sawing method for making a wafer contain dies of a variety of different sizes. The method is characterized by comprising the following steps: (1) designing dies of two or more sizes on a same die drawing, arranging a first die sawing way in the center of the die drawing, and sequentially arranging a second die sawing way to an Nth chip sawing way at the periphery of the first die sawing way, wherein N is an integer greater than 1, the size increases sequentially from the area formed by the first die sawing way to the area formed by the Nth die sawing way, the center of the first die sawing way and the center of the Nth die sawing way are in the same point, and the diagonal of the first die sawing way and the diagonal of the Nth die sawing way overlap; and (2) using the die drawing obtained in step (1) to saw a wafer, and obtaining dies corresponding to the sizes of the first die sawing way to the Nth die sawing way on the same wafer according to the production need. According to the invention, dies of different sizes are designed on the same wafer, the operation is convenient and quick, and the cost is reduced.

Description

Same wafer comprises the cutting method of multiple different size chip

Technical field

The present invention relates to the cutting method that a kind of same wafer comprises multiple different size chip, belong to semiconductor device packaging technique field.

Background technology

Tradition wafer (Wafer) manufactures, one wafer only comprises a kind of chip (Die) size (as shown in Figure 1 usually, in one wafer, chip is measure-alike), identical chip size is produced, step is easy, wafer cutting (Sawing) during wafer manufacture and the later stage encapsulation in early stage can be conducive to, apply very extensive in production in enormous quantities manufactures.

But in the Product evaluation development phase in early stage, due to the uncertainty of product, the unsteadiness of properties of product, often needs the chip size that assessment two kinds is even multiple, does not often need the so many chip that puts into production.Because same wafer only comprises a kind of chip size, different chip size often needs to manufacture more wafers, and unnecessary chip often causes waste, adds the cost of early investment.

When traditional sense needing the chip producing different size, as the chip of 5 × 5 mm2,6.5 × 6.5 mm2 and 8 × 8 mm2, tri-kinds of sizes need be produced, need corresponding chip drawing respectively, as shown in Figure 2, chip drawing has Cutting Road 1a, Cutting Road 1a is generally 0.08mm, and on different chip drawings, Cutting Road 1a surrounds the region formed and is respectively 5 × 5 mm2,6.5 × 6.5 mm2 and 8 × 8 mm2, with the chip that correspondence is identical.Adopt different chip drawings to cut wafer, obtain chip with cutting on wafer.But this mode can only cut a kind of chip of size in same wafer.

Summary of the invention

The object of the invention is to overcome the deficiencies in the prior art, there is provided a kind of same wafer to comprise the cutting method of multiple different size chip, by the chip design of different size on same wafer, cut into the chip of different size according to later stage need of production, convenient and swift, reduce costs.

According to technical scheme provided by the invention, described same wafer comprises the cutting method of multiple different size chip, it is characterized in that, comprises the following steps:

(1) by the chip design of two or more size on same chip drawing: the first chip cutting road is set at the center of chip drawing, arrange that the second chip cutting road is to N chip cutting road successively in the first periphery, chip cutting road, N be greater than 1 integer; First chip cutting road to N chip cutting road surrounds the region formed and increases progressively successively, the first chip cutting road and N chip cutting road be centrally located at same point, the diagonal in the first chip cutting road and N chip cutting road all overlaps;

(2) the chip drawing adopting step (1) to obtain carries out cutting to wafer and removes, and cuts the chip obtaining size corresponding to the first chip cutting road to N chip cutting road by need of production on same wafer.

Further, one jiao of described first chip cutting road and N chip cutting road arranges cutting respectively to indicate.

The present invention has the following advantages:

(1) the present invention is on the basis that traditional wafer manufactures, and by two or more chip designs on same wafer, reduces the quantity of wafer production, thus reduces costs;

(2) The present invention reduces additional die sinking expense in early stage, the input of optional equipment, thus reduce costs;

(3) the present invention can shorten the time that wafer manufactures, convenient and swift, shortens the early development time.

Accompanying drawing explanation

Fig. 1 is the cutting schematic diagram of wafer in prior art.

Fig. 2 is the schematic diagram of prior art chips drawing.

Fig. 3 is the schematic diagram of chip drawing of the present invention.

Schematic diagram when Fig. 4 is wafer of the present invention cutting.

Embodiment

Below in conjunction with concrete accompanying drawing, the invention will be further described.

Same wafer of the present invention comprises the cutting method of multiple different size chip, comprises the following steps:

(1) design chips drawing: by 5 × 5 mm2, the chip design of 6.5 × 6.5 mm2 and 8 × 8 mm2, tri-kinds of sizes is on same chip drawing, as shown in Figure 3, 5 × 5 mm2 chip cutting roads 1 are set at the center of chip drawing, in 5 × 5 peripheral disposition 6.5 × 6.5 mm2 chip cutting roads, mm2 chip cutting road 12, in 6.5 × 6.5 peripheral disposition 8 × 8 mm2 chip cutting roads, mm2 chip cutting road 23, 5 × 5 mm2 chip cutting roads 1, 6.5 × 6.5 mm2 chip cutting road, mm2 chip cutting roads 2 and 8 × 83 be centrally located at same point, 5 × 5 mm2 chip cutting roads 1, the diagonal in 6.5 × 6.5 mm2 chip cutting road, mm2 chip cutting roads 2 and 8 × 83 all overlaps, one jiao of described 5 × 5 mm2 chip cutting roads, mm2 chip cutting road 2 and 8 × 8, mm2 chip cutting road 1,6.5 × 6.5 3 arranges cutting sign 4 respectively,

(2) the chip drawing adopting step (1) to obtain carries out cutting to wafer and removes, and cuts the chip obtaining 5 × 5 mm2,6.5 × 6.5 mm2 and 8 × 8 mm2, tri-kinds of sizes by necessary requirement on same wafer; As shown in Figure 4, the present invention, by being included in large size chip by small-size chips, cuts into required size according to need of production, and on same wafer, cutting obtains the chip of different size, reduces the quantity of wafer production, thus reduces costs.

Claims (2)

1. same wafer comprises a cutting method for multiple different size chip, it is characterized in that, comprises the following steps:

(1) by the chip design of two or more size on same chip drawing: the first chip cutting road is set at the center of chip drawing, arrange that the second chip cutting road is to N chip cutting road successively in the first periphery, chip cutting road, N be greater than 1 integer; First chip cutting road to N chip cutting road surrounds the region formed and increases progressively successively, the first chip cutting road and N chip cutting road be centrally located at same point, the diagonal in the first chip cutting road and N chip cutting road all overlaps;

(2) the chip drawing adopting step (1) to obtain carries out cutting to wafer and removes, and cuts the chip obtaining size corresponding to the first chip cutting road to N chip cutting road by need of production on same wafer.

2. same wafer as claimed in claim 1 comprises the cutting method of multiple different size chip, it is characterized in that: on one jiao of described first chip cutting road and N chip cutting road, arrange cutting respectively indicate.