CN102548216A - Method for manufacturing initial layer core veneer - Google Patents

Method for manufacturing initial layer core veneer Download PDF

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Publication number
CN102548216A
CN102548216A CN2010105865334A CN201010586533A CN102548216A CN 102548216 A CN102548216 A CN 102548216A CN 2010105865334 A CN2010105865334 A CN 2010105865334A CN 201010586533 A CN201010586533 A CN 201010586533A CN 102548216 A CN102548216 A CN 102548216A
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protective layer
layer
tin
support plate
make
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CN2010105865334A
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CN102548216B (en
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苏新虹
朱兴华
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New Founder Holdings Development Co ltd
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Peking University Founder Group Co Ltd
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Priority to CN201010586533.4A priority Critical patent/CN102548216B/en
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Abstract

The invention relates to a method for manufacturing an initial layer core veneer; the method comprises the following steps of: manufacturing a first protective layer on a carrier plate; manufacturing a first seed layer, an initial circuit layer, an interlayer conductive pillar, an insulating layer and a second seed layer on the first protective layer; manufacturing a second protective layer on the second seed layer; removing the carrier layer; and removing the first protective layer and the second protective layer, wherein the first protective layer and the second protective layer are tin protective layers. The method has the advantages that the gap problem of the initial circuit layer can be avoided, the finished product rate of the initial layer core veneer can be increased, and the manufacturing cost of the initial layer core veneer also can be reduced.

Description

Make the method for initial layers central layer
Technical field
The invention belongs to art of printed circuit boards, relate to a kind of manufacture method of central layer, the manufacture method of the initial layers central layer that is adopted when being specifically related to make seedless base plate for packaging.
Background technology
The fast development of electronic technology makes that the integrated level of semiconductor device is increasingly high, thereby base plate for packaging is developed to multi-layer sheet by lamina gradually, for example high density PCB (printed circuit board (PCB)) base plate for packaging.In order to improve the integrated level of PCB base plate for packaging, adopt the interlayer interconnection technique that multi-layer sheet is connected, to obtain more available wiring area in limited space.
At present, the method for manufacturing PCB base plate for packaging includes nuclear Layer increasing method and seedless Layer increasing method.Yet, utilize the thickness that the nuclear base plate for packaging is arranged that has the nuclear Layer increasing method to make thicker, be unfavorable for that base plate for packaging is to highly integrated development.And, when needs processing thickness below 60 μ m the nuclear base plate for packaging is arranged the time, its rate of finished products is lower.Therefore, in practical application, extensively adopt seedless Layer increasing method to make base plate for packaging.
Seedless Layer increasing method is to make one or more layers line layer on initial layers central layer surface, thereby forms base plate for packaging.The concrete manufacturing process of initial layers central layer is following: at first adopt electroplating technology to make one deck nickel dam on copper support plate surface, nickel dam is a protective layer; Then in electroplating surface one deck copper film Seed Layer of nickel dam; Utilize graph transfer method on Seed Layer, to electroplate initial line road layer and interlayer copper post conductting layer again; Carry out lamination, nog plate, Seed Layer sputter coating, Seed Layer plating and electroless nickel layer protective layer afterwards successively; Through the method for chemical etching copper support plate and nickel dam protective layer are got rid of at last, thereby acquisition is used for the initial layers central layer of seedless base plate for packaging.
Yet, there is following shortcoming when adopting above-mentioned technology to make the initial layers central layer:
The first, the nickel dam protective layer that electroplating technology is made exists nickel dam to dredge the hole problem, therefore can't cover line layer fully, when last chemical etching copper support plate technology, causes the line layer breach easily, thereby causes scrapping of initial layers central layer;
The second, dredge the hole problem in order to overcome nickel dam, often need thicker nickel dam, the cost that this directly increases electroless nickel layer and removes nickel dam, thus the cost of manufacture of layer central layer that cause beginning is higher, and then cause the cost of manufacture of whole base plate for packaging higher.
Summary of the invention
Technical problem to be solved by this invention is to above-mentioned deficiency of the prior art, and a kind of method of making the initial layers central layer is provided, and to improve the rate of finished products of initial layers central layer, reduces the cost of manufacture of initial layers central layer simultaneously.
The technical scheme that is adopted that solves the problems of the technologies described above provides a kind of method of making the initial layers central layer, comprising: on support plate, make first protective layer; On said first protective layer, make first Seed Layer, initial line layer, interlayer conductive pole, insulating barrier and second Seed Layer; On said second Seed Layer, make second protective layer; Remove said support plate; Remove said first protective layer and said second protective layer; At least a protective layer in said first protective layer and said second protective layer is the tin protective layer.
Preferably, said tin protective layer adopts chemical deposition or electro-plating method to make.
Preferably, the step that adopts chemical deposition to make said tin protective layer comprises: adopt degreaser to said support plate oil removing; For the first time wash said support plate, preferably wash with deionized water; The said support plate of little erosion; For the second time wash said support plate, preferably wash with deionized water; And/or at said support plate surface preimpregnation tin; The heavy tin of chemistry.
Preferably, Na is adopted in said little erosion 2SO 4And H 2SO 4Solution, the time is 60~85msec, preferred 60~80msec is more preferably 65~70msec; And/or said preimpregnation tin at room temperature, and the duration is 1~2min, preferred 2min; And/or the heavy tin of said chemistry is at 40~80 ℃, preferred 45~70 ℃, is more preferably under 50~65 ℃ the temperature and carries out; And/or the heavy tin time be 10~25min, preferred 15~20min.
Preferably, the thickness of said tin protective layer is 0.5~1.4 μ m, preferred 0.8~1.2 μ m.
Preferably, adopt etching mode to remove said first and second protective layers.
Preferably, adopt chemical etching or ion beam milling mode to remove said first and second protective layers.
More preferably, said first protective layer is identical with the thickness of said second protective layer.
Preferably, said first Seed Layer and said second Seed Layer adopt chemical deposition or sputter mode to make.
Preferably, after making said first protective layer and/or after making said second protective layer, detect the thin hole index of said first protective layer and/or said second protective layer.
The present invention has following beneficial effect:
The method of making initial layers central layer provided by the invention adopts the tin layer as protective layer; Because the tin protective layer is dense; Thin tin protective layer can be protected initial line layer well; Do not dredge the hole problem thereby do not exist, avoid the gap problem of initial line layer, and then can improve the rate of finished products of initial layers central layer; And thin tin protective layer can also reduce the cost of making the tin protective layer and removing the tin protective layer, thereby reduces the cost of manufacture of initial layers central layer.
Description of drawings
Fig. 1 a to Fig. 1 k is the generalized section of the method for making initial layers central layer according to the invention.
Embodiment
For making those skilled in the art understand technical scheme of the present invention better, be described in detail below in conjunction with the method for accompanying drawing to making initial layers central layer provided by the invention.
The present invention provides a kind of method of making the initial layers central layer, comprising: on support plate, make first protective layer; On said first protective layer, make first Seed Layer, initial line layer, interlayer conductive pole, insulating barrier and second Seed Layer; On said second Seed Layer, make second protective layer; Remove said support plate; Remove said first protective layer and said second protective layer; At least a protective layer in said first protective layer and said second protective layer is the tin protective layer.
Preferably, in various embodiments of the present invention, said tin protective layer adopts chemical deposition or electro-plating method to make.
Preferably, in various embodiments of the present invention, the step that adopts chemical deposition to make said tin protective layer comprises: adopt degreaser to said support plate oil removing; For the first time wash said support plate, preferably wash with deionized water; The said support plate of little erosion; For the second time wash said support plate, preferably wash with deionized water; And/or at said support plate surface preimpregnation tin; The heavy tin of chemistry.
Preferably, in various embodiments of the present invention, comprise at least a in the following characteristic:
Na is adopted in said little erosion 2SO 4And H 2SO 4Solution, the time is 60~85msec, preferred 60~80msec is more preferably 65~70msec; And/or
Said preimpregnation tin at room temperature, the duration is 1~2min, preferred 2min; And/or
The heavy tin of said chemistry is at 40~80 ℃, preferred 45~70 ℃, is more preferably under 50~65 ℃ the temperature and carries out; And/or
The heavy tin time is 10~25min, preferred 15~20min.
Preferably, in various embodiments of the present invention, the thickness of said tin protective layer is 0.5~1.4 μ m, preferred 0.8~1.2 μ m.
Preferably, in various embodiments of the present invention, adopt etching mode to remove said first and second protective layers.
Preferably, in various embodiments of the present invention, adopt chemical etching or ion beam milling mode to remove said first and second protective layers.
More preferably, in various embodiments of the present invention, said first protective layer is identical with the thickness of said second protective layer.
Preferably, in various embodiments of the present invention, said first Seed Layer and said second Seed Layer adopt chemical deposition or sputter mode to make.
Preferably; In various embodiments of the present invention, after making said first protective layer and/or after said second protective layer of making, detect the thin hole index (protective layer that for example obtains through the surperficial or near surperficial porosity of measuring protective layer is dredged the hole index) of said first protective layer and/or said second protective layer.
See also the generalized section that Fig. 1 a to Fig. 1 k is the method for making initial layers central layer according to the invention.The method that present embodiment is made the initial layers central layer comprises:
Step s100 at first cleans up qualified copper support plate 101.See also Fig. 1 a; Utilize the method for figure transfer then; The whole plate of one side that need not make initial line layer at copper support plate 101 attaches last layer anti-plate protection dry film; Through overexposure, development dry film is solidified then, thereby form the first anti-plate protective layer 102 that one deck can be resisted the electroplate liquid corrosion at copper support plate 1.
Step s200 sees also Fig. 1 b, and the one side of utilizing the heavy tin method of chemistry on copper support plate 1, not make anti-plate protective layer 102 is made the first tin protective layer 201.The thickness of the first tin protective layer 201 can be regulated according to the surface quality situation of copper support plate 101.Usually, when the surface quality of copper support plate 101 was relatively poor, the thickness of the first tin protective layer 201 was thicker relatively; When the surface quality of copper support plate 101 was better, the thickness of the first tin protective layer 201 was thinner relatively.
The concrete steps and the technological parameter of the heavy process of tin of chemistry are following: at first adopt the acid deoiling agent to 101 oil removings of copper support plate clean 2~3min (minute), preferred 1.5~2min; Carry out washing the first time 1~2min again, preferred 2min, and/or adopt washed with de-ionized water; Then, at existing Na 2SO 4And H 2SO 4Little erosion in the solution, little erosion time is 60~85msec (millisecond), preferred 60~80msec is more preferably 65~70msec; Wash for the second time 1~2min, preferred 2min, and/or adopt washed with de-ionized water; And/or, at room temperature, in the heavy solution of tin of preimpregnation cylinder, continuing to place 1~2min, preferred 2min is to carry out preimpregnation tin to support plate; And/or it is 40~80 ℃ that copper support plate 101 is put into temperature, preferred 45~70 ℃; Be more preferably 10~25min in 50~65 ℃ the heavy solution of tin; Preferred 15~20min is 0.5~1.4 μ m (micron) thereby obtain thickness, the first tin protective layer 201 of preferred 0.8~1.2 μ m.In the present embodiment, the heavy tin liquid medicine of the CT-18M that heavy solution of tin can adopt Ying Nuo Imtech to produce.
Step s300 sees also Fig. 1 c, adopts electroplating technology to make the first seed copper layer 301 that one deck covers the whole first tin protective layer 201 on the surface of tin ground floor protective layer 201.The first seed copper layer 301 also can adopt the method for physical deposition (like magnetron sputtering) or other chemical deposition to make.
Step s400 sees also Fig. 1 d, forms one deck first dry film 402a through figure transfer on the surface of the first seed copper layer 301, utilizes electroplating technology to make initial line layer 403 on the surface of the first seed copper layer 301 again; Then, make on the surface of the first seed copper layer 301 through figure transfer once more and form the second dry film 402b, utilize conductive pole between the electroplating technology making layer (being also referred to as conduction copper column) 401 again.
Step s500 sees also Fig. 1 e, and the first dry film 402a, the second dry film 402b and the first anti-plate diaphragm 102 in step s100, made are removed.
Step s600 sees also Fig. 1 f, joins originally and laminating technology making insulating barrier 601 through brown, prepreg lamination, and the thickness of insulating barrier 601 is decided with the thickness of interlayer conductive pole 401 according to pairing initial line layer 403.
Step s700 sees also Fig. 1 g, handles through nog plate, makes the thickness of insulating barrier 601 and levelness reach designing requirement, and interlayer conductive pole 401 is exposed.
Step s800; See also Fig. 1 h; At first at the naked copper face of copper-loaded plate 101, promptly relative with conducting wire layer another side attaches one deck second anti-plate diaphragm 801, makes the second seed copper layer 801 through heavy copper (PTH) of level or sputtering technology (SPUTTER); The thickness of the second seed copper layer 801 is 0.8~1.4 μ m, preferred 0.9~1.2 μ m.Then, make one deck through electroplating technology on the surface of the second seed copper layer 801 and increase thick copper layer 802.Increase also can the employing level heavy copper of thick copper layer 802 or sputtering technology and make, but the cost of electroplating technology is lower.In the actual fabrication process, preferably the thickness with the first seed copper layer 301 is identical with the gross thickness that increases thick copper layer 802 for the second seed copper layer 801.
Step s900 sees also Fig. 1 i, makes the second tin protective layer 901 on the surface that increases thick copper layer 802 through the method for chemical deposition; The thickness of the second tin protective layer 901 is 0.5~1.4 μ m; Preferred 0.8~1.2 μ m more preferably is that the thickness of the second tin protective layer 901 equals the thickness of the first tin protective layer 201; Like this, can adopt identical technological parameter simultaneously the first tin protective layer 201 and the second tin protective layer 901 to be removed.The concrete technological parameter of making the second tin protective layer 901 is identical with the technological parameter of the making first tin protective layer 201 among the step s200, repeats no more here.
Step s1000 sees also Fig. 1 j, and the second anti-plate diaphragm 801 is removed, and utilizes alkaline etching liquid that copper support plate 101 is etched away again.See also Fig. 1 k, the first tin protective layer 201 and the second tin protective layer 901 are removed with moving back tin liquid medicine, thus the making of completion initial layers central layer.Certainly, present embodiment also can adopt the mode of ion beam milling that the first tin protective layer 201 and the second tin protective layer 901 are removed.The etch copper support plate 101 and the method for moving back tin all are to adopt method of the prior art in this step.
Need to prove that figure transfer, electroplating technology, brown processing, prepreg lamination mentioned in the present embodiment joined basis, lamination treatment, nog plate is handled and the method for removal dry film all can adopt present common technology to implement.After step s200 makes the first tin protective layer and/or after step s900 makes the second tin protective layer, detect the thin hole index of the first tin protective layer and/or the second tin protective layer respectively; Defective workmanship that prevents in making the first tin protective layer and/or the second tin protective layer process, possibly to exist or operate miss and produce thin hole defect, thus the rate of finished products of initial layers central layer improved.
The foregoing description is made the method for initial layers central layer; Adopt the tin layer to protect initial line layer,, can avoid dredging the hole problem because the tin layer is dense; And in the process of etch copper support plate; Thin tin layer can be protected initial line layer well, thereby avoids the gap problem of initial line layer, and then can improve the rate of finished products of initial layers central layer.And, owing to only need thin tin protective layer can protect initial line layer, therefore, can reduce the cost of making the tin protective layer, and, can correspondingly reduce the cost of removing the tin protective layer, thereby reduce the cost of manufacture of initial layers central layer.
Need to prove that present embodiment first protective layer and second protective layer are the tin protective layer, in actual production process,, belong to protection scope of the present invention equally if only be that first protective layer or second protective layer adopt the tin protective layer.
The method that various embodiments of the present invention provide can be used for the high density PCB base plate for packaging manufacturing of seedless Layer increasing method, for example is used for the seedless making that increases the initial sandwich layer of layer package substrate (or initial layers central layer) protective layer.
It is understandable that above execution mode only is the illustrative embodiments that adopts for principle of the present invention is described, yet the present invention is not limited thereto.For the one of ordinary skilled in the art, under the situation that does not break away from spirit of the present invention and essence, can make various modification and improvement, these modification also are regarded as protection scope of the present invention with improving.

Claims (10)

1. method of making the initial layers central layer comprises:
On support plate, make first protective layer;
On said first protective layer, make first Seed Layer, initial line layer, interlayer conductive pole, insulating barrier and second Seed Layer;
On said second Seed Layer, make second protective layer;
Remove said support plate;
Remove said first protective layer and said second protective layer;
It is characterized in that at least a protective layer in said first protective layer and said second protective layer is the tin protective layer.
2. method according to claim 1 is characterized in that, said tin protective layer adopts chemical deposition or electro-plating method to make.
3. method according to claim 2 is characterized in that, the step that adopts chemical deposition to make said tin protective layer comprises:
Adopt degreaser to said support plate oil removing;
For the first time wash said support plate, preferably wash with deionized water;
The said support plate of little erosion;
For the second time wash said support plate, preferably wash with deionized water;
At said support plate surface preimpregnation tin;
The heavy tin of chemistry.
4. method according to claim 3 is characterized in that,
Na is adopted in said little erosion 2SO 4And H 2SO 4Solution, the time is 60~85msec, preferred 60~80msec is more preferably 65~70msec; And/or
Said preimpregnation tin at room temperature carries out, and the duration is 1~2min, preferred 2min; And/or
The heavy tin of said chemistry is at 40~80 ℃, preferred 45~70 ℃, is more preferably under 50~65 ℃ the temperature and carries out; And/or
The time of the heavy tin of said chemistry is 10~25min, preferred 15~20min.
5. according to each described method in the aforementioned claim, it is characterized in that the thickness of said tin protective layer is 0.5~1.4 μ m, preferred 0.8~1.2 μ m.
6. according to each described method in the aforementioned claim, it is characterized in that, adopt etching mode to remove said first and second protective layers.
7. method according to claim 6 is characterized in that, adopts chemical etching or ion beam milling mode to remove said first and second protective layers.
8. according to each described method in the aforementioned claim, it is characterized in that said first protective layer is identical with the thickness of said second protective layer.
9. according to each described method in the aforementioned claim, it is characterized in that said first Seed Layer and said second Seed Layer adopt chemical deposition or sputter mode to make.
10. according to each described method in the aforementioned claim, it is characterized in that, after making said first protective layer and/or after making said second protective layer, detect the thin hole index of said first protective layer and/or said second protective layer.
CN201010586533.4A 2010-12-09 2010-12-09 Method for manufacturing initial layer core veneer Expired - Fee Related CN102548216B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103826390A (en) * 2014-02-24 2014-05-28 广州兴森快捷电路科技有限公司 Thick copper printed circuit board and manufacturing method thereof
CN106028664A (en) * 2016-08-01 2016-10-12 安徽贝莱电子科技有限公司 Manufacturing process of radar built-in microwave circuit board
CN107068577A (en) * 2017-01-23 2017-08-18 深圳市环基实业有限公司 A kind of new type integrated circuit packaging technology

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101241861A (en) * 2006-06-01 2008-08-13 Amitec多层互连技术有限公司 Novel multilayered coreless support structure and their fabrication method
CN101496227A (en) * 2005-10-11 2009-07-29 Amitec多层互连技术有限公司 Novel integrated circuit support structures and the fabrication thereof
CN101525744A (en) * 2009-04-27 2009-09-09 深圳市成功化工有限公司 Superficial treatment method of printed wiring board
CN101705482A (en) * 2009-11-19 2010-05-12 广州电器科学研究院 Alkyl sulfonic acid chemical tinning solution and chemical tinning solution based tinning process

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101496227A (en) * 2005-10-11 2009-07-29 Amitec多层互连技术有限公司 Novel integrated circuit support structures and the fabrication thereof
CN101241861A (en) * 2006-06-01 2008-08-13 Amitec多层互连技术有限公司 Novel multilayered coreless support structure and their fabrication method
CN101525744A (en) * 2009-04-27 2009-09-09 深圳市成功化工有限公司 Superficial treatment method of printed wiring board
CN101705482A (en) * 2009-11-19 2010-05-12 广州电器科学研究院 Alkyl sulfonic acid chemical tinning solution and chemical tinning solution based tinning process

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
苏章泗: "化学沉锡工艺初探", 《印制电路信息》 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103826390A (en) * 2014-02-24 2014-05-28 广州兴森快捷电路科技有限公司 Thick copper printed circuit board and manufacturing method thereof
CN106028664A (en) * 2016-08-01 2016-10-12 安徽贝莱电子科技有限公司 Manufacturing process of radar built-in microwave circuit board
CN107068577A (en) * 2017-01-23 2017-08-18 深圳市环基实业有限公司 A kind of new type integrated circuit packaging technology
CN107068577B (en) * 2017-01-23 2020-01-17 深圳市环基实业有限公司 Integrated circuit packaging process

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Granted publication date: 20150325