CN102487082A - Horizontal-groove metal-oxide semiconductor device - Google Patents
Horizontal-groove metal-oxide semiconductor device Download PDFInfo
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- CN102487082A CN102487082A CN201010570319XA CN201010570319A CN102487082A CN 102487082 A CN102487082 A CN 102487082A CN 201010570319X A CN201010570319X A CN 201010570319XA CN 201010570319 A CN201010570319 A CN 201010570319A CN 102487082 A CN102487082 A CN 102487082A
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- oxide semiconductor
- semiconductor device
- drain electrode
- drift region
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Abstract
The invention discloses a horizontal-groove metal-oxide semiconductor device, comprising a source electrode and a drain electrode, wherein a drift region of the drain electrode is longitudinal, the two sides of the drift region of the drain electrode are provided with field oxidation layers, and an N+ layer is formed below the drift region of the drain electrode. According to the metal-oxide semiconductor device with a deep-groove structure, the horizontal drift region is changed to be towards the longitudinal direction, the unit size can be effectively reduced, and the on resistance of the device is reduced; due to the adoption of a deep contact hole, the size of the device can be further reduced and the series resistance of the device is reduced; and finally, the on resistance of the device can be reduced by 25% and simultaneously the kirk effect can be effectively restrained.
Description
Technical field
The present invention relates to a kind of integrated circuit structure, be specifically related to a kind of lateral trench metal oxide semiconductor device.
Background technology
Transverse diffusion metal oxide semiconductor device is the Primary Component in the electric power management circuit, is widely used in portable equipment, fields such as computer peripheral circuit and automotive electronics.As shown in Figure 1, the ON resistance of LDMOS receives the lateral drift region length restriction at present, and cell size is near the limit.Metal-oxide semiconductor (MOS) with deep groove structure is vertical by laterally becoming with the drift region, can effectively reduce cell size, reduces device on resistance.But present drain region width is generally about 1 micron, and the series resistance of drain electrode below than limitations the minimizing of device on resistance.Drain region active area reduced width also can cause base broadening (Kirk) effect to increase simultaneously.
Summary of the invention
Technical problem to be solved by this invention provides a kind of lateral trench metal oxide semiconductor device, and it can effectively reduce cell size, reduces device on resistance.
In order to solve above technical problem, the invention provides a kind of lateral trench metal oxide semiconductor device; Comprise source electrode and drain electrode, drain-drift region is that vertically its both sides are field oxide, and the below is the N+ layer.
Beneficial effect of the present invention is: the metal-oxide semiconductor (MOS) with deep groove structure is vertical by laterally becoming with the drift region, can effectively reduce cell size, reduces device on resistance.Adopted dark contact hole structure, further reduction of device size and reduce the device series resistance.Finally can the ON resistance of device be reduced 25%, can effectively suppress the kirk effect simultaneously.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is done further explain.
Fig. 1 is existing lateral trench metal oxide semiconductor device sketch map;
Fig. 2 is the described lateral trench metal oxide semiconductor device of an embodiment of the invention sketch map;
Fig. 3 is the sketch map of the said adding n type buried layer of the embodiment of the invention.
Embodiment
As shown in Figure 2, the described structure of the embodiment of the invention is a kind of metal-oxide semiconductor (MOS) with deep groove structure, comprises source electrode and drain electrode; Drain-drift region is that vertically its both sides are field oxide, and the below is the N+ layer; This structure can effectively reduce cell size, reduces device on resistance.Adopted dark contact hole structure among the present invention, further reduction of device size and reduce the device series resistance.Finally can the ON resistance of device be reduced 25%.
As shown in Figure 3, the present invention can also add the puncture voltage that n type buried layer can improve the junction depth raising device in drain region below drain electrode.Do not increase simultaneously device size.
The present invention is not limited to the execution mode that preceding text are discussed.More than the description of embodiment is intended in order to describe and explain the technical scheme that the present invention relates to.Based on the conspicuous conversion of the present invention enlightenment or substitute and also should be considered to fall into protection scope of the present invention.Above embodiment is used for disclosing best implementation method of the present invention, so that those of ordinary skill in the art can use numerous embodiments of the present invention and multiple alternative reaches the object of the invention.
Claims (2)
1. lateral trench metal oxide semiconductor device; Comprise source electrode and drain electrode, it is characterized in that drain-drift region is that vertically its both sides are field oxide, the below is the N+ layer.
2. lateral trench metal oxide semiconductor device as claimed in claim 1 is characterized in that, below drain electrode, n type buried layer is arranged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010570319XA CN102487082A (en) | 2010-12-02 | 2010-12-02 | Horizontal-groove metal-oxide semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010570319XA CN102487082A (en) | 2010-12-02 | 2010-12-02 | Horizontal-groove metal-oxide semiconductor device |
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| CN102487082A true CN102487082A (en) | 2012-06-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201010570319XA Pending CN102487082A (en) | 2010-12-02 | 2010-12-02 | Horizontal-groove metal-oxide semiconductor device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103117309A (en) * | 2013-02-22 | 2013-05-22 | 南京邮电大学 | Horizontal power device structure and preparation method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050242392A1 (en) * | 2004-04-30 | 2005-11-03 | Siliconix Incorporated | Super trench MOSFET including buried source electrode and method of fabricating the same |
| CN101529570A (en) * | 2006-08-28 | 2009-09-09 | 先进模拟科技公司 | Lateral trench MOSFET with direct trench polysilicon contact and method of forming the same |
| CN101542697A (en) * | 2006-05-31 | 2009-09-23 | 先进模拟科技公司 | High-voltage bipolar-CMOS-DMOS integrated circuit devices and modular methods of forming the same |
| CN101714577A (en) * | 2008-10-01 | 2010-05-26 | 东部高科股份有限公司 | Lateral DMOS transistor and method of fabricating thereof |
| CN101840935A (en) * | 2010-05-17 | 2010-09-22 | 电子科技大学 | SOI (Silicon-on-insulator) MOSFET lateral (metal-oxide-semiconductor field effect transistor) device |
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2010
- 2010-12-02 CN CN201010570319XA patent/CN102487082A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050242392A1 (en) * | 2004-04-30 | 2005-11-03 | Siliconix Incorporated | Super trench MOSFET including buried source electrode and method of fabricating the same |
| CN101542697A (en) * | 2006-05-31 | 2009-09-23 | 先进模拟科技公司 | High-voltage bipolar-CMOS-DMOS integrated circuit devices and modular methods of forming the same |
| CN101529570A (en) * | 2006-08-28 | 2009-09-09 | 先进模拟科技公司 | Lateral trench MOSFET with direct trench polysilicon contact and method of forming the same |
| CN101714577A (en) * | 2008-10-01 | 2010-05-26 | 东部高科股份有限公司 | Lateral DMOS transistor and method of fabricating thereof |
| CN101840935A (en) * | 2010-05-17 | 2010-09-22 | 电子科技大学 | SOI (Silicon-on-insulator) MOSFET lateral (metal-oxide-semiconductor field effect transistor) device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103117309A (en) * | 2013-02-22 | 2013-05-22 | 南京邮电大学 | Horizontal power device structure and preparation method thereof |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140103 |
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Effective date of registration: 20140103 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
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Application publication date: 20120606 |