CN102487011B - Low voltage inverted well implantation method of laterally diffused metal oxide semiconductor device - Google Patents
Low voltage inverted well implantation method of laterally diffused metal oxide semiconductor device Download PDFInfo
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- CN102487011B CN102487011B CN201010571218.4A CN201010571218A CN102487011B CN 102487011 B CN102487011 B CN 102487011B CN 201010571218 A CN201010571218 A CN 201010571218A CN 102487011 B CN102487011 B CN 102487011B
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Abstract
The invention discloses a low voltage inverted well implantation method of a laterally diffused metal oxide semiconductor (LDMOS) device. The method comprises the following steps that: (1), a cushion film and a hard film are successively deposited on a silicon chip surface; (2), a photoresist is coated on the hard film surface and exposure is carried out as well as a graph of a low voltage inverted well injection region is transferred on the photoresist layer; (3), dry etching is employed to etch the hard film and the etching is not stopped until the cushion film is reached; (4), the photoresist is stripped and the graph of the low voltage inverted well injection region is transferred on the hard film layer; (5), the hard film is used as a barrier layer to carry out multistep ion implantation on a low voltage inverted well; and (6), a wet method is employed to enable the hard film and the cushion film to be stripped, so that the ion implantation process of the whole low voltage inverted well is completed. According to the method provided in the invention, the hard film is used as the barrier layer for implantation of the low voltage inverted well, so that a width difference of high and low energy ion implantation can be eliminated and drift of a characteristic parameter of an LDMOS device can be avoided.
Description
Technical field
The invention belongs to semiconductor integrated circuit manufacture method, be specifically related to the manufacture method of a kind of lateral diffusion metal-oxygen-half-court effect device (LDMOS), especially a kind of low pressure retrograde well method for implanting of lateral diffusion metal-oxygen-half-court effect device.
Background technology
In the advanced technologies manufacture process of power or high-voltage semi-conductor integrated circuit (IC) chip, low pressure retrograde well is injected tagma (body) injection that is usually used as high pressure lateral diffusion metal-oxygen-half-court effect device (LDMOS), and the profile of high-voltage LDMOS as shown in Figure 1.Retrograde well is injected and is generally comprised high-octane trap injection and low-energy cut-in voltage adjusting injection.Generally, Implantation be take photoresist as barrier layer, thereby there is the problem of so-called " shadow effect ": because photoresist is soft, cover silicon chip surface and form certain gradient shape, the edge contacting with silicon chip at photoresist, high-octane trap injects and low-energy cut-in voltage regulates injection variant to the penetration capacity of photoresist, the penetration capacity of high energy ion implantation is stronger, the wider width of injecting, and the penetration capacity that low energy is injected a little less than, the width of injection is also narrower.When so retrograde well is injected, there is high low energy injection zone difference (as shown in Figure 2 in high-voltage LDMOS active area, retrograde well low energy injection region 22 is variant with the width in retrograde well high energy ion implantation district 23), i.e. so-called " shadow effect ", therefore the repeatedly Implantation of same injection version graph is had to difference than expection on dosage, cause the drift of LDMOS component characteristic parameter (cut-in voltage), see Fig. 2.
Summary of the invention
The technical problem to be solved in the present invention is to provide the low pressure retrograde well method for implanting of a kind of lateral diffusion metal-oxygen-half-court effect device, it usings the barrier layer that hard films is injected as low pressure retrograde well, so-called to eliminate " shadow effect ", avoids the drift of LDMOS component characteristic parameter.
For solving the problems of the technologies described above, the invention provides the low pressure retrograde well method for implanting of a kind of lateral diffusion metal-oxygen-half-court effect device, comprise the steps:
(1) at silicon chip surface, deposit successively bed course film and hard films;
(2) in hard films surface resist coating, exposure, the figure of low pressure retrograde well injection zone is transferred on photoresist layer;
(3) adopt dry etching to carve and open hard films, be parked on bed course film;
(4) peel off photoresist, low pressure retrograde well injection zone figure is transferred on hard film layer;
(5) take hard films as barrier layer, carry out the multistep Implantation of low pressure retrograde well;
(6) by wet method, peel off hard films and bed course film, complete the ion implantation process of whole low pressure retrograde well.
In step (1), described bed course film is the silica that adopts thermal oxidation process to form, and its thickness is at 100～300 dusts.
In step (1), described hard films is silica or the silicon nitride that adopts chemical gaseous phase depositing process to form, the kind that its thickness injects depending on step (5) intermediate ion and the kind of energy and hard films, independent variable using these three amounts as computer device simulation softward, by analog computation, draw the range that ion can penetrate in hard films, select to be greater than the hard films thickness of this numerical value.
In step (2), the thickness of described photoresist is 10000～20000 dusts.
In step (3), described dry etching is carved and is opened hard films and be parked on bed course film, requires the speed of its etching hard films and bed course film to have high selectivity, preferably the high selectivity of 10-50 left and right.
In step (3), described employing dry etching is carved and is opened hard films, and the side pattern of itself and bed course film Surface Contact should be the right angle that approaches 90 °.
In step (3), described employing dry etching is carved and is opened hard films, if the side pattern of itself and bed course film Surface Contact can not guarantee the right angle for approaching 90 °, between the multistep Implantation of step (5), increase sidewall that a step isotropic etching removes a part of hard films to eliminate the width difference of high low energy Implantation.
In step (5), first described multistep Implantation carries out retrograde well high energy ion implantation district and injects, and then carries out retrograde well low energy injection region and injects.
In step (5), the ion implantation energy >500keV that described retrograde well high energy ion implantation district is injected; The ion implantation energy <100keV that described retrograde well low energy injection region is injected.
In step (5), after retrograde well high energy ion implantation district is injected, retrograde well low energy injection region increases sidewall that a step isotropic etching removes a part of hard films to eliminate the width difference of high low energy Implantation before injecting.
In step (6), can adopt phosphoric acid solution wet method to peel off hard films and bed course film.
Compared to the prior art, the present invention has following beneficial effect: owing to take hard films as barrier layer, its side etch topography contacting with silicon chip bed course film is into the almost rectangular shaped of 90 °, there is no gentle slope shape (even if there is certain gentle slope, also can remove a part of sidewall of mask firmly by isotropic etching improves), so the width difference of high low energy Implantation is eliminated, avoided the drift of LDMOS component characteristic parameter, improved the performance of device.
Accompanying drawing explanation
Fig. 1 is traditional high-voltage LDMOS profile; Wherein, the 11st, silicon substrate; The 12nd, deep trap injection region; The 13rd, drift region; The 14th, low pressure trap; The 15th, a silica; The 16th, tagma (Bulk); The 17th, source region (Source); The 18th, polysilicon gate; The 19th, drain region (Drain);
Fig. 2 be traditional high-voltage LDMOS when retrograde well is injected, there is high low energy injection zone difference in high-voltage LDMOS active area, thereby dose ratio expection has difference, thereby cause the schematic diagram of device cut-in voltage drift; Wherein, the 11st, silicon substrate; The 12nd, deep trap injection region; The 13rd, drift region; The 15th, a silica; The 20th, photoresist; The 21st, bed course film; The 22nd, retrograde well low energy injection region; The 23rd, retrograde well high energy ion implantation district;
Fig. 3 is the schematic flow sheet of the inventive method; Fig. 3 A deposits bed course film, hard films in the inventive method, gluing in hard films carries out retrograde well and injects the schematic diagram after window lithography completes; Fig. 3 B is that in the inventive method, dry etching is parked on bed course film, and the regional graphics that needs are injected are transferred in hard films, the schematic diagram after peelling off photoresist and completing; Fig. 3 C is that in the inventive method, high energy trap injects and low energy cut-in voltage regulates the schematic diagram (wherein the width of high energy, low energy ion injection no longer includes difference) after having injected; Fig. 3 D is that in the inventive method, high energy trap injects and low energy cut-in voltage regulates schematic diagram after having injected (inject and low energy cut-in voltage regulates and increases by a step isotropic etching between injecting and remove the part sidewall of mask firmly at high energy trap, wherein low energy cut-in voltage adjusting injection zone is even greater than high energy trap injection region); Fig. 3 E peels off hard films and bed course film by wet method in the inventive method, the schematic diagram after the Implantation of low pressure retrograde well completes; Wherein, 1 is silicon substrate, and 2 is deep trap injection region, and 3 is drift region, and 4 is bed course film, and 5 is a silica, and 6 is hard films, and 7 is photoresist, and 8 is retrograde well high energy ion implantation district, and 9 is retrograde well low energy injection region.
Embodiment
Below in conjunction with drawings and Examples, the present invention is further detailed explanation.
The present invention, carrying out low pressure retrograde well while injecting, first forms certain thickness hard films (for example silica, silicon nitride), the hard films figure that photoetching subsequently+etching forms, and usining this hard films injects as barrier layer.Contacting and being into the almost rectangular shaped of 90 ° with silicon chip bed course film due to hard films, there is no gentle slope shape, so do not exist the width difference of high low energy Implantation (even if there is certain gentle slope, also can remove a part of sidewall of mask firmly by isotropic etching improves), therefore can be because of the difference of the ion penetration ability of different-energy, cause the repeatedly Implantation of same injection version graph is had to difference than expection on dosage, thereby avoided the drift of LDMOS component characteristic parameter.
The inventive method adopts hard films to carry out the injection of low pressure retrograde well as low pressure retrograde well implant blocking layer, and its concrete steps comprise as follows:
1. at the silicon chip surface that need to carry out the injection of low pressure retrograde well, deposit successively bed course film 4 and hard films 6.Bed course film 4 is generally the silica that adopts thermal oxidation process to form, and its thickness is right at 100～300 Izods.The general chemical gaseous phase depositing process that adopts of hard films 6 forms, hard films 6 can be silica or silicon nitride (in this embodiment, hard films 6 adopts silicon nitride), its thickness is depending on the kind of kind, energy and the hard films of Implantation: the independent variable using these three amounts as computer device simulation softward, by analog computation, can draw the range (dependent variable) that ion can penetrate in hard films, select to be greater than the hard films thickness of this numerical value.
2. photoresist 7, the exposure of on hard films 6 surfaces, coating approximately 10000～20000 dusts, the figure of low pressure retrograde well injection zone is transferred on photoresist layer 7, sees Fig. 3 A.
3. dry etching is carved and to be opened hard films 6, is parked on bed course film 4, and the side pattern of itself and bed course film Surface Contact should be the right angle that approaches 90 °.Dry etching is carved and to be opened hard films 6 and be parked on bed course film 4, requires its speed of carving hard films 6 and bed course film 4 to have high selectivity, and representative value is 10-50 left and right.Dry etching is carved and is opened hard films 6, the side pattern of itself and bed course film Surface Contact should be the right angle that approaches 90 °, usingd in this barrier layer as Implantation in assurance, can be because of the difference of the ion penetration ability of different-energy, cause the repeatedly Implantation of same injection version graph is had to difference than expection on dosage, thereby avoided the drift of LDMOS component characteristic parameter.
4. peel off photoresist, the figure of low pressure retrograde well injection zone is transferred on hard film layer 6, sees Fig. 3 B.
5. the hard films 6 of take is carried out the repeatedly Implantation of low pressure retrograde well as barrier layer, first carry out high energy trap (being retrograde well high energy ion implantation district 8) and inject (the ion implantation energy >500keV that retrograde well high energy ion implantation district 8 is injected conventionally), after carry out low energy cut-in voltage adjusting (being retrograde well low energy injection region 9) and inject (the ion implantation energy <100keV that retrograde well low energy injection region 9 is injected conventionally), the width that high energy, low energy ion inject no longer includes difference, sees Fig. 3 C; If can not guarantee, the etch topography of hard films 6 approaches the right angle of 90 °, also can be after energetic ion injects, low energy ion increases the sidewall that a step isotropic etching removes a part of hard films 6 and strengthens this beneficial effect (as shown in Figure 3 D before injecting, retrograde well low energy injection region 9 is even greater than retrograde well high energy ion implantation district 8), its required sidewall thickness removing should guarantee can not violate the physical dimension rule of device design.
6. by wet method, peel off hard films 6 and bed course film 4 (for the silicon nitride being commonly used to as hard films, can adopt phosphoric acid solution), complete the ion implantation process of whole low pressure retrograde well, see Fig. 3 E.As shown in Fig. 3 E, adopt the final low pressure retrograde well forming of the inventive method, its retrograde well low energy injection region 9 no longer includes difference with retrograde well high energy ion implantation district 8, therefore can not cause because of the difference of the ion penetration ability of different-energy the repeatedly Implantation that same is injected to version graph than expection, to have difference on dosage, thereby avoid the drift of LDMOS component characteristic parameter.
Claims (9)
1. a low pressure retrograde well method for implanting for lateral diffusion metal-oxygen-half-court effect device, is characterized in that, comprises the steps:
(1) at silicon chip surface, deposit successively bed course film and hard films; In step (1), described hard films is silica or the silicon nitride that adopts chemical gaseous phase depositing process to form, the kind that its thickness injects depending on step (5) intermediate ion and the kind of energy and hard films, independent variable using these three amounts as computer device simulation softward, by analog computation, draw the range that ion can penetrate in hard films, select to be greater than the hard films thickness of this numerical value;
(2) in hard films surface resist coating, exposure, the figure of low pressure retrograde well injection zone is transferred on photoresist layer;
(3) adopt dry etching to carve and open hard films, be parked on bed course film;
(4) peel off photoresist, low pressure retrograde well injection zone figure is transferred on hard film layer;
(5) take hard films as barrier layer, carry out the multistep Implantation of low pressure retrograde well;
(6) by wet method, peel off hard films and bed course film, complete the ion implantation process of whole low pressure retrograde well.
2. the low pressure retrograde well method for implanting of lateral diffusion metal-oxygen according to claim 1-half-court effect device, is characterized in that, in step (1), described bed course film is the silica that adopts thermal oxidation process to form, and its thickness is at 100～300 dusts.
3. the low pressure retrograde well method for implanting of lateral diffusion metal-oxygen according to claim 1-half-court effect device, is characterized in that, in step (2), the thickness of described photoresist is 10000～20000 dusts.
4. the low pressure retrograde well method for implanting of lateral diffusion metal-oxygen according to claim 1-half-court effect device, it is characterized in that, in step (3), described dry etching is carved and is opened hard films and be parked on bed course film, requires the speed of its etching hard films and bed course film to have high selectivity.
5. the low pressure retrograde well method for implanting of lateral diffusion metal-oxygen according to claim 4-half-court effect device, is characterized in that, in step (3), the speed of described etching hard films and bed course film has the high selectivity of 10-50.
6. the low pressure retrograde well method for implanting of lateral diffusion metal-oxygen according to claim 1-half-court effect device, it is characterized in that, in step (3), described employing dry etching is carved and is opened hard films, and the side pattern of itself and bed course film Surface Contact should be the right angle of 90 °.
7. the low pressure retrograde well method for implanting of lateral diffusion metal-oxygen according to claim 1-half-court effect device, it is characterized in that, in step (5), first described multistep Implantation carries out retrograde well high energy ion implantation district and injects, and then carries out retrograde well low energy injection region and injects; In step (3), described employing dry etching is carved and is opened hard films, if the side pattern of itself and bed course film Surface Contact can not guarantee to be the right angle of 90 °, after the retrograde well high energy ion implantation district of step (5) is injected, retrograde well low energy injection region increases sidewall that a step isotropic etching removes a part of hard films to eliminate the width difference of high low energy Implantation before injecting.
8. the low pressure retrograde well method for implanting of lateral diffusion metal-oxygen according to claim 7-half-court effect device, is characterized in that, in step (5), and the ion implantation energy >500keV that described retrograde well high energy ion implantation district is injected; The ion implantation energy <100keV that described retrograde well low energy injection region is injected.
9. the low pressure retrograde well method for implanting of lateral diffusion metal-oxygen according to claim 1-half-court effect device, is characterized in that, in step (6), adopts phosphoric acid solution wet method to peel off hard films and bed course film.
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| CN104576374A (en) * | 2013-10-12 | 2015-04-29 | 中芯国际集成电路制造(上海)有限公司 | LDMOS (laterally diffused metal oxide semiconductor) and manufacture method thereof |
| US9780002B1 (en) * | 2016-06-06 | 2017-10-03 | Globalfoundries Inc. | Threshold voltage and well implantation method for semiconductor devices |
| CN114664660A (en) * | 2020-12-23 | 2022-06-24 | 无锡华润上华科技有限公司 | Semiconductor device and method for manufacturing the same |
| CN116314288B (en) * | 2023-05-17 | 2023-08-29 | 粤芯半导体技术股份有限公司 | Preparation method and structure of LDMOS device |
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| US5654213A (en) * | 1995-10-03 | 1997-08-05 | Integrated Device Technology, Inc. | Method for fabricating a CMOS device |
| CN101465378A (en) * | 2007-12-20 | 2009-06-24 | 夏普株式会社 | Semiconductor device and its manufacturing method |
| CN101740385A (en) * | 2008-11-24 | 2010-06-16 | 上海华虹Nec电子有限公司 | Method for forming channel in LDMOS (Laterally Diffused Metal Oxide Semiconductor) transistor |
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| JP2003248293A (en) * | 2002-02-26 | 2003-09-05 | Sony Corp | Method of forming mask |
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| US5654213A (en) * | 1995-10-03 | 1997-08-05 | Integrated Device Technology, Inc. | Method for fabricating a CMOS device |
| CN101465378A (en) * | 2007-12-20 | 2009-06-24 | 夏普株式会社 | Semiconductor device and its manufacturing method |
| CN101740385A (en) * | 2008-11-24 | 2010-06-16 | 上海华虹Nec电子有限公司 | Method for forming channel in LDMOS (Laterally Diffused Metal Oxide Semiconductor) transistor |
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