CN104851803A

CN104851803A - Transverse diffused metal oxide semiconductor device manufacture method

Info

Publication number: CN104851803A
Application number: CN201410053355.7A
Authority: CN
Inventors: 韩广涛
Original assignee: Wuxi CSMC Semiconductor Co Ltd
Current assignee: CSMC Technologies Corp
Priority date: 2014-02-17
Filing date: 2014-02-17
Publication date: 2015-08-19

Abstract

The invention relates to a transverse diffused metal oxide semiconductor device manufacture method comprising the following steps: depositing polysilicon; carrying out lithography and a first time polysilicon gate etching, defining one end, far away from a channel region, of a polysilicon grid electrode, and removing the photoresist; carrying out lithography and a second time polysilicon gate etching, and etching the other end of the polysilicon grid electrode so as to form the complete polysilicon grid electrode; using resting photoresist in the second time polysilicon etching as a mask layer, and injecting ion so as to form the channel region. The channel region is formed without too many extra diffusion heat steps, and can be formed completely through ion implantation without any diffusion step; the poly can serve as a low voltage device grid electrode; in addition, heat steps are less (even none), so channel region injection impurity transverse expansion is less, and drift region concentration cannot be reduced, and Rdson is smaller.

Description

The manufacture method of transverse diffusion metal oxide semiconductor device

Technical field

The present invention relates to semiconductor device, particularly relate to a kind of manufacture method of LDMOS device.

Background technology

Along with the application in integrated circuits of Laterally Diffused Metal Oxide Semiconductor (LDMOS) device is more and more extensive, higher for OFF state breakdown voltage (off-BV), the demand of the LDMOS that conducting resistance (Rdson) is less is more and more urgent.

A kind of method reducing conducting resistance shortens channel length.For NLDMOS, a kind of method of traditional acquisition short channel is after polysilicon (POLY) etching, utilizes polysilicon autoregistration to inject P-body, then by certain thermal process, makes the horizontal expansion of P-body form channel region.The method can make the channel region concentration near source electrode the highest, thus while obtaining shorter channel length, keeps higher OFF state breakdown voltage.As depicted in figs. 1 and 2, the reticle first using POLY to etch in Fig. 1, obtains photoresist 131 as shown in Figure 1 to its forming process after photoetching, and etching formation gate and POLY takes a part 130, removes photoresist afterwards.Re-use the reticle that P-body injects in Fig. 2, obtain photoresist 132 as shown in Figure 1 after photoetching, expose P-body injection region, and utilize polysilicon autoregistration to inject P-body.

But this method needs to experience longer thermal process after P-body injects, and could form channel region.And being limited to POLY thickness, Implantation Energy can not be too high, is difficult to the channel region forming Len req.This just makes this layer of POLY as the grid of LDMOS, and can not, as the grid of low-voltage device, can only be not suitable for experiencing longer thermal process because the Vt of low-voltage device injects.In addition, the thermal process that P-body experience is longer, the p type impurity after its horizontal expansion also can make the N-type impurity concentration of drift region reduce, and Rdson raises.

Summary of the invention

Based on this, be necessary the manufacture method that a kind of transverse diffusion metal oxide semiconductor device is provided, to obtaining lower conducting resistance.

A manufacture method for transverse diffusion metal oxide semiconductor device, comprises the following steps: depositing polysilicon; Carry out photoetching and first time polysilicon gate etching, define polysilicon gate one end away from channel region, and remove photoresist; Carry out photoetching and second time polysilicon gate etching, etch to form complete polysilicon gate to the other end of described polysilicon gate; With photoresist remaining in second time etching polysilicon for masking layer, carry out ion implantation and form channel region.

Wherein in an embodiment, described transverse diffusion metal oxide semiconductor device comprises Chang Yang district, comprise before the step of described depositing polysilicon and form the step in Chang Yang district, described in define polysilicon gate away from the step of one end of channel region be define described polysilicon gate take a part.

Wherein in an embodiment, described transverse diffusion metal oxide semiconductor device comprises fleet plough groove isolation structure, comprise before the step of described depositing polysilicon and form the step of fleet plough groove isolation structure, described in define polysilicon gate away from the step of one end of channel region be define described polysilicon gate to ride over one end on described fleet plough groove isolation structure.

Wherein in an embodiment, in the drift region of described transverse diffusion metal oxide semiconductor device, place and fleet plough groove isolation structure are not set.

Wherein in an embodiment, described with photoresist remaining in second time etching polysilicon for masking layer carry out ion implantation formed channel region step in, the energy of ion implantation is 50 kiloelectron-volts ~ 300 kiloelectron-volts.

Wherein in an embodiment, described transverse diffusion metal oxide semiconductor device is N channel laterally diffused metal oxide emiconductor device.

The manufacture method of above-mentioned transverse diffusion metal oxide semiconductor device, the formation of channel region does not need to experience and additionally too much pushes away trap thermal process, even can form channel region by ion implantation completely and not have extra to push away trap process.Therefore this POLY can simultaneously as the grid of low-voltage device.In addition, due to thermal process few (even not having), the horizontal expansion of impurity that channel region is injected is less, and therefore drift region concentration can not reduce, and Rdson is less.

Accompanying drawing explanation

Fig. 1 is the generalized section of device after a kind of method of traditional acquisition short channel uses the reticle of POLY etching to etch;

Fig. 2 is the schematic diagram of device after the reticle photoetching using P-body to inject on the basis of Fig. 1;

Fig. 3 is the schematic diagram of the manufacture method of transverse diffusion metal oxide semiconductor device in an embodiment;

Fig. 4 a-Fig. 4 d is the NLDMOS generalized section in the fabrication process adopting the manufacture method of transverse diffusion metal oxide semiconductor device of the present invention to manufacture.

Embodiment

For enabling object of the present invention, feature and advantage more become apparent, and are described in detail the specific embodiment of the present invention below in conjunction with accompanying drawing.

Fig. 3 is the schematic diagram of the manufacture method of transverse diffusion metal oxide semiconductor device in an embodiment, comprises the following steps:

S10, depositing polysilicon.

Please refer to Fig. 4 a, comprise substrate 210, Chang Yang district 220 and polysilicon layer 230.In the present embodiment, device is with place, and polysilicon layer 230 is covered in Chang Yang district 220.

S20, carry out photoetching and first time polysilicon gate etching.

Please refer to Fig. 4 b, etch reticle lithographic definition with POLY and go out the marginal position of polysilicon gate away from one end right side of polysilicon 232 (namely in Fig. 4 b) of channel region, carry out first time polysilicon gate etching afterwards, and remove photoresist 231.In the present embodiment, be etch polysilicon gate take a part, obtain polysilicon 232.The other end of polysilicon 232 left side of polysilicon 232 (in Fig. 4 b) then only etches a part, is etched into final shape again when all the other wait until second time polysilicon gate etching (step S30).Understandable, in order to ensure unnecessary polysilicon all to be etched away in step s 30, the left side of polysilicon 232 also should be etched to suitable position in this step, such as, be etched to a certain position above channel region.

S30, carries out photoetching and second time polysilicon gate etching.

With reference to Fig. 4 c, inject with P-body the injection window that reticle lithographic definition goes out P-body, then etch, form complete polysilicon gate 234.The polysilicon gate 234 obtained like this is concordant with the edge of photoresist 233.

S40, with photoresist remaining in second time etching polysilicon for masking layer, carries out ion implantation and forms channel region.

With photoresist 233 for masking layer, carry out ion implantation and form channel region.Because photoresist is intactly covered on polysilicon gate 234, higher Implantation Energy therefore can be utilized to carry out ion implantation, the channel length needed for formation.In the present embodiment, the Implantation Energy up to 50Kev ~ 300Kev can be adopted to inject.

Fig. 4 d is on the basis of Fig. 4 c structure, defines the substrate draw-out area of P+, the source electrode of N+, and in N-type drift region, form the NLDMOS after the drain electrode of N+ in P-body.

Transverse diffusion metal oxide semiconductor device in the present embodiment is the NLDMOS with place, but said method be equally applicable to be with shallow trench isolation from (STI) structure or the NLDMOS of field-free region, and corresponding PLDMOS.

The manufacture method of above-mentioned transverse diffusion metal oxide semiconductor device, the formation of channel region does not need to experience and additionally too much pushes away trap thermal process, even can form channel region by ion implantation completely and not have extra to push away trap process.Therefore this POLY can simultaneously as the grid of low-voltage device.In addition, due to thermal process few (even not having), impurity (P type) the horizontal expansion that channel region is injected is less, and therefore drift region (N-type) concentration can not reduce, and Rdson is less.Utilize the NLDMOS that the manufacture method of above-mentioned transverse diffusion metal oxide semiconductor device makes, its channel length is shorter, and while channel resistance reduces, overall size is less, makes total Rdson lower, can low 10% to 30% than the Rdson of traditional NLDMOS.

The above embodiment only have expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.

Claims

1. a manufacture method for transverse diffusion metal oxide semiconductor device, comprises the following steps:

Depositing polysilicon;

Carry out photoetching and first time polysilicon gate etching, define polysilicon gate one end away from channel region, and remove photoresist;

Carry out photoetching and second time polysilicon gate etching, etch to form complete polysilicon gate to the other end of described polysilicon gate;

With photoresist remaining in second time etching polysilicon for masking layer, carry out ion implantation and form channel region.

2. the manufacture method of transverse diffusion metal oxide semiconductor device according to claim 1, it is characterized in that, described transverse diffusion metal oxide semiconductor device comprises Chang Yang district, comprise before the step of described depositing polysilicon and form the step in Chang Yang district, described in define polysilicon gate away from the step of one end of channel region be define described polysilicon gate take a part.

3. the manufacture method of transverse diffusion metal oxide semiconductor device according to claim 1, it is characterized in that, described transverse diffusion metal oxide semiconductor device comprises fleet plough groove isolation structure, comprise before the step of described depositing polysilicon and form the step of fleet plough groove isolation structure, described in define polysilicon gate away from the step of one end of channel region be define described polysilicon gate to ride over one end on described fleet plough groove isolation structure.

4. the manufacture method of transverse diffusion metal oxide semiconductor device according to claim 1, is characterized in that, does not arrange place and fleet plough groove isolation structure in the drift region of described transverse diffusion metal oxide semiconductor device.

5. according to the manufacture method of the transverse diffusion metal oxide semiconductor device in claim 1-4 described in any one, it is characterized in that, described with photoresist remaining in second time etching polysilicon for masking layer carry out ion implantation formed channel region step in, the energy of ion implantation is 50 kiloelectron-volts ~ 300 kiloelectron-volts.

6. the manufacture method of transverse diffusion metal oxide semiconductor device according to claim 5, is characterized in that, described transverse diffusion metal oxide semiconductor device is N channel laterally diffused metal oxide emiconductor device.