The low pressure retrograde well method for implanting of lateral diffusion metal-oxygen-half-court effect device
Technical field
The invention belongs to the semiconductor integrated circuit manufacturing approach, be specifically related to the manufacturing approach of a kind of lateral diffusion metal-oxygen-half-court effect device (LDMOS), the low pressure retrograde well method for implanting of especially a kind of lateral diffusion metal-oxygen-half-court effect device.
Background technology
In the advanced technologies manufacture process of power or high-voltage semi-conductor IC chip, the low pressure retrograde well is injected the tagma (body) that usually is used as high pressure lateral diffusion metal-oxygen-half-court effect device (LDMOS) and is injected, and the profile of high-voltage LDMOS is as shown in Figure 1.Retrograde well is injected and is generally comprised high-octane trap injection and low-energy cut-in voltage adjusting injection.Generally, it is the barrier layer that ion injects with the photoresist, thereby the problem of so-called " shadow effect " is arranged: because photoresist is soft; Cover silicon chip surface and form certain gradient shape, at the edge that photoresist contacts with silicon chip, high-octane trap injects and the adjusting of low-energy cut-in voltage is injected variant to the penetration capacity of photoresist; The penetration capacity that high energy injects is stronger; The wider width of injecting, and the penetration capacity that low energy is injected a little less than, the width of injection is also narrower.When so retrograde well is injected; The high-voltage LDMOS active area exists high low energy injection zone difference (as shown in Figure 2; Retrograde well low energy injection region 22 is variant with the width of retrograde well high energy injection region 23), promptly so-called " shadow effect ", therefore the repeatedly ion of same injection version graph being infused on the dosage has difference than expection; Cause the drift of LDMOS component characteristic parameter (cut-in voltage), see Fig. 2.
Summary of the invention
The technical problem that the present invention will solve provides the low pressure retrograde well method for implanting of a kind of lateral diffusion metal-oxygen-half-court effect device; The barrier layer that it injects as the low pressure retrograde well with hard films; So-called to eliminate " shadow effect " avoided the drift of LDMOS component characteristic parameter.
For solving the problems of the technologies described above, the present invention provides the low pressure retrograde well method for implanting of a kind of lateral diffusion metal-oxygen-half-court effect device, comprises the steps:
(1) deposits bed course film and hard films successively at silicon chip surface;
(2) in hard films surfaces coated photoresist, exposure, the figure transfer of low pressure retrograde well injection zone is to photoresist layer;
(3) adopt dry etching to carve and open hard films, be parked on the bed course film;
(4) peel off photoresist, with low pressure retrograde well injection zone figure transfer to hard film layer;
(5) be the barrier layer with the hard films, the multistep ion that carries out the low pressure retrograde well injects;
(6) peel off hard films and bed course film with wet method, accomplish the ion implantation process of whole low pressure retrograde well.
In the step (1), said bed course film is the silica that adopts thermal oxidation process to form, and its thickness is at 100~300 dusts.
In the step (1); Said hard films is silica or the silicon nitride that adopts chemical gaseous phase depositing process to form; Its thickness is looked the kind of kind that step (5) intermediate ion injects and energy and hard films and is decided; With the independent variable of these three amounts as the computer device simulation softward, draw the range that ion can penetrate through analog computation in hard films, select to get final product greater than the hard films thickness of this numerical value.
In the step (2), the thickness of said photoresist is 10000~20000 dusts.
In the step (3), said dry etching is carved and is opened hard films and be parked on the bed course film, requires the speed of its etching hard films and bed course film to have high selectivity, preferably the high selectivity about 10-50.
In the step (3), said employing dry etching is carved and is opened hard films, and the side pattern that it contacts with silicon chip surface should be the right angle near 90 °.
In the step (3); Said employing dry etching is carved and is opened hard films; If the side pattern that it contacts with silicon chip surface can not guarantee near 90 ° right angle, then, the multistep ion of step (5) increases sidewall that a step isotropic etching removes a part of hard films between injecting to eliminate the width difference that high low energy ion injects.
In the step (5), said multistep ion injects and at first carries out the injection of retrograde well high energy injection region, carries out retrograde well low energy injection region then and injects.
In the step (5), ion implantation energy>500keV that said retrograde well high energy injection region is injected; Ion implantation energy<100keV that said retrograde well low energy injection region is injected.
In the step (5), after retrograde well high energy injection region is injected, retrograde well low energy injection region increases sidewall that a step isotropic etching removes a part of hard films before injecting to eliminate the width difference that high low energy ion injects.
In the step (6), can adopt the phosphoric acid solution wet method to peel off hard films and bed course film.
Compare with prior art; The present invention has following beneficial effect: owing to being the barrier layer with the hard films, the side etching pattern that it contacts with silicon chip is to become almost 90 ° rectangular shaped, does not have the gentle slope shape (even certain gentle slope is arranged; Also can remove the sidewall improvement of the hard mask of a part through isotropic etching); So the width difference that high low energy ion injects is eliminated, and has avoided the drift of LDMOS component characteristic parameter, has improved the performance of device.
Description of drawings
Fig. 1 is traditional high-voltage LDMOS profile; Wherein, the 11st, silicon substrate; The 12nd, the deep trap injection region; The 13rd, the drift region; The 14th, the low pressure trap; The 15th, a silica; The 16th, tagma (Bulk); The 17th, source region (Source); The 18th, polysilicon gate; The 19th, drain region (Drain);
Fig. 2 be traditional high-voltage LDMOS when retrograde well is injected, there is high low energy injection zone difference in the high-voltage LDMOS active area, thereby dosage has difference than expection, thereby causes the sketch map of device cut-in voltage drift; Wherein, the 11st, silicon substrate; The 12nd, the deep trap injection region; The 13rd, the drift region; The 15th, a silica; The 20th, photoresist; The 21st, the bed course film; The 22nd, retrograde well low energy injection region; The 23rd, retrograde well high energy injection region;
Fig. 3 is the schematic flow sheet of the inventive method; Fig. 3 A is deposition bed course film, a hard films in the inventive method, and gluing on hard films carries out retrograde well and injects the sketch map after window lithography is accomplished; Fig. 3 B is that dry etching is parked on the bed course film in the inventive method, and the regional graphics that needs inject are transferred on the hard films, peels off the sketch map after photoresist is accomplished; Fig. 3 C is that the high energy trap injects with the low energy cut-in voltage and regulates the sketch map (wherein the width of high energy, low energy ion injection no longer includes difference) that injects after accomplishing in the inventive method; Fig. 3 D be in the inventive method the high energy trap inject with the low energy cut-in voltage regulate the sketch map that injects after accomplishing (inject and the low energy cut-in voltage is regulated and increased the sidewall that a step isotropic etching removes the hard mask of a part between injecting at the high energy trap, wherein low energy cut-in voltage adjusting injection zone in addition greater than high energy trap injection region); Fig. 3 E peels off hard films and bed course film with wet method in the inventive method, and the ion of low pressure retrograde well injects the sketch map after accomplishing; Wherein, 1 is silicon substrate, and 2 is the deep trap injection region, and 3 is the drift region, and 4 is the bed course film, and 5 is a silica, and 6 is hard films, and 7 is photoresist, and 8 is retrograde well high energy injection region, and 9 is retrograde well low energy injection region.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is done further detailed explanation.
The present invention forms certain thickness hard films (for example silica, silicon nitride) earlier when carrying out the injection of low pressure retrograde well, the hard films figure that photoetching subsequently+etching forms injects as the barrier layer with this hard films.Because contacting with silicon chip of hard films is to become almost 90 ° rectangular shaped; There is not the gentle slope shape; So there is not the width difference that high low energy ion injects (, yet can improving) through the sidewall that isotropic etching remove the hard mask of a part even certain gentle slope is arranged, therefore can be because of the difference of the ion penetration ability of different-energy; Causing same block of repeatedly ion that injects version graph be infused on the dosage has difference than expection, thereby has avoided the drift of LDMOS component characteristic parameter.
The inventive method adopts hard films to carry out the injection of low pressure retrograde well as low pressure retrograde well injection barrier layer, and its concrete steps comprise as follows:
1. carry out the silicon chip surface that the low pressure retrograde well injects at needs and deposit bed course film 4 and hard films 6 successively.Bed course film 4 generally is the silica that adopts thermal oxidation process to form, and its thickness is right at 100~300 Izods.The hard films 6 general chemical gaseous phase depositing process that adopt form; Hard films 6 can be silica or silicon nitride (hard films 6 adopts silicon nitride among this embodiment); Its thickness is looked the kind of kind, energy and hard films that ion injects and is decided: with the independent variable of these three amounts as the computer device simulation softward; Then can draw the range (dependent variable) that ion can penetrate in hard films, select to get final product greater than the hard films thickness of this numerical value through analog computation.
2. the photoresist 7 of about 10000~20000 dusts, exposure on hard films 6 surfaces coated, the figure transfer of low pressure retrograde well injection zone is seen Fig. 3 A to photoresist layer 7.
3. dry etching is carved and is opened hard films 6, is parked on the bed course film 4, and the side pattern that it contacts with silicon chip surface should be the right angle near 90 °.Dry etching is carved and to be opened hard films 6 and be parked on the bed course film 4, requires its speed of carving hard films 6 and bed course film 4 to have high selectivity, and representative value is about 10-50.Dry etching is carved and is opened hard films 6; The side pattern that it contacts with silicon chip surface should be the right angle near 90 °; Assurance is with this barrier layer of injecting as ion; Can be because of the difference of the ion penetration ability of different-energy, causing same block of repeatedly ion that injects version graph be infused on the dosage has difference than expection, thereby has avoided the drift of LDMOS component characteristic parameter.
4. peel off photoresist, the figure transfer of low pressure retrograde well injection zone is seen Fig. 3 B to hard film layer 6.
5. be the repeatedly ion injection that the low pressure retrograde well is carried out on the barrier layer with hard films 6; Carry out high energy trap (being retrograde well high energy injection region 8) earlier and inject (the ion implantation energy that injects of retrograde well high energy injection region 8>500keV) usually; After carry out the low energy cut-in voltage and regulate (being retrograde well low energy injection region 9) and inject (the ion implantation energy that injects of retrograde well low energy injection region 9<100keV) usually; The width that high energy, low energy ion inject no longer includes difference, sees Fig. 3 C; As if the right angle of the etching pattern that can not guarantee hard films 6 near 90 °; Then also can be after energetic ion injects, low energy ion increases the sidewall that a step isotropic etching removes a part of hard films 6 before injecting and strengthens this beneficial effect (shown in Fig. 3 D; Retrograde well low energy injection region 9 in addition greater than retrograde well high energy injection region 8), its required sidewall thickness that removes should guarantee can not to violate the physical dimension rule of designs.
6. peel off hard films 6 and bed course film 4 (, can adopt phosphoric acid solution) with wet method, accomplish the ion implantation process of whole low pressure retrograde well, see Fig. 3 E for the silicon nitride that is commonly used to as hard films.Shown in Fig. 3 E; Adopt the final low pressure retrograde well that forms of the inventive method; Its retrograde well low energy injection region 9 no longer includes difference with retrograde well high energy injection region 8; Therefore can not cause because of the difference of the ion penetration ability of different-energy same block of repeatedly ion that injects version graph be infused on the dosage has difference than expection, thereby has avoided the drift of LDMOS component characteristic parameter.