CN102446700B - 一种改善硅衬底的方法 - Google Patents
一种改善硅衬底的方法 Download PDFInfo
- Publication number
- CN102446700B CN102446700B CN201010502043.1A CN201010502043A CN102446700B CN 102446700 B CN102446700 B CN 102446700B CN 201010502043 A CN201010502043 A CN 201010502043A CN 102446700 B CN102446700 B CN 102446700B
- Authority
- CN
- China
- Prior art keywords
- silicon substrate
- metal ion
- desired depth
- silicate
- concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201010502043.1A CN102446700B (zh) | 2010-09-30 | 2010-09-30 | 一种改善硅衬底的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201010502043.1A CN102446700B (zh) | 2010-09-30 | 2010-09-30 | 一种改善硅衬底的方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102446700A CN102446700A (zh) | 2012-05-09 |
CN102446700B true CN102446700B (zh) | 2015-11-11 |
Family
ID=46009104
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201010502043.1A Active CN102446700B (zh) | 2010-09-30 | 2010-09-30 | 一种改善硅衬底的方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102446700B (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106876448A (zh) * | 2017-01-17 | 2017-06-20 | 中国工程物理研究院电子工程研究所 | 一种基于钛掺杂的高质量氧化硅薄膜及其制备方法 |
CN108933146A (zh) * | 2018-06-29 | 2018-12-04 | 武汉华星光电半导体显示技术有限公司 | 一种阵列基板及其制作方法、液晶显示装置 |
CN110006727A (zh) * | 2019-04-10 | 2019-07-12 | 深圳市锐骏半导体股份有限公司 | 一种离子注入机稳定性的监控方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003019643A1 (fr) * | 2001-08-23 | 2003-03-06 | Nec Corporation | Dispositif semi-conducteur comportant un film isolant presentant une permittivite elevee et son procede de production |
US6703277B1 (en) * | 2002-04-08 | 2004-03-09 | Advanced Micro Devices, Inc. | Reducing agent for high-K gate dielectric parasitic interfacial layer |
CN1655362A (zh) * | 2004-01-29 | 2005-08-17 | 三星电子株式会社 | 用于半导体器件的电介质层及其制造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004165225A (ja) * | 2002-11-08 | 2004-06-10 | Sony Corp | 半導体基板の製造方法、固体撮像装置の製造方法及び固体撮像装置用の選別方法 |
-
2010
- 2010-09-30 CN CN201010502043.1A patent/CN102446700B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003019643A1 (fr) * | 2001-08-23 | 2003-03-06 | Nec Corporation | Dispositif semi-conducteur comportant un film isolant presentant une permittivite elevee et son procede de production |
US6703277B1 (en) * | 2002-04-08 | 2004-03-09 | Advanced Micro Devices, Inc. | Reducing agent for high-K gate dielectric parasitic interfacial layer |
CN1655362A (zh) * | 2004-01-29 | 2005-08-17 | 三星电子株式会社 | 用于半导体器件的电介质层及其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
CN102446700A (zh) | 2012-05-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8329566B2 (en) | Method of manufacturing a high-performance semiconductor device | |
US8541280B2 (en) | Semiconductor structure and method for manufacturing the same | |
US9006835B2 (en) | Transistor with embedded Si/Ge material having reduced offset and superior uniformity | |
CN103378008B (zh) | 双金属栅极cmos器件及其制造方法 | |
CN104916542B (zh) | 半导体器件的结构及其制造方法 | |
Mertens et al. | Si-cap-free SiGe p-channel FinFETs and gate-all-around transistors in a replacement metal gate process: Interface trap density reduction and performance improvement by high-pressure deuterium anneal | |
CN102117750A (zh) | Mosfet结构及其制作方法 | |
CN102456739A (zh) | 半导体结构及其形成方法 | |
US8828834B2 (en) | Methods of tailoring work function of semiconductor devices with high-k/metal layer gate structures by performing a fluorine implant process | |
US20150011056A1 (en) | Variation Resistant MOSFETs with Superior Epitaxial Properties | |
CN102956454A (zh) | 一种半导体结构及其制造方法 | |
US8501601B2 (en) | Drive current increase in field effect transistors by asymmetric concentration profile of alloy species of a channel semiconductor alloy | |
CN102339752A (zh) | 一种基于栅极替代工艺的制造半导体器件的方法 | |
CN103632973A (zh) | 半导体器件及其制造方法 | |
CN103489779B (zh) | 半导体结构及其制造方法 | |
CN103137475B (zh) | 一种半导体结构及其制造方法 | |
CN103094120A (zh) | 一种半导体结构的制造方法 | |
CN104576382A (zh) | 一种非对称FinFET结构及其制造方法 | |
CN102446700B (zh) | 一种改善硅衬底的方法 | |
CN103811349A (zh) | 半导体结构及其制造方法 | |
CN103943502B (zh) | 鳍式场效应晶体管及其形成方法 | |
US20130032877A1 (en) | N-channel transistor comprising a high-k metal gate electrode structure and a reduced series resistance by epitaxially formed semiconductor material in the drain and source areas | |
CN104752205B (zh) | 半导体器件及其形成方法 | |
CN103531540B (zh) | 半导体器件制造方法 | |
CN103377930B (zh) | 半导体结构及其制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CP01 | Change in the name or title of a patent holder | ||
CP01 | Change in the name or title of a patent holder |
Address after: No. 3, North Tu Cheng West Road, Chaoyang District, Beijing Co-patentee after: BEIJING NAURA MICROELECTRONICS EQUIPMENT Co.,Ltd. Patentee after: Institute of Microelectronics, Chinese Academy of Sciences Address before: No. 3, North Tu Cheng West Road, Chaoyang District, Beijing Co-patentee before: BEIJING NMC Co.,Ltd. Patentee before: Institute of Microelectronics, Chinese Academy of Sciences |
|
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20190215 Address after: 100176 No. 8 Wenchang Avenue, Daxing Economic and Technological Development Zone, Beijing Patentee after: BEIJING NAURA MICROELECTRONICS EQUIPMENT Co.,Ltd. Address before: No. 3, North Tu Cheng West Road, Chaoyang District, Beijing Co-patentee before: BEIJING NAURA MICROELECTRONICS EQUIPMENT Co.,Ltd. Patentee before: Institute of Microelectronics, Chinese Academy of Sciences |