CN102376629B - Method for realizing through-silicon-via interconnection by suspension photoresist - Google Patents
Method for realizing through-silicon-via interconnection by suspension photoresist Download PDFInfo
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- CN102376629B CN102376629B CN 201010255550 CN201010255550A CN102376629B CN 102376629 B CN102376629 B CN 102376629B CN 201010255550 CN201010255550 CN 201010255550 CN 201010255550 A CN201010255550 A CN 201010255550A CN 102376629 B CN102376629 B CN 102376629B
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- 229920002120 photoresistant polymer Polymers 0.000 title claims abstract description 103
- 238000000034 method Methods 0.000 title claims abstract description 72
- 239000000725 suspension Substances 0.000 title claims abstract description 69
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 77
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 77
- 239000010703 silicon Substances 0.000 claims abstract description 77
- 239000010949 copper Substances 0.000 claims abstract description 57
- 229910052751 metal Inorganic materials 0.000 claims abstract description 49
- 239000002184 metal Substances 0.000 claims abstract description 49
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 31
- 229910052802 copper Inorganic materials 0.000 claims abstract description 31
- 238000001259 photo etching Methods 0.000 claims abstract description 9
- 238000007747 plating Methods 0.000 claims abstract description 8
- 238000001338 self-assembly Methods 0.000 claims abstract description 4
- 230000004888 barrier function Effects 0.000 claims description 14
- 238000004026 adhesive bonding Methods 0.000 claims description 8
- 230000003628 erosive effect Effects 0.000 claims description 6
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 230000007797 corrosion Effects 0.000 claims description 4
- 238000005260 corrosion Methods 0.000 claims description 4
- 239000008367 deionised water Substances 0.000 claims description 4
- 229910021641 deionized water Inorganic materials 0.000 claims description 4
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- 238000005507 spraying Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
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- 238000007789 sealing Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000003292 glue Substances 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 238000004528 spin coating Methods 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 235000011114 ammonium hydroxide Nutrition 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- -1 tetramethyl aqua ammonia Chemical compound 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- 240000001439 Opuntia Species 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
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- 239000012528 membrane Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
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Abstract
The invention provides a method for realizing through-silicon-via interconnection by suspension photoresist. The method comprises the following steps of: etching a through hole in a thinned or non-thinned silicon slice; forming a suspension photoresist film which bridges the through hole on the upper surface of the silicon slice by using a self-assembly method, and photoetching to form a seal of the suspension photoresist to one end of the through hole; sputtering to form a metal seed layer and removing the photoresist to form a suspension metal film seal structure to one end of the through hole; and performing copper plating to fill the through hole to form a communication structure. In the method, as the through hole is etched and a flat metal seed layer surface structure is formed, so surface flattening post-treatment is avoided, the process is simple and the cost is low.
Description
Technical field
The present invention relates to the through-hole interconnection technology in a kind of integrated circuit, especially a kind of method that realizes interconnecting silicon through holes by the suspension frame structure photoresist.
Background technology
In recent years, along with 3-D stacks technology and MEMS Development of Packaging Technology, (TSV, Through-Silicon-Via) interconnection technique has been subjected to great attention to the silicon through hole.TSV realizes three-dimensional transfer of data, thereby has shortened transmission range by make vertical conducting between chip and chip, saved the chip list area and reduced power consumption.Utilize the TSV technology, companies such as Intel, IBM laminated chips technical field have obtained important breakthrough and have realized commodity production, and at present, increasing company has put in the research and development of TSV technology.
Based on different application, the realization of TSV technology mainly can be divided into two kinds: first through-hole approaches and back through-hole approaches.Elder generation's through-hole approaches at first forms the blind hole that does not run through in the positive etching of silicon chip, and the plated metal Seed Layer is filled up blind hole again in the hole, at last from the thinning back side silicon chip until exposing metal electrode.Then through-hole approaches is carried out attenuate etching formation through hole again to silicon chip earlier, fills up through hole again behind the thicker metal seed layer of backside deposition, removes Seed Layer at last again.Elder generation's through-hole approaches is more favored in actual industrial production, then there is certain difficulty in through-hole approaches in the making of Seed Layer, and form projection owing to electroplate the through hole that fills up in the positive meeting of silicon chip, need polishing to carry out planarization, the device in silicon chip front is damaged.For avoiding these problems, Leung L. (2005) etc. has adopted the suitable for reading inwall plated metal Seed Layer of elder generation at small size through hole, and of short duration plating is so that electroplate the method for filling up through hole again from the back side after positive the sealing.Yet this method still can not obtain very smooth upper surface in that through hole is suitable for reading.Lai J.H. (2010) etc. has proposed the method for screen cloth Seed Layer, at first deposits SiO in the silicon chip front before etching through hole
2Film is to form the membrane structure of sealing, this SiO of etching behind etching through hole
2Film to be forming through hole mesh structure suitable for reading, and the front depositing metal layers is also electroplated from the back side and to be filled up through hole, erodes Seed Layer and SiO at last again
2Layer is to obtain flat surface.This method reaches the through hole of 50 μ m applicable to diameter, but processing step is complicated.
Given this, the present invention will propose a kind of method of utilizing the suspension photoresist to make interconnecting silicon through holes, thereby can utilize simple technology directly at the positive surface texture that obtains planarization of silicon chip.This suspension photoresist process is called in name in a kind of patent of invention of glue spreading method (patent No. is 201010144358.3, Wu Ziyang etc.) of suspension frame structure photoresist detailed introduction.
Summary of the invention
The technical problem that the present invention mainly solves is to provide a kind of method that realizes interconnecting silicon through holes by the suspension photoresist.
In order to solve the problems of the technologies described above, the present invention adopts following technical scheme:
A kind of method by suspension photoresist realization interconnecting silicon through holes may further comprise the steps:
1) forms through hole at attenuate or without the silicon chip of attenuate, and form the barrier layer at through-hole wall;
2) utilize self-assembling method at the positive suspension photoresist structure that forms the leap through hole of silicon chip, and make it to form the photoresist enclosuring structure of through hole by photoetching;
3) at the positive metal seed layer of making of silicon chip, remove the photoresist enclosuring structure then, form the metal film enclosuring structure of through hole;
4) protect at silicon chip front gluing, by electroplating to form the metal connectivity structure in the through hole.
As preferred version of the present invention, particularly, adopt etching technics to form through hole at silicon chip in the step 1).The method of wafer thinning comprises cmp (CMP) and TMAH (tetramethyl aqua ammonia) and KOH chemical corrosion attenuate etc.In order to make the insulation of through hole line and silicon chip substrate, and the diffusion of barrier metal in the silicon, need form the barrier layer at through-hole wall, form the barrier layer and can utilize chemical vapour deposition technique or physical vaporous deposition, materials such as TiN, TaN can be adopted in the barrier layer.
Step 2) concrete steps of formation suspension photoresist structure are preferably, at first a spot of photoresist is dripped in the deionized water surface, make it self assembly formation photoresist film as thin as a wafer, again this photoresist film is transferred to silicon chip surface, form the suspension photoresist structure of crossing over through hole.Form circular photoresist enclosuring structure by photoetching process, and remove unwanted photoresist.
Step 3) prepares metal seed layer and adopts methods such as evaporation or sputter, and metal seed layer can be copper metal seed layer or aluminum metal Seed Layer.During preparation copper metal seed layer, can prepare one deck TiW layer earlier, again at TiW layer preparation Cu layer.For avoiding corrosion of metal and cause the metallic film stress deformation, adopt organic method of removing photoresist photoresist enclosuring structure erosion removal with suspension in the through hole, only keep through hole smooth metal film enclosuring structure suitable for reading; When metal seed layer is the copper metal seed layer, also need the TiW layer under the erosion removal through hole Cu layer suitable for reading.
In the step 4), for avoiding the spin coating mode to the damage of via metal film enclosuring structure, the mode that sprays or make the suspension photoresist is again adopted in the protection of the gluing in silicon chip front.The via metal electric plating method comprises the method for direct current electrode position and pulse plating.
A kind of method that realizes interconnecting silicon through holes by the suspension photoresist provided by the invention, utilize self-assembling method at the positive suspension photoresist film of crossing over through hole that forms of silicon chip, and photoetching forms suspension photoresist enclosuring structure, thereby form the metal film enclosuring structure of suspension, utilize copper to electroplate to fill up through hole then and form connectivity structure.This method can be directly at the positive surface texture that obtains planarization of silicon chip, and technology is simple, and is with low cost.
Description of drawings
Fig. 1 a-1f utilizes AZ5214 suspension photoresist to make the typical process flow schematic diagram that the copper metal seed layer seals to realize silica-based copper vias interconnection.
Fig. 2 is the microphoto of the suspension photoresist enclosuring structure on the wide via-hole array of diameter 30 μ m.
Fig. 3 is the microphoto that the wide Cu through hole of the dark 30 μ m of 150 μ m is communicated with.
Fig. 4 a-4h utilizes AZ5214 suspension photoresist to make the copper metal seed layer to seal to realize the typical process flow schematic diagram of copper vias interconnection at the silicon chip of having made chip.
Fig. 5 a-5c utilizes AZ5214 suspension photoresist to make barrier closures to realize the typical process flow schematic diagram of copper vias interconnection.
Fig. 6 is the schematic diagram that various filling forms represent material among Fig. 1 a-1f, Fig. 4 a-4h and Fig. 5 a-5c.
Embodiment
Below a kind of realize that by the suspension photoresist method of interconnecting silicon through holes is elaborated by each specific embodiment to of the present invention.
Embodiment one
Present embodiment is made copper metal seed layer (TiW/Cu) as the method for sealing to realize silica-based copper vias interconnection for utilizing AZ5214 suspension photoresist.
The copper product good electrical conductivity makes it to become the common used material of lead in the integrated circuit.In TSV technology, copper is owing to have compatibility with multilayer interconnection technology in preceding road technology (FEOL) and postchannel process (BEOL), thereby becomes the conductor material that is widely used most.With reference to figure 1a-1f, its concrete processing step is as follows:
(1) sees Fig. 1 a; with deep reactive ion bundle lithographic technique at attenuate or etch the through hole of diameter 10-50 μ m without the silicon chip of attenuate; and use the method for MOCVD (metallo-organic compound chemical vapour deposition (CVD)) or PVD (physical vapour deposition (PVD)) to cover the thick TiN barrier layer of 50nm; make the barrier layer that forms in the through hole metallic copper; can make the silicon chip back side up to protect its Facad structure during deposition, TiN does not draw on the barrier layer in the drawings.The method of wafer thinning comprises cmp (CMP) and TMAH (tetramethyl aqua ammonia) and KOH chemical corrosion attenuate etc.
(2) silicon chip is faced up immerse and fill in the container of deionized water, the AZ5214 photoresist of 0.1ml is dripped in the deionized water surface, the AZ5214 photoresist can self assembly form the photoresist film that thickness is lower than 1 μ m.Slowly get rid of the water in the container, make photoresist film be covered on silicon chip surface, this photoresist film has certain intensity, can cross over the following through hole of diameter 50 μ m and form the suspension photoresist structure, shown in Fig. 1 b.Fig. 2 is the suspension photoresist microphoto on the wide via-hole array of diameter 30 μ m.
(3) exposure imaging is carried out to the suspension photoresist structure in baking back before the silicon chip, make it to form the photoresist enclosuring structure of through hole top, remove the photoresist that does not need the position.See Fig. 1 c, for increasing the support strength of photoresist, the photoresist enclosuring structure can be rounded through photoetching.The back baking is to remove the moisture in the photoresist in baking oven.
(4) method with magnetron sputtering covers the TiW layer of 30nm and the Cu layer of 300nm in the positive priority of silicon chip, thereby forms the copper metal seed layer.At the position that photoresist is removed, the copper metal seed layer will form with silicon chip and contact, and form the double-deck suspension enclosuring structure of photoresist film and metallic film (TiW/Cu) above through hole, see Fig. 1 d.
(5) absolute ethyl alcohol and the acetone that used 2: 1 removes photoresist as organic solvent, i.e. organic method of removing photoresist, and the photoresist enclosuring structure of suspension will be entered the organic solvent of through hole from the silicon chip back side and be removed.Use H
2O
2TiW layer under the erosion removal through hole seal C u layer forms the thick smooth Cu film enclosuring structure of through hole top 300nm, sees Fig. 1 e.
(6) make the suspension photoresist again in the protection of the positive formation of silicon chip glue, can repeatedly repeat to form thicker multilevel resist protection, to stop the intrusion of electroplate liquid subsequently.Wipe one's feet in the silicon chip front and form contacting of Cu layer and electroplating power supply, use the pulse power (also can use DC power supply according to technological requirement) to carry out Cu and electroplate, till Cu plates out from the through hole at the silicon chip back side, form vertical communication, see Fig. 1 f.Remove the photoresist in silicon chip front at last with organic ashing method, and require the Cu in silicon chip front is carried out the selective etch removal according to domain.Fig. 3 is the microphoto that the wide Cu through hole of the dark 30 μ m of 150 μ m is communicated with.
Embodiment two
This example is made copper metal seed layer (TiW/Cu) as sealing to realize the method for copper vias interconnection at the silicon chip of having made chip for utilizing AZ5214 suspension photoresist.
For the interconnection of the copper vias in the chip, need in the through-hole interconnection technical process, implement protection to avoid its damage to chip.Can implement protection by the method for spin coating or spraying gluing for general integrated circuit (IC)-components; but for the MEMS device; the spin coating gluing has not been suitable for the protection of three-dimensional structure; sprayed protection is in order all to fill up the space in the device photoresist that needs spraying very thick; thereby can't form even curface, and may cause damage to the moving element in the device.And suspension glue applies the influence that can reduce to greatest extent device, and forms even curface, thereby addresses this problem.With reference to figure 4a-4h, its concrete processing step is as follows:
(1) etches the through hole of diameter 15-20 μ m with deep reactive ion bundle lithographic technique at the silicon chip that is manufactured with the MEMS chip, see Fig. 4 a.
(2) make the suspension photoresist at silicon chip surface, make it to form the suspension photoresist structure of crossing over through hole, and Fig. 4 b is seen to form the suspension covered structure in the gap of crossing over structure peripheries such as MEMS cantilever beam, film and mass.Can apply the suspension photoresist of adequate thickness according to the size in the gap of required leap, the suspension photoresist that thickness is bigger has bigger intensity, thereby can cross over bigger gap.
(3) coated suspension photoresist is carried out exposure imaging, only form the removal figure of annular around through hole, thereby form the photoresist enclosuring structure of through hole, other position is still covered by the suspension photoresist, shown in Fig. 4 c.In baking oven, remove the moisture in the photoresist.
(4) method with magnetron sputtering covers the TiW layer of 30nm and the Cu layer of 300nm in the positive priority of silicon chip, to form the copper metal seed layer.Annular position around through hole, the copper metal seed layer will form with silicon chip and contact, and form the double-deck suspension enclosuring structure of photoresist and metal film (TiW/Cu) above through hole, see Fig. 4 d.
(5) use organic method of removing photoresist to remove the photoresist enclosuring structure of via top suspension.Use H
2O
2TiW layer under the erosion removal through hole sealing part Cu layer forms the thick smooth Cu film enclosuring structure of through hole top 300nm, sees Fig. 4 e.
(6) make the suspension photoresist again in the protection of the positive formation of silicon chip glue.Use the pulse power to carry out the Cu the electroplates in hole, till Cu plates out from the through hole at the silicon chip back side, form vertical communication, see Fig. 4 f.The photoresist in organic removal silicon chip front afterwards.
(7) gluing photoetching, and optionally the copper metal seed layer is carried out dry etching.The outer peripheral copper of annular region contacts around carving reach through hole, with the copper metal seed layer in broken ring non through hole zone and being connected of silicon chip, and removes all remaining photoresists, makes die sites exposed again, shown in Fig. 4 g and 4h.
Embodiment three
This example is to utilize AZ5214 suspension photoresist to make barrier closures to realize the method for through-hole interconnection.
At present, some TSV process using is to make metal seed layer to carry out electric plating method at through-hole wall.Utilize the suspension photoresist can form smooth suspension enclosuring structure easily in the aperture, this structure has certain intensity, can stop metal to the growth of the end that seals in electroplating process and form than even curface, plating all at the other end, the hole forms vertical interconnection.Its concrete processing step is as follows:
(1) etches the through hole of diameter 15-20 μ m with deep reactive ion bundle lithographic technique at silicon chip, and make the TaN barrier layer, and protect at the regional gluing of non through hole.
(2) cover the TiW layer of 30nm and the Cu layer making copper metal seed layer of 300nm in the positive sputter of silicon chip.Because through hole is not protected, also covered thinner TiW/Cu film at through-hole wall near zone suitable for reading in the sputter procedure.The Cu film of inwall and the Cu layer of silicon chip surface link to each other, shown in Fig. 5 a.
(3) at the positive suspension photoresist of making of silicon chip, make it the smooth suspension photoresist enclosuring structure of interruption-forming on through hole, shown in Fig. 5 b.Can make multilayer suspension photoresist to obtain bigger intensity.
(4) use the pulse power to carry out the Cu the electroplates in hole, till Cu plates out from the through hole at the silicon chip back side.And the through hole prevention owing to the suspension photoresist suitable for reading will form than the even curface pattern, shown in Fig. 5 c.
(5) photoresist in organic removal silicon chip front, and selective etch is removed the copper metal seed layer in silicon chip front.
In sum, a kind of method that realizes interconnecting silicon through holes by the suspension photoresist of the present invention, utilize self-assembling method at positive suspension photoresist film and the photoetching formation suspension photoresist of crossing over through hole of forming of silicon chip the planarization of through hole to be sealed, adopt to electroplate to form metal longitudinal to UNICOM's structure.This method can be at the positive surface texture that obtains planarization of silicon chip, and technology is simple, and is with low cost.
Above-described embodiment just lists expressivity principle of the present invention and effect is described, but not is used for restriction the present invention.Any personnel that are familiar with this technology all can make amendment to above-described embodiment under spirit of the present invention and scope.Therefore, the scope of the present invention should be listed as claims.
Claims (10)
1. the method by suspension photoresist realization interconnecting silicon through holes is characterized in that, may further comprise the steps:
1) forms through hole at attenuate or without the silicon chip of attenuate, and form the barrier layer at described through-hole wall;
2) utilize self-assembling method at the positive suspension photoresist structure that forms the leap through hole of silicon chip, and make it to form the photoresist enclosuring structure of described through hole by photoetching;
3) at the positive metal seed layer of making of silicon chip, remove this photoresist enclosuring structure then, thereby form the metal film enclosuring structure of through hole;
4) protect at silicon chip front gluing, by electroplating to form the metal connectivity structure in the through hole.
2. according to the described a kind of method by suspension photoresist realization interconnecting silicon through holes of claim 1, it is characterized in that: in the step 1), the method for wafer thinning comprises cmp attenuate and TMAH and KOH chemical corrosion attenuate.
3. according to the described a kind of method by suspension photoresist realization interconnecting silicon through holes of claim 1, it is characterized in that: in the step 1), utilize chemical vapour deposition technique or physical vaporous deposition to form the barrier layer, TiN, TaN material are adopted in described barrier layer.
4. according to the described a kind of method that realizes interconnecting silicon through holes by the suspension photoresist of claim 1, it is characterized in that: step 2) in, the concrete steps that form the suspension photoresist structure of crossing over through hole are, at first photoresist is dripped in the deionized water surface, make it self assembly and form photoresist film, again this photoresist film is transferred to silicon chip surface.
5. according to the described a kind of method by suspension photoresist realization interconnecting silicon through holes of claim 1, it is characterized in that: step 2) in, form circular photoresist enclosuring structure by photoetching, and remove unwanted photoresist.
6. according to the described a kind of method by suspension photoresist realization interconnecting silicon through holes of claim 1, it is characterized in that: in the step 3), described metal seed layer adopts copper metal seed layer or aluminum metal Seed Layer; When preparation copper metal seed layer, preparation one deck TiW layer prepares the Cu layer at the TiW layer more earlier.
7. a kind ofly realize it is characterized in that the method for interconnecting silicon through holes by the suspension photoresist according to claim 1 is described: in the step 3), remove the photoresist enclosuring structure and adopt organic method of removing photoresist, in the through hole with the photoresist enclosuring structure erosion removal of suspension.
8. according to the described a kind of method by suspension photoresist realization interconnecting silicon through holes of claim 6, it is characterized in that: in the step 3), when metal seed layer is the copper metal seed layer, also need the TiW layer under the described copper metal seed layer of erosion removal.
9. according to the described a kind of method by suspension photoresist realization interconnecting silicon through holes of claim 1, it is characterized in that: in the step 4), the mode that gluing protection in silicon chip front is adopted spraying or made the suspension photoresist again.
10. according to the described a kind of method by suspension photoresist realization interconnecting silicon through holes of claim 1, it is characterized in that: in the step 4), the via metal electric plating method comprises the method for direct current electrode position and pulse plating.
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| CN106191862A (en) * | 2016-07-25 | 2016-12-07 | 中国电子科技集团公司第四十研究所 | A kind of method making solid metal hole on substrate |
| CN106276783B (en) * | 2016-11-04 | 2018-03-02 | 中国工程物理研究院电子工程研究所 | A kind of low loss interconnection process of high frequency chip |
| CN113078131B (en) * | 2021-03-23 | 2024-06-07 | 浙江集迈科微电子有限公司 | TSV structure and TSV electroplating process |
| CN115340058A (en) * | 2021-05-13 | 2022-11-15 | 中国科学院微电子研究所 | Electronic device with cavity structure and preparation method thereof |
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