CN102365624B - 多处理器数据处理系统和多处理器数据处理方法 - Google Patents

多处理器数据处理系统和多处理器数据处理方法 Download PDF

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Publication number
CN102365624B
CN102365624B CN2010800155110A CN201080015511A CN102365624B CN 102365624 B CN102365624 B CN 102365624B CN 2010800155110 A CN2010800155110 A CN 2010800155110A CN 201080015511 A CN201080015511 A CN 201080015511A CN 102365624 B CN102365624 B CN 102365624B
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debug
processor
synchronous
clock
request
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CN102365624A (zh
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威廉·C·莫耶
吉米·谷穆佳
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NXP USA Inc
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Freescale Semiconductor Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3632—Debugging of software of specific synchronisation aspects
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Debugging And Monitoring (AREA)
CN2010800155110A 2009-04-08 2010-03-23 多处理器数据处理系统和多处理器数据处理方法 Active CN102365624B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/420,521 2009-04-08
US12/420,521 US8275977B2 (en) 2009-04-08 2009-04-08 Debug signaling in a multiple processor data processing system
PCT/US2010/028300 WO2010117618A2 (en) 2009-04-08 2010-03-23 Debug signaling in a multiple processor data processing system

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CN102365624A CN102365624A (zh) 2012-02-29
CN102365624B true CN102365624B (zh) 2013-10-16

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US (1) US8275977B2 (enExample)
JP (1) JP5459807B2 (enExample)
CN (1) CN102365624B (enExample)
TW (1) TWI483181B (enExample)
WO (1) WO2010117618A2 (enExample)

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US8700955B2 (en) 2011-09-22 2014-04-15 Freescale Semiconductor, Inc. Multi-processor data processing system having synchronized exit from debug mode and method therefor
US9110142B2 (en) * 2011-09-30 2015-08-18 Freescale Semiconductor, Inc. Methods and apparatus for testing multiple-IC devices
US8819485B2 (en) * 2012-03-12 2014-08-26 Infineon Technologies Ag Method and system for fault containment
JP6360387B2 (ja) 2014-08-19 2018-07-18 ルネサスエレクトロニクス株式会社 プロセッサシステム、エンジン制御システム及び制御方法
CN104484258A (zh) * 2014-12-05 2015-04-01 中国航空工业集团公司第六三一研究所 一种多处理器的同步调试支持电路
CN106776186B (zh) * 2016-12-29 2020-04-07 湖南国科微电子股份有限公司 一种多cpu架构下的cpu运行状态调试方法和系统
CN106933721B (zh) * 2017-02-15 2020-06-26 北京四方继保自动化股份有限公司 一种就地化保护装置串口远程监视方法
US10606764B1 (en) * 2017-10-02 2020-03-31 Northrop Grumman Systems Corporation Fault-tolerant embedded root of trust using lockstep processor cores on an FPGA
US10528077B2 (en) * 2017-11-21 2020-01-07 The Boeing Company Instruction processing alignment system
JP6981920B2 (ja) * 2018-05-25 2021-12-17 ルネサスエレクトロニクス株式会社 半導体装置、およびデバッグ方法
JP7073285B2 (ja) * 2019-01-09 2022-05-23 ルネサスエレクトロニクス株式会社 動作検証プログラム、動作同期方法及び異常検出装置
JP7378254B2 (ja) * 2019-09-19 2023-11-13 キヤノン株式会社 マルチプロセッサデバイス
CN111240834B (zh) * 2020-01-02 2024-02-02 北京字节跳动网络技术有限公司 任务执行方法、装置、电子设备和存储介质
US12072971B2 (en) 2020-10-14 2024-08-27 Mobileye Vision Technologies Ltd. Secure debugging
DE102021211709A1 (de) * 2021-10-18 2023-04-20 Robert Bosch Gesellschaft mit beschränkter Haftung Datenverarbeitungsnetzwerk zur Datenverarbeitung
US11892505B1 (en) * 2022-09-15 2024-02-06 Stmicroelectronics International N.V. Debug and trace circuit in lockstep architectures, associated method, processing system, and apparatus

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US20070130492A1 (en) * 2005-12-02 2007-06-07 Piyush Jamkhandi Testable design methodology for clock domain crossing

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US20050149892A1 (en) * 2003-12-29 2005-07-07 Yee Oceager P. System and method for debugging system-on-chips using single or n-cycle stepping
US20070130492A1 (en) * 2005-12-02 2007-06-07 Piyush Jamkhandi Testable design methodology for clock domain crossing

Also Published As

Publication number Publication date
CN102365624A (zh) 2012-02-29
JP2012523616A (ja) 2012-10-04
WO2010117618A2 (en) 2010-10-14
TW201044268A (en) 2010-12-16
TWI483181B (zh) 2015-05-01
US20100262811A1 (en) 2010-10-14
US8275977B2 (en) 2012-09-25
WO2010117618A3 (en) 2011-01-13
JP5459807B2 (ja) 2014-04-02

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