CN102364851A - Circuit converting high-voltage power supply into low-voltage power supply for enabling zero switching current of chip - Google Patents
Circuit converting high-voltage power supply into low-voltage power supply for enabling zero switching current of chip Download PDFInfo
- Publication number
- CN102364851A CN102364851A CN2011103248397A CN201110324839A CN102364851A CN 102364851 A CN102364851 A CN 102364851A CN 2011103248397 A CN2011103248397 A CN 2011103248397A CN 201110324839 A CN201110324839 A CN 201110324839A CN 102364851 A CN102364851 A CN 102364851A
- Authority
- CN
- China
- Prior art keywords
- high voltage
- voltage pmos
- pmos pipe
- diode
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention discloses a circuit converting a high-voltage power supply into a low-voltage power supply for enabling zero switching current of a chip. The circuit comprises an enabling control circuit, a high-voltage PMOS (P-channel Metal Oxide Semiconductor) tube proportion current mirror, a diode series connection network and a current amplifying and outputting circuit. According to the circuit disclosed by the invention, the low-voltage power supply which is converted from the high-voltage power supply and is required by a chip enabling module is realized by directly adopting a general device in a high-voltage process without a special device. The invention has the technical characteristics that: in the circuit disclosed by the invention, the high-voltage power supply is converted into the low-voltage power supply without a traditional architecture consuming quiescent current or the special device; the same function is achieved by adopting the most general device in the high-voltage process, so that the manufacturing cost of the process can be reduced; meanwhile, the quiescent current can be ensured to be zero when the chip is positioned in an enabling switching state; in addition, a low-voltage output power supply has basically no fluctuation along with the change of the high-voltage power supply; and stable voltage output and safety and reliability for work are achieved.
Description
Technical field
The invention belongs to the ic core chip technology, being specifically related to a kind of high pressure that is used for chip enable zero cut-off current changes low-voltage power circuit.
Background technology
The integrated circuit of high voltage supply, its inside can be divided into high-voltage power module and low-tension supply module, and the power supply of high-voltage power module is directly provided by external high voltage power supply, and the power supply of low-tension supply module is supplied power after need being converted into low-tension supply with high voltage source.For the entire chip system; The chip enable module is to begin the module of moving at first; This module generally can not adopt the low-voltage module power supply, because order is after sending effective control signal by the chip enable module from power on, high pressure changes the low-tension supply module and just starts working.Therefore need one of framework to adopt the directly chip enable module of power supply of high voltage source; And along with increasingly high for requirements of saving energy; When chip is in off state; The quiescent current that requires entire chip is zero basically, how to require the chip enable module of framework to become all problems of needs solution of high-performance high pressure chip according to these two.
The existing method of problem that solves this respect has two kinds, and a kind of is that to make the chip enable module be all can consume very little quiescent current in opening or at off state, but this mode at first is to satisfy that to turn-off quiescent current be zero requirement; And in order to make quiescent current very little; Inside circuit need be connected in series very big resistance and limit quiescent current, has increased chip cost, and the work of the advantage of this mode is more stable; Shortcoming is that performance index are relatively poor, realizes that cost is higher.A kind of in addition is to adopt particular device such as JFET, utilizes the device property of JFET, when chip is in off state; Voltage by JFET provides a process high pressure to convert low-tension supply into is supplied power to internal logic circuit, because internal logic circuit is a digital circuit, digital circuit consumed current when quiescent operation is zero basically; Therefore and can export effective control signal, the chip enable modular circuit with the device architectures of JFET and so on is simple, implements more convenient; But because JFET is a particular device; The technology realization needs to increase extra photoetching, and device property is difficult with control, and risk is bigger.
Increasingly high in view of the consideration and the chip operating voltage of existing product cost, need a kind of new framework to solve the powerup issue of chip enable circuit.
Summary of the invention
The object of the present invention is to provide a kind of high pressure that is used for chip enable zero cut-off current to change low-voltage power circuit, this circuit goes for the integrated circuit of any high voltage supply, and circuit is simple relatively, and working stability is reliable, and is not high to the requirement of withstand voltage of device.
A kind of high pressure that is used for chip enable zero cut-off current of the present invention changes low-voltage power circuit, comprises enabling control circuit high voltage PMOS pipe proportional current mirror, diode series network, electric current amplification output circuit.Enable control circuit and form by the high pressure NMOS pipe N1 and first resistance R 1, the grid termination input control signal IN1 of high pressure NMOS pipe N1, source termination ground level, drain terminal connect an end of first resistance R 1.Device property according to the NMOS pipe; When the voltage of control signal IN1 during less than the cut-in voltage VTH of high pressure NMOS pipe N1; High pressure NMOS pipe N1 is in cut-off state, and the electric current that flows through this high pressure NMOS pipe N1 is zero, when the voltage of control signal IN1 during greater than the cut-in voltage VTH of high pressure NMOS pipe N1; High pressure NMOS pipe N1 begins conducting; Have electric current to flow through this high pressure NMOS pipe, the effect of first resistance R 1 is to be used for limiting the electric current that flows through high pressure NMOS pipe N1, drain terminal and the grid end of the first high voltage PMOS pipe P1 of an other termination high voltage PMOS pipe proportional current mirror of first resistance R 1.
High voltage PMOS pipe proportional current mirror is made up of the first high voltage PMOS pipe P1 and the second high voltage PMOS pipe P2; The source end of the first high voltage PMOS pipe P1 and the second high voltage PMOS pipe P2 meets high voltage source VDD simultaneously; The grid end links together and receives the drain terminal of the first high voltage PMOS pipe P1; Because the grid end of the first high voltage PMOS pipe P1 and the second high voltage PMOS pipe P2 and the voltage difference of source end are consistent all the time, so the electric current that flows through these two high voltage PMOS pipes is relevant with the ratio K of the channel width W of these two high voltage PMOS pipes and channel length L basically.Being provided with of ratio K can be set according to circuit requirements.The drain terminal of the first high voltage PMOS pipe P1 connects an end that enables first resistance R 1 in the control circuit 1, and the drain terminal of the second high voltage PMOS pipe P2 connects the input of diode series network and the input of electric current amplification output circuit.
The diode series network; Be composed in series by a plurality of diodes, the connected mode of diode is the negativing ending grounding current potential of the first diode D1, the negative terminal of the positive termination second diode D2; The negative terminal of positive termination the 3rd diode D3 of the second diode D2, the number N of diode is determined by circuit requirements.The base terminal of NPN triode Q1 in the drain terminal of the second high voltage PMOS pipe and the electric current amplification output circuit in the positive termination high voltage PMOS pipe proportional current mirror of N diode DN.
The electric current amplification output circuit is made up of the NPN triode Q1 and second resistance R 2.The collector electrode of NPN triode Q1 meets high voltage source VDD, and base stage connects the anode of N diode DN in drain terminal and the diode series network of the second high voltage PMOS pipe in the high voltage PMOS pipe proportional current mirror.Emitter connects an end of second resistance R 2, and the while is as the output of low-tension supply VOUT.An other termination ground level of second resistance R 2
The present invention utilizes the device property of high pressure NMOS pipe, and the drain terminal of the first high pressure NMOS pipe N1 can be high pressure resistant with respect to earth potential, so when the first high pressure NMOS pipe N1 was in off state, the current potential of its drain terminal was near high voltage source VDD, device can trouble free service.
The present invention does not need special device, directly adopts in the high-pressure process device commonly used to realize that the needed high pressure of chip enable module changes low-tension supply.Circuit structure is fairly simple, and control is got up reliable and stable.Particularly; The present invention has following technical characterstic: circuit of the present invention changes the processing of low-tension supply for high voltage source, does not need the framework of traditional consume static current, also need not adopt particular device to realize that high pressure changes low-tension supply; The most frequently used device is realized identical functions in the employing high-pressure process; Therefore can reduce the technology manufacturing cost, also can guarantee that quiescent current is zero under the chip enable off state simultaneously, and the low pressure out-put supply changes basic not fluctuation with high voltage source; Realization voltage stabilizing output, safe and reliable.
Description of drawings
Fig. 1 is used for chip enable zero cut-off current for the present invention is a kind of high pressure changes low-voltage power circuit;
Fig. 2 enables the structural representation of control circuit for the present invention;
Fig. 3 is the structural representation of high voltage PMOS pipe proportional current mirror of the present invention;
Fig. 4 is the structural representation of diode series network of the present invention;
Fig. 5 is the structural representation of electric current amplification output circuit of the present invention;
Fig. 6 is the variation sketch map of low pressure output VOUT of the present invention with high voltage source VDD;
Among the figure 1, enable control circuit; 2, high voltage PMOS pipe proportional current mirror; 3, diode series network; 4, electric current amplification output circuit.
Embodiment
A kind of high pressure that is used for chip enable zero cut-off current as shown in Figure 1 changes low-voltage power circuit, comprises enabling control circuit 1 high voltage PMOS pipe proportional current mirror 2, diode series network 3, electric current amplification output circuit 4.Enable control circuit 1 and form by the high pressure NMOS pipe N1 and first resistance R 1, the grid termination input control signal IN1 of high pressure NMOS pipe N1, source termination ground level, drain terminal connect an end of first resistance R 1.Device property according to the NMOS pipe; When the voltage of control signal IN1 during less than the cut-in voltage VTH of high pressure NMOS pipe N1; High pressure NMOS pipe N1 is in cut-off state, and the electric current that flows through this high pressure NMOS pipe N1 is zero, when the voltage of control signal IN1 during greater than the cut-in voltage VTH of high pressure NMOS pipe N1; High pressure NMOS pipe N1 begins conducting; Have electric current to flow through this high pressure NMOS pipe, the effect of first resistance R 1 is to be used for limiting the electric current that flows through high pressure NMOS pipe N1, drain terminal and the grid end of the first high voltage PMOS pipe P1 of an other termination high voltage PMOS pipe proportional current mirror 2 of first resistance R 1.High voltage PMOS pipe proportional current mirror 2 is made up of the first high voltage PMOS pipe P1 and the second high voltage PMOS pipe P2; The source end of the first high voltage PMOS pipe P1 and the second high voltage PMOS pipe P2 meets high voltage source VDD simultaneously; The grid end links together and receives the drain terminal of the first high voltage PMOS pipe P1; Because the grid end of the first high voltage PMOS pipe P1 and the second high voltage PMOS pipe P2 and the voltage difference of source end are consistent all the time, so the electric current that flows through these two high voltage PMOS pipes is relevant with the ratio K of the channel width W of these two high voltage PMOS pipes and channel length L basically.Being provided with of ratio K can be set according to circuit requirements.The drain terminal of the first high voltage PMOS pipe P1 connects an end that enables first resistance R 1 in the control circuit 1, and the drain terminal of the second high voltage PMOS pipe P2 connects the input of diode series network 3 and the input of electric current amplification output circuit 4.Diode series network 3; Be composed in series by a plurality of diodes; The connected mode of diode is the negativing ending grounding current potential of the first diode D1, the negative terminal of the positive termination second diode D2, the negative terminal of positive termination the 3rd diode D3 of the second diode D2; By that analogy, the number N of diode is determined by circuit requirements.The base terminal of NPN triode Q1 in the drain terminal of the second high voltage PMOS pipe and the electric current amplification output circuit 4 in the positive termination high voltage PMOS pipe proportional current mirror 2 of N diode DN.Electric current amplification output circuit 4 is made up of the NPN triode Q1 and second resistance R 2.The collector electrode of NPN triode Q1 meets high voltage source VDD, and base stage connects the anode of N diode DN in drain terminal and the diode series network 3 of the second high voltage PMOS pipe in the high voltage PMOS pipe proportional current mirror 2.Emitter connects an end of second resistance R 2, and the while is as the output of low-tension supply VOUT, an other termination ground level of second resistance R 2.
As shown in Figure 2 is the structural representation that enables control circuit 1, is made up of the first high pressure NMOS pipe N1 and first resistance R 1, and method of attachment such as Fig. 1 are said.The drain terminal of the first high pressure NMOS pipe N1 can be high pressure resistant; When this high-voltage tube is in cut-off state; Because by the first high voltage PMOS pipe P1 in the high voltage PMOS pipe proportional current mirror 2, first resistance R, 1, the first high pressure NMOS pipe N1 form by not having DC channel between high voltage source VDD and the ground; So the drain terminal current potential of the first high pressure NMOS pipe N1 is exactly high voltage source VDD, this also is the reason that adopts the high pressure NMOS pipe here.When the current potential of the grid end of the first high pressure NMOS pipe N1 was higher than its cut-in voltage VTH, pipe begins conducting had electric current to flow through, and first resistance R 1 can limit the size of current value.
As shown in Figure 2 is the circuit diagram of high voltage PMOS pipe proportional current mirror 2; Method of attachment sees that Fig. 1 is said; Because the grid end of the first high voltage PMOS pipe P1 and the second high voltage PMOS pipe P2 equates with the potential difference VGS of source end, so the saturation region current formula I=-u0*C that manages according to PMOS
OX* (W/L) * (VGS-VTH)
2, u0 and C
OXBe process constant, the electric current that flows through these two high voltage PMOS pipes only and the ratio of the furrow width W of pipe and the long L of ditch proportional.So the ratio value of the W/L of two high voltage PMOS pipes can rationally be set according to the electric current of circuit needs.
As shown in Figure 3 is the circuit diagram of diode series network 3; Method of attachment is seen shown in Figure 1, is this device property of the 0.7V left and right sides basically according to the diode forward conducting voltage, can connect with a plurality of diodes and do the voltage clamp effect; Such as the clamp voltage that needs 3.5V; Need 5 diodes to be together in series, need the output voltage of 4.2V, need 6 diodes to be together in series.The number of actual diode can rationally be provided with according to the circuit needs.
As shown in Figure 4 is the circuit diagram of electric current amplification output circuit 4; Method of attachment is seen shown in Figure 1; Because the voltage clamp circuit of being made up of the second high voltage PMOS pipe and diode series network 3 in the high voltage PMOS pipe 2 does not have current driving ability; The method that solves is to be connected into emitter follower circuit with the NPN triode, utilizes the current driving ability of the electric current amplification characteristic raising output of NPN triode, and the base stage of triode Q1 is received the anode of the N diode DN of diode series network 3 among the figure; Output VOUT is the emitter of triode for this reason; Because the forward conduction voltage 0.7V of the base potential of triode and the voltage difference of emitter current potential and diode is consistent, so being the clamp voltage that diode series network 3 is exported, the voltage of output VOUT deducts 0.7V, export the output voltage values of VOUT exactly.The direct current that the effect of second resistance R 2 among the figure provides NPN triode Q1 arrives the ground path, and when the VOUT end did not have load current, circuit working can not occur unusually.
The variation sketch map that is low pressure output VOUT with high voltage source VDD as shown in Figure 5.As can be seen from the figure; When high voltage source VDD starts from scratch rising; Output VOUT finally is stabilized in a fixing magnitude of voltage, and the size of this magnitude of voltage is by the series connection of the diode in the diode series network 2 number N decision, and output VOUT is roughly (N-1) * 0.7V.
Low pressure output VOUT of the present invention is as shown in Figure 6 with the variation of high voltage source VDD.
Claims (1)
1. a high pressure that is used for chip enable zero cut-off current changes low-voltage power circuit, it is characterized in that: comprise enabling control circuit (1) high voltage PMOS pipe proportional current mirror (2), diode series network (3), electric current amplification output circuit (4);
The said control circuit (1) that enables is by high pressure NMOS pipe (N1) and first resistance (R1), the grid termination input control signal IN1 of high pressure NMOS pipe (N1), and source termination ground level, drain terminal connect an end of first resistance (R1); Device property according to the NMOS pipe; When the voltage of control signal IN1 during less than the cut-in voltage VTH of high pressure NMOS pipe (N1); High pressure NMOS pipe (N1) is in cut-off state, and the electric current that flows through this high pressure NMOS pipe (N1) is zero, when the voltage of control signal IN1 during greater than the cut-in voltage VTH of high pressure NMOS pipe (N1); High pressure NMOS pipe (N1) beginning conducting; Have electric current to flow through this high pressure NMOS pipe, the effect of first resistance (R1) is to be used for limiting the electric current that flows through high pressure NMOS pipe (N1), the drain terminal and the grid end of the first high voltage PMOS pipe (P1) of an other termination high voltage PMOS pipe proportional current mirror (2) of first resistance (R1);
Said high voltage PMOS pipe proportional current mirror (2) is made up of the first high voltage PMOS pipe (P1) and the second high voltage PMOS pipe (P2); The source end of the first high voltage PMOS pipe (P1) and the second high voltage PMOS pipe (P2) meets high voltage source VDD simultaneously; The grid end links together and receives the drain terminal of the first high voltage PMOS pipe (P1); Because the grid end of the first high voltage PMOS pipe (P1) and the second high voltage PMOS pipe (P2) and the voltage difference of source end are consistent all the time, so the electric current that flows through these two high voltage PMOS pipes is relevant with the ratio K of the channel width W of these two high voltage PMOS pipes and channel length L basically; The drain terminal of the first high voltage PMOS pipe P1 connects an end that enables first resistance (R1) in the control circuit (1), and the drain terminal of the second high voltage PMOS pipe (P2) connects the input of diode series network (3) and the input of electric current amplification output circuit (4);
Said diode series network (3); Be composed in series by a plurality of diodes; The connected mode of diode is the negativing ending grounding current potential of first diode (D1), the negative terminal of positive termination second diode (D2), the negative terminal of positive termination the 3rd diode (D3) of second diode (D2); By that analogy, the number N of diode is determined by circuit requirements; The base terminal of NPN triode (Q1) in the drain terminal of the second high voltage PMOS pipe (P2) and the electric current amplification output circuit (4) in the positive termination high voltage PMOS pipe proportional current mirror (2) of N diode DN;
Said electric current amplification output circuit (4) is made up of NPN triode (Q1) and second resistance (R2); The collector electrode of NPN triode (Q1) meets high voltage source VDD; Base stage connects the anode of N diode DN in drain terminal and the diode series network (3) of the second high voltage PMOS pipe (P2) in the high voltage PMOS pipe proportional current mirror (2); Emitter connects an end of second resistance (R2); While is as the output of low-tension supply VOUT, the other termination ground level of second resistance (R2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103248397A CN102364851A (en) | 2011-10-24 | 2011-10-24 | Circuit converting high-voltage power supply into low-voltage power supply for enabling zero switching current of chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103248397A CN102364851A (en) | 2011-10-24 | 2011-10-24 | Circuit converting high-voltage power supply into low-voltage power supply for enabling zero switching current of chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102364851A true CN102364851A (en) | 2012-02-29 |
Family
ID=45691405
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103248397A Pending CN102364851A (en) | 2011-10-24 | 2011-10-24 | Circuit converting high-voltage power supply into low-voltage power supply for enabling zero switching current of chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102364851A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103560752A (en) * | 2013-07-16 | 2014-02-05 | 威盛电子股份有限公司 | Voltage controlled oscillator |
| CN103595383A (en) * | 2012-08-15 | 2014-02-19 | 原景科技股份有限公司 | Switching circuit |
| CN104821816A (en) * | 2015-05-21 | 2015-08-05 | 苏州锴威特半导体有限公司 | Level shift circuit for half-bridge drive |
| CN105515549A (en) * | 2014-09-26 | 2016-04-20 | 原景科技股份有限公司 | Single trigger circuit |
| CN109189142A (en) * | 2018-10-26 | 2019-01-11 | 上海海栎创微电子有限公司 | On piece analog level clamp circuit |
| CN110995253A (en) * | 2019-11-05 | 2020-04-10 | 芯创智（北京）微电子有限公司 | Time delay unit circuit and annular voltage-controlled oscillator |
| CN117526708A (en) * | 2024-01-04 | 2024-02-06 | 无锡恒芯微科技有限公司 | High-low voltage conversion circuit and lithium battery protection system |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0474007A (en) * | 1990-07-13 | 1992-03-09 | Iwatsu Electric Co Ltd | Buffer amplifier |
| JPH05308267A (en) * | 1992-04-28 | 1993-11-19 | Olympus Optical Co Ltd | Analog switching circuit device |
| WO2001018865A1 (en) * | 1999-09-06 | 2001-03-15 | Hitachi, Ltd. | High-frequency power amplification module and radio communication device |
| JP2010056643A (en) * | 2008-08-26 | 2010-03-11 | Mitsutoyo Corp | Motor driver circuit |
| CN201571021U (en) * | 2010-01-18 | 2010-09-01 | 惠州市正源微电子有限公司 | Power amplifier biasing circuit with temperature compensation function |
| CN201750600U (en) * | 2010-08-03 | 2011-02-16 | 德州学院 | Temperature control circuit of large power white light LED lamp |
| CN102097923A (en) * | 2010-12-03 | 2011-06-15 | 杭州矽力杰半导体技术有限公司 | Driving circuit with zero turn-off current and driving method thereof |
| CN202309520U (en) * | 2011-10-24 | 2012-07-04 | 无锡芯朋微电子有限公司 | Power supply circuit capable of converting high voltage of chip enable zero shutdown current into low voltage |
-
2011
- 2011-10-24 CN CN2011103248397A patent/CN102364851A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0474007A (en) * | 1990-07-13 | 1992-03-09 | Iwatsu Electric Co Ltd | Buffer amplifier |
| JPH05308267A (en) * | 1992-04-28 | 1993-11-19 | Olympus Optical Co Ltd | Analog switching circuit device |
| WO2001018865A1 (en) * | 1999-09-06 | 2001-03-15 | Hitachi, Ltd. | High-frequency power amplification module and radio communication device |
| JP2010056643A (en) * | 2008-08-26 | 2010-03-11 | Mitsutoyo Corp | Motor driver circuit |
| CN201571021U (en) * | 2010-01-18 | 2010-09-01 | 惠州市正源微电子有限公司 | Power amplifier biasing circuit with temperature compensation function |
| CN201750600U (en) * | 2010-08-03 | 2011-02-16 | 德州学院 | Temperature control circuit of large power white light LED lamp |
| CN102097923A (en) * | 2010-12-03 | 2011-06-15 | 杭州矽力杰半导体技术有限公司 | Driving circuit with zero turn-off current and driving method thereof |
| CN202309520U (en) * | 2011-10-24 | 2012-07-04 | 无锡芯朋微电子有限公司 | Power supply circuit capable of converting high voltage of chip enable zero shutdown current into low voltage |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103595383A (en) * | 2012-08-15 | 2014-02-19 | 原景科技股份有限公司 | Switching circuit |
| CN103595383B (en) * | 2012-08-15 | 2016-08-10 | 原景科技股份有限公司 | On-off circuit |
| CN103560752A (en) * | 2013-07-16 | 2014-02-05 | 威盛电子股份有限公司 | Voltage controlled oscillator |
| CN103560752B (en) * | 2013-07-16 | 2017-12-01 | 威盛电子股份有限公司 | Voltage-controlled oscillator |
| CN105515549A (en) * | 2014-09-26 | 2016-04-20 | 原景科技股份有限公司 | Single trigger circuit |
| CN104821816A (en) * | 2015-05-21 | 2015-08-05 | 苏州锴威特半导体有限公司 | Level shift circuit for half-bridge drive |
| CN104821816B (en) * | 2015-05-21 | 2018-02-13 | 苏州锴威特半导体有限公司 | A kind of level displacement circuit being used in half-bridge driven |
| CN109189142A (en) * | 2018-10-26 | 2019-01-11 | 上海海栎创微电子有限公司 | On piece analog level clamp circuit |
| CN110995253A (en) * | 2019-11-05 | 2020-04-10 | 芯创智（北京）微电子有限公司 | Time delay unit circuit and annular voltage-controlled oscillator |
| CN117526708A (en) * | 2024-01-04 | 2024-02-06 | 无锡恒芯微科技有限公司 | High-low voltage conversion circuit and lithium battery protection system |
| CN117526708B (en) * | 2024-01-04 | 2024-03-22 | 无锡恒芯微科技有限公司 | High-low voltage conversion circuit and lithium battery protection system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102364851A (en) | Circuit converting high-voltage power supply into low-voltage power supply for enabling zero switching current of chip | |
| CN202794314U (en) | Over-current detection circuit of power switching tube | |
| CN103575964A (en) | Over-current detection circuit and method for power switch tube | |
| CN107181482A (en) | input and output receiving circuit | |
| CN202309520U (en) | Power supply circuit capable of converting high voltage of chip enable zero shutdown current into low voltage | |
| CN204156724U (en) | A kind of rotating forward positive voltage feedback circuit | |
| CN101763134B (en) | Parallel voltage stabilizing circuit | |
| CN203225733U (en) | A single-channel bidirectional logic level converter | |
| CN202652172U (en) | Analog switch circuit structure | |
| CN103217615A (en) | Output short-circuit detection circuit | |
| CN105656294A (en) | Step-down circuit in medium voltage and high voltage integrated circuit | |
| CN102904432A (en) | Drive control circuit of synchronous switch power switching system | |
| CN110048680B (en) | Low-dropout high-power composite PMOS (P-channel metal oxide semiconductor) tube equivalent circuit | |
| CN103729005A (en) | Negative voltage regulating circuit | |
| CN110690820B (en) | A last tube grid source voltage sampling circuit for Buck circuit | |
| CN103117659A (en) | Current closed-loop control circuit for series load resonant converter | |
| CN202145638U (en) | High voltage simulation switch circuit | |
| CN103871467A (en) | Gate pole control voltage generation circuit | |
| CN203071875U (en) | Biasing circuit capable of reducing standby currents of radio frequency power amplifier | |
| CN203406848U (en) | Source electrode following circuit with high speed and high precision | |
| CN102570990A (en) | Overcurrent protection circuit of amplifier output stage | |
| CN102158213B (en) | DC solid-state relay | |
| CN105320202A (en) | Reference source capable of optionally outputting low voltage | |
| CN101267202A (en) | Current control circuit used for voltage booster circuit | |
| CN105227166A (en) | A kind of metal-oxide-semiconductor back gate voltage control circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C53 | Correction of patent of invention or patent application | ||
| CB02 | Change of applicant information |
Address after: 214028 Wuxi Province, New District, the Yangtze River Road, 21-1 source building (national integrated circuit design Park) room, Applicant after: Wuxi Chipown Microelectronics Co., Ltd. Address before: 214028 Wuxi Province, New District, the Yangtze River Road, 21-1 source building (national integrated circuit design Park) room, Applicant before: Wuxi Xinpeng Micro-electronics Co., Ltd. |
|
| COR | Change of bibliographic data |
Free format text: CORRECT: APPLICANT; FROM: WUXI XINPENG MICRO-ELECTRONICS CO., LTD. TO: WUXI CHIPOWN MICROELECTRONICS CO., LTD. |
|
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20120229 |