CN102325066A

CN102325066A - Compound network card integrated with Gigabit and 10-Gigabit Ethernet

Info

Publication number: CN102325066A
Application number: CN201110204794A
Authority: CN
Inventors: 邵宗有; 刘新春; 杨晓君; 姚文浩; 郑臣明; 王晖; 王英; 柳胜杰; 郝志彬
Original assignee: Dawning Information Industry Co Ltd
Current assignee: Dawning Information Industry Co Ltd
Priority date: 2011-07-21
Filing date: 2011-07-21
Publication date: 2012-01-18

Abstract

The invention provides a compound network card integrated with Gigabit and 10-Gigabit Ethernet. The compound network card comprises an SFP (small form-factor pluggable) interface, an SFP/SFP+ multiplexing interface, a PCIE (peripheral component interconnect-express) 8x interface, a master control chip, a buffer area module and a programmable crystal oscillator, wherein the SFP interface is directly connected with a GTP high-speed interface of the master control chip; the SFP/SFP+ multiplexing interface is connected with the GTP high-speed interface of the master control chip through a switching module; and the PCIE 8x interface, the buffer area module and the programmable crystal oscillator are directly connected with the master control chip. By the implementation of the invention, one network card can work in different working states, thereby effectively solving the switching problem in application of the network card.

Description

The compound network interface card of a kind of integrated gigabit and ten thousand mbit ethernets

Technical field

The present invention relates to a kind of high speed network interface card, specifically, relate to the compound network interface card of a kind of integrated gigabit and ten thousand mbit ethernets.

Background technology

On present market, general seen all is independent gigabit and ten thousand Broadcoms.But under some occasion, sometimes need gigabit Ethernet needs ten thousand mbit ethernets sometimes, if use independently network interface card or directly two different network interface cards of installation in system, but the space of two network interface cards is not installed by some system; Shutdown system is changed another piece network interface card, does the suitable trouble of meeting like this.For economize on the use of funds with easy to use for the purpose of, need the interface of gigabit and 10,000,000,000 be made on the same compound network interface card.

Summary of the invention

The compound network interface card of a kind of integrated gigabit and ten thousand mbit ethernets is provided for invention for this reason.

The compound network interface card of a kind of integrated gigabit and ten thousand mbit ethernets comprises the SFP interface, SFP/SFP+ multiplex interface, PCIE 8x interface, main control chip, buffer zone module and crystal oscillator able to programme;

Said SFP interface directly is connected with the GTP high-speed interface of main control chip; Said SFP/SFP+ multiplex interface is connected with main control chip GTP high-speed interface through handover module; Said PCIE 8x interface, buffer zone module and crystal oscillator able to programme directly are connected with main control chip.

Preferably; Said main control chip comprises four GTP high-speed interfaces; First three directly is connected with the SFP interface; The 4th GTP high-speed interface is connected with the SFP/SFP+ multiplex interface through handover module, and handover module is connected with ten thousand Broadcom functional chips, and ten thousand Broadcom functional chips are connected with main control chip.

Preferably, said main control chip reads handover module parameters through iic bus, is that SFP or SFP+ decide that to be operated in the gigabit state still be 10,000,000,000 states according to the selected interface of handover module.

Preferably, said buffer zone module comprises independently 2 road QDR+ modules and independently 2 road DDR2 modules, and the QDR2+ module is as the low buffering area that postpones, and the DDR2 module is as big capacity buffering area.

Preferably, after operating state was confirmed gigabit or 10,000,000,000 states, main control chip was controlled the buffering area that crystal oscillator able to programme switches clock frequency and employing through iic bus.

Preferably, said network interface card is confirming by crystal oscillator able to programme system to be reinitialized the completion semaphore lock after the operating state; After the work, main control chip is temporary in buffering area with the message that receives, and the message after will handling is sent to main frame through PCIE 8x interface.

Preferably, the operating state of said network interface card is accomplished semaphore lock and decoding by main control chip when gigabit; The operating state of said network interface card was accomplished semaphore lock at 10,000,000,000 o'clock by said ten thousand Broadcom functional chips, and the signal with low speed is sent on the main control chip then, carried out data decode by main control chip and handled.

Preferably, said QDR+ module adopts the CY7C1515V18-300 of two Cypress companies, and total capacity is 144Mb, and maximum bandwidth is the every road of 9Gb; Said DDR2 module adopts two SODIM slots, and maximum can the support capacity be 8GB.

Preferably, said main control chip is a fpga chip.

Preferably, said ten thousand Broadcom functional chips are the VSC8479 chip.

The invention enables same network interface card can be operated in the different working state, efficiently solve the switching problem in the network interface card application.

Description of drawings

Fig. 1 is a configuration diagram of the present invention.

Embodiment

Compound network interface card is supported one tunnel ten thousand mbit ethernet or four road gigabit Ethernets, utilizes FPGA to realize the different protocol stack.The interface of gigabit Ethernet adopts the SFP interface, and transceiver directly uses the high-speed interface of FPGA to realize.Ten thousand mbit ethernets adopt the SFP+ interface, utilize VSC8479 as deserializer, then data are delivered to FPGA and handle.

The SFP interface overall dimension of the SFP+ interface of ten thousand mbit ethernets and gigabit Ethernet is compatible, so SFP+ is multiplexing on the position of the 4th SFP.This position plug the SFP module then system works under the gigabit Ethernet pattern; If plug the SFP+ module then be operated in ten thousand mbit ethernet patterns.The signal of this multiplexing position is switched by the high speed signal buffer.Pass through the type of the automatic identification module of iic bus and the switching of auto-complete function by the FPGA internal processes.

Shown in figure one, the SFP interface of gigabit Ethernet directly with FPGA on high-speed interface (GTP) link to each other, by the locking and the decoding of FPGA oneself completion signal.The SFP+ interface of ten thousand mbit ethernets links to each other with VSC8479 earlier, realizes locking and the string and the conversion of 10,000,000,000 signals through him, and the signal with low speed is connected on the FPGA then, carries out data processing by FPGA afterwards.SFP+ and the 4th multiplexing slot of SFP and circuit switch through a high-speed buffer.

The QDR2+ module is as the low buffer that postpones of system, and having adopted CY7C1515V18-300 (the multiple replaceable original paper is arranged) total capacity of two Cypress companies is 2M*36bit*2=144Mb.In order to improve the bandwidth of system, two-way QDR2 is fully independently, and theoretical maximum bandwidth is the every road of 9Gb.The power problems of considering FPGA does not use ODT directly to do the terminal coupling onboard.

The DDR2 module has adopted the slot of two SODIM as the big capacity buffer of system, and maximum can the support capacity be 8GB.In order to improve the bandwidth of system, two-way DDR2 is fully independently.The power consumption of considering FPGA does not use ODT directly to do the terminal coupling onboard.

System power on back FPGA read through iic bus on the 4th position the parameter of slotting module decide gigabit pattern or 10,000,000,000 patterns of being operated in.Switch different reference clock frequencies when the later FPGA of mode of operation decision controls crystal oscillator able to programme through another iic bus, switch the connected mode of high-speed buffer, and system is carried out initialization again to accomplish the locking of signal.FPGA need carry out some processing to the message of receiving, intermediate data exists in QDR and the DDR memory.Final result is delivered to main frame through the PCIE bus of 8X.

Claims

1. the compound network interface card of integrated gigabit and ten thousand mbit ethernets is characterized in that: comprise the SFP interface, SFP/SFP+ multiplex interface, PCIE 8x interface, main control chip, buffer zone module and crystal oscillator able to programme;

2. compound network interface card as claimed in claim 1; It is characterized in that: said main control chip comprises four GTP high-speed interfaces; First three directly is connected with the SFP interface; The 4th GTP high-speed interface is connected with the SFP/SFP+ multiplex interface through handover module, and handover module is connected with ten thousand Broadcom functional chips, and ten thousand Broadcom functional chips are connected with main control chip.

3. compound network interface card as claimed in claim 1 is characterized in that: said main control chip reads handover module parameters through iic bus, is that SFP or SFP+ decide that to be operated in the gigabit state still be 10,000,000,000 states according to the selected interface of handover module.

4. compound network interface card as claimed in claim 1 is characterized in that: said buffer zone module comprises independently 2 road QDR+ modules and independently 2 road DDR2 modules, and the QDR2+ module is as the low buffering area that postpones, and the DDR2 module is as big capacity buffering area.

5. like claim 3 or 4 described compound network interface cards, it is characterized in that: after operating state was confirmed gigabit or 10,000,000,000 states, main control chip was controlled the buffering area that crystal oscillator able to programme switches clock frequency and employing through iic bus.

6. compound network interface card as claimed in claim 1 is characterized in that: said network interface card is confirming by crystal oscillator able to programme system to be reinitialized the completion semaphore lock after the operating state; After the work, main control chip is temporary in buffering area with the message that receives, and the message after will handling is sent to main frame through PCIE 8x interface.

7. according to claim 1 or claim 2 compound network interface card, it is characterized in that: the operating state of said network interface card is accomplished semaphore lock and decoding by main control chip when gigabit; The operating state of said network interface card was accomplished semaphore lock at 10,000,000,000 o'clock by said ten thousand Broadcom functional chips, and the signal with low speed is sent on the main control chip then, carried out data decode by main control chip and handled.

8. compound network interface card as claimed in claim 4 is characterized in that: said QDR+ module adopts the CY7C1515V18-300 of two Cypress companies, and total capacity is 144Mb, and maximum bandwidth is the every road of 9Gb; Said DDR2 module adopts two SODIM slots, and maximum can the support capacity be 8GB.

9. compound network interface card as claimed in claim 1 is characterized in that: said main control chip is a fpga chip.

10. compound network interface card as claimed in claim 2 is characterized in that: said ten thousand Broadcom functional chips are the VSC8479 chip.