CN102318052A - 凸块及该凸块的形成方法以及形成有该凸块的基板的安装方法 - Google Patents
凸块及该凸块的形成方法以及形成有该凸块的基板的安装方法 Download PDFInfo
- Publication number
- CN102318052A CN102318052A CN2010800080167A CN201080008016A CN102318052A CN 102318052 A CN102318052 A CN 102318052A CN 2010800080167 A CN2010800080167 A CN 2010800080167A CN 201080008016 A CN201080008016 A CN 201080008016A CN 102318052 A CN102318052 A CN 102318052A
- Authority
- CN
- China
- Prior art keywords
- projection
- layer
- projection layer
- metal
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 54
- 239000000758 substrate Substances 0.000 title claims abstract description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 104
- 239000002184 metal Substances 0.000 claims abstract description 104
- 238000005245 sintering Methods 0.000 claims abstract description 43
- 239000010931 gold Substances 0.000 claims abstract description 27
- 238000007747 plating Methods 0.000 claims abstract description 25
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 23
- 229910052737 gold Inorganic materials 0.000 claims abstract description 23
- 239000000843 powder Substances 0.000 claims abstract description 20
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052802 copper Inorganic materials 0.000 claims abstract description 9
- 239000010949 copper Substances 0.000 claims abstract description 9
- 238000004544 sputter deposition Methods 0.000 claims abstract description 9
- 229910052709 silver Inorganic materials 0.000 claims abstract description 6
- 239000004332 silver Substances 0.000 claims abstract description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 19
- 238000010438 heat treatment Methods 0.000 claims description 11
- 239000011248 coating agent Substances 0.000 claims description 10
- 238000000576 coating method Methods 0.000 claims description 10
- 238000005229 chemical vapour deposition Methods 0.000 claims description 7
- 238000010276 construction Methods 0.000 claims description 6
- 238000001035 drying Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 230000006978 adaptation Effects 0.000 claims description 5
- 150000002739 metals Chemical class 0.000 claims description 5
- 238000013459 approach Methods 0.000 claims description 3
- 239000002245 particle Substances 0.000 abstract description 11
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052759 nickel Inorganic materials 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 115
- 239000000428 dust Substances 0.000 description 12
- 239000002562 thickening agent Substances 0.000 description 9
- 238000009434 installation Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 7
- 230000002159 abnormal effect Effects 0.000 description 6
- 239000010408 film Substances 0.000 description 6
- 239000003960 organic solvent Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- 238000012360 testing method Methods 0.000 description 6
- 229910000906 Bronze Inorganic materials 0.000 description 5
- 239000010974 bronze Substances 0.000 description 5
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000021615 conjugation Effects 0.000 description 4
- 238000000280 densification Methods 0.000 description 4
- 150000002148 esters Chemical class 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 229920000178 Acrylic resin Polymers 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 229920000180 alkyd Polymers 0.000 description 2
- 238000003556 assay Methods 0.000 description 2
- 239000001913 cellulose Substances 0.000 description 2
- 229920002678 cellulose Polymers 0.000 description 2
- 239000003814 drug Substances 0.000 description 2
- 229940079593 drug Drugs 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000005868 electrolysis reaction Methods 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 238000010008 shearing Methods 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- OAYXUHPQHDHDDZ-UHFFFAOYSA-N 2-(2-butoxyethoxy)ethanol Chemical compound CCCCOCCOCCO OAYXUHPQHDHDDZ-UHFFFAOYSA-N 0.000 description 1
- QTBSBXVTEAMEQO-UHFFFAOYSA-M Acetate Chemical compound CC([O-])=O QTBSBXVTEAMEQO-UHFFFAOYSA-M 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000001856 Ethyl cellulose Substances 0.000 description 1
- ZZSNKZQZMQGXPY-UHFFFAOYSA-N Ethyl cellulose Chemical compound CCOCC1OC(OC)C(OCC)C(OCC)C1OC1C(O)C(O)C(OC)C(CO)O1 ZZSNKZQZMQGXPY-UHFFFAOYSA-N 0.000 description 1
- VVQNEPGJFQJSBK-UHFFFAOYSA-N Methyl methacrylate Chemical compound COC(=O)C(C)=C VVQNEPGJFQJSBK-UHFFFAOYSA-N 0.000 description 1
- LGRFSURHDFAFJT-UHFFFAOYSA-N Phthalic anhydride Natural products C1=CC=C2C(=O)OC(=O)C2=C1 LGRFSURHDFAFJT-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229940022663 acetate Drugs 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- WUOACPNHFRMFPN-UHFFFAOYSA-N alpha-terpineol Chemical compound CC1=CCC(C(C)(C)O)CC1 WUOACPNHFRMFPN-UHFFFAOYSA-N 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- JHIWVOJDXOSYLW-UHFFFAOYSA-N butyl 2,2-difluorocyclopropane-1-carboxylate Chemical compound CCCCOC(=O)C1CC1(F)F JHIWVOJDXOSYLW-UHFFFAOYSA-N 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- SQIFACVGCPWBQZ-UHFFFAOYSA-N delta-terpineol Natural products CC(C)(O)C1CCC(=C)CC1 SQIFACVGCPWBQZ-UHFFFAOYSA-N 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229920001249 ethyl cellulose Polymers 0.000 description 1
- 235000019325 ethyl cellulose Nutrition 0.000 description 1
- 125000001495 ethyl group Chemical group [H]C([H])([H])C([H])([H])* 0.000 description 1
- 230000009931 harmful effect Effects 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000011297 pine tar Substances 0.000 description 1
- 229940068124 pine tar Drugs 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920000058 polyacrylate Polymers 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000007790 scraping Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 238000013456 study Methods 0.000 description 1
- 230000035900 sweating Effects 0.000 description 1
- 229940116411 terpineol Drugs 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
- H01L2224/11312—Continuous flow, e.g. using a microsyringe, a pump, a nozzle or extrusion
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
- H01L2224/1132—Screen printing, i.e. using a stencil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/11332—Manufacturing methods by local deposition of the material of the bump connector in solid form using a powder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1141—Manufacturing methods by blanket deposition of the material of the bump connector in liquid form
- H01L2224/11416—Spin coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1143—Manufacturing methods by blanket deposition of the material of the bump connector in solid form
- H01L2224/11442—Manufacturing methods by blanket deposition of the material of the bump connector in solid form using a powder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/11444—Manufacturing methods by blanket deposition of the material of the bump connector in gaseous form
- H01L2224/1145—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/11444—Manufacturing methods by blanket deposition of the material of the bump connector in gaseous form
- H01L2224/11452—Chemical vapour deposition [CVD], e.g. laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11462—Electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11464—Electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/115—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
- H01L2224/11505—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
- H01L2224/11901—Methods of manufacturing bump connectors involving a specific sequence of method steps with repetition of the same manufacturing step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
- H01L2224/11901—Methods of manufacturing bump connectors involving a specific sequence of method steps with repetition of the same manufacturing step
- H01L2224/11902—Multiple masking steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13016—Shape in side view
- H01L2224/13017—Shape in side view being non uniform along the bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
- H01L2224/13082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/75343—Means for applying energy, e.g. heating means by means of pressure by ultrasonic vibrations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81053—Bonding environment
- H01L2224/81095—Temperature settings
- H01L2224/81096—Transient conditions
- H01L2224/81097—Heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81205—Ultrasonic bonding
- H01L2224/81207—Thermosonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/8121—Applying energy for connecting using a reflow oven
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/81444—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/011—Groups of the periodic table
- H01L2924/01103—Transition metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/011—Groups of the periodic table
- H01L2924/01108—Noble metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/012—Semiconductor purity grades
- H01L2924/01203—3N purity grades, i.e. 99.9%
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/38—Effects and problems related to the device integration
- H01L2924/381—Pitch distance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/38—Effects and problems related to the device integration
- H01L2924/384—Bump effects
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
本发明的凸块具有由第1凸块层和第2凸块层构成的2层结构,其中,第1凸块层形成于基板上,由金、铜和镍中的任一种的第1导电金属的块状体构成,第2凸块层形成于第1凸块层上,由金和银中的任一种的第2导电金属的粉末的烧结体构成。构成第1凸块层的块状体通过镀敷法、溅射法和CVD法中的任一种方法形成。在这里,构成第2凸块层的烧结体由纯度为99.9重量%以上、平均粒径为0.005μm~1.0μm的第2导电金属构成的金属粉末烧结形成。而且,第2凸块层的杨氏模量是第1凸块层的杨氏模量的0.1~0.4倍。
Description
技术领域
本发明涉及在半导体芯片等上形成的凸块(バンプ)及其形成方法。具体涉及一种可以补偿该凸块的平坦度、且在安装时不需要过度的加压的用金属糊制作的凸块。
背景技术
由于近年来半导体电路的高度集成化,倾向于其结构采用板上芯片(chipon board,COB)或片上芯片(chip on chip,COC)等,大多数情况下采用倒装法作为其安装方法。利用倒装法的安装方法是将在基板上形成的电极(凸块)直接接合到电路基板上,可是作为该凸块的形成方法,镀敷法是主流。
镀敷法可以稳定地制作致密的电极,并且通过适当的条件设定还可控制膜厚(凸块的高度)或形成精细的图案。但是,无论怎样调整条件的设定,要形成完全均一的膜厚也很困难,凸块的高度产生或多或少的不均匀也是不可避免的。而且,当凸块的高度有不均匀的情况下,在安装时会有接触不良的凸块产生。
作为对凸块高度的不均匀的对策,可例举在安装时进行加压使所有的凸块密合的方法,但是过度加压会导致凸块内部有形变残留,其与由于半导体电路的使用产生的热循环而引起的伸缩相互作用有可能造成破损。并且,还有可能由于最初的过度加压而导致基板的损伤。
于是,提出了将镀敷后的凸块研削、研磨以消除不均匀的方案。例如,在专利文献1中揭示了在形成凸块后的基板表面覆盖树脂,将其研磨直至凸块露出以实现凸块平坦化的方法。据此,在确保导通稳定性的同时,由于可以在低压力下安装,所以凸块内的形变残留也消失了。
此外,本申请的申请人从不同于上述的角度出发,提出了消除镀敷凸块的问题点的技术方案(专利文献2)。该方案是改变凸块的构成,将规定粒径·纯度的金属粉烧结形成凸块。与通过镀敷等形成的致密的块状金属相比,由该烧结体形成的凸块为多孔质、比较柔软且具有弹性。而且,通过使凸块具备弹性,即使凸块高度有不均匀,也可以追随其高低差进行收缩并在一定的高度实现接合。并且,在内部没有形变残留,即使发生膨胀·收缩,破损的可能性也低。
专利文献1:日本专利特开2004-31177号公报
专利文献2:日本专利特开2005-216508号公报
发明内容
然而,在通过研削、研磨实现凸块的平坦化时,研削下来的细微的粉末附着在邻近的凸块上,会有使凸块间短路的可能性。此外,还有CMP研磨机等装置成本的问题。
另一方面,在使用由烧结体形成的凸块时虽然没有如上所述的问题,但是由于凸块具有弹性,所以在安装时会有横向变形的可能性,从而影响到凸块间隔(间距)。
本发明是基于以上的背景而完成的发明,提供一种用于倒装法的基板上的凸块以消除因凸块高度的不均匀而引起的问题,以及使用该凸块的基板的安装方法。
本发明人等为解决上述问题进行了认真研究,设计了2层结构作为新的凸块的结构,即为确保凸块的刚性的由块状金属形成的层和为吸收凸块高度的不均匀的由烧结体形成的层构成的2层结构。即,本发明是一种凸块,该凸块以规定图案形成于基板上、由导电金属构成,具有由第1凸块层和第2凸块层构成的2层结构,其中,第1凸块层形成于基板上,由金、铜和镍中的任一种的第1导电金属的块状体构成,第2凸块层形成于所述第1凸块层上,由金和银中的任一种的第2导电金属的粉末的烧结体构成;构成所述第1凸块层的块状体是通过镀敷法、溅射法和CVD法中的任一种方法而形成的;构成所述第2凸块层的烧结体是由纯度为99.9重量%以上、平均粒径为0.005μm~1.0μm的第2导电金属构成的金属粉末烧结而形成的;所述第2凸块层的杨氏模量是所述第1凸块层的杨氏模量的0.1~0.4倍。
本发明将块状金属作为凸块的主要部分,同时着眼于上述的由本申请人揭示的烧结体构成的凸块的弹性,将其配置在凸块的前端部。本发明的凸块为通过第1凸块层确保其刚性,且可以抑制倒装接合时的横向变形、维持间距。此外,由于上部的第2凸块层具有弹性,因此可以追随凸块高度的不均匀而变形,从而可以实现低压力下的平坦度良好的接合。
在这里,第1凸块层是具有刚性的致密的块状金属,可以通过镀敷法、溅射法、CVD法中的任一种方法形成的。
另一方面,作为在上述第1凸块层上形成的、由烧结体构成的第2凸块层,由纯度为99.9重量%以上、平均粒径为0.005μm~1.0μm的第2导电金属构成的金属粉末烧结而成。之所以将金属粉的纯度定为99.9重量%以上的高纯度,是因为纯度较低时粉末的硬度会上升,塑性变形变得困难而弹性下降的缘故。此外,对于金属粉的平均粒径进行限定是因为金属粉的粒径超过1.0μm时,烧结会变得困难;将0.005μm作为下限则是考虑到了其操作性。
而且,该第2凸块层的杨氏模量必须比第1凸块层的杨氏模量低。通过在上部设置比第1凸块层软的第2凸块层,可以在追随凸块高度的不均匀的同时实现稳定的接合。具体而言,第2凸块层的杨氏模量是第1凸块层的杨氏模量的0.1~0.4倍。这是因为低于0.1倍时,第2凸块层过于柔软而使接合时的变形明显,作为凸块的形状会产生问题;超过0.4倍时,第1凸块层会有发生变形的可能。
而且,构成第1、第2凸块层的第1、第2导电金属作为电极都必须具有导电性,再者,必须是各自的块状体和烧结体可具备上述的杨氏模量比值的金属的组合。从这些角度出发,第1导电金属可以选择金、铜和镍中的任一种。另外,第2导电金属可以选择金和银中的任一种。
如上所述,第1导电金属和第2导电金属可以选择同一种金属(金),也可以将金镀层作为第1凸块层,将在其上由金粉末烧结而成的烧结体形成为第2凸块层。此外,第1导电金属和第2导电金属也可以是不同种类的金属。例如,将镍或铜的镀层作为第1凸块层,将在其上由金粉末烧结而成的烧结体形成为第2凸块层。通过选择异种金属,可以降低金等高价金属的使用量而实现基板成本的降低。
此外,第1凸块层相对于凸块整体的高度的比值优选为0.1~0.9。这是为了确保凸块的刚性的同时发挥第2凸块层的作用。第1凸块层相对于凸块整体的高度的比值更优选为0.5~0.9。
然后,当各凸块层使用异种金属时,在第1凸块层和第2凸块层之间较好至少设有一层用于提高两层的密合性的块状的中间层。由此,可以抑制在异种金属接合时可能导致的密合性的降低(两凸块层的剥离)。例如,将铜镀层作为第1凸块层,在其上镀金形成中间层,其后将金粉末烧结后的烧结体形成为第2凸块层。这些块状的中间层优选通过镀敷(电解镀、非电解镀)、溅射、CVD法等形成。作为构成中间层的金属必须是导电金属,优选金、银、铂、钯、钛、铬、铜和镍。
另外,为了使密合性进一步提高,中间层也可设置多层,形成由多种金属构成的多层的中间层。而且,优选至少中间层的与第2凸块层接触的面采用与第2导电金属相同的导电金属。因而,中间层为单层时整体由第2导电金属构成;对于多层的中间层,优选最上层由第2导电金属构成。此外,中间层的厚度从整体来看优选为5~1000nm。中间层的目的是为了确保密合性,不需要太厚。
本发明的凸块的制造方法包括通过镀敷法、溅射法和CVD法中的任一种方法在基板上形成第1凸块层的工序;涂布含有纯度为99.9重量%以上、平均粒径为0.005μm~1.0μm的第2导电金属的粉末的金属糊,使所述金属糊干燥后在70~320℃的温度下加热烧结而在所述第1凸块层上形成第2凸块层的工序。
对于用于形成第1凸块层的镀敷法、溅射法、CVD法的条件无特别限定,对于这些方法可以使用一般的用于形成凸块的条件和方法。
另一方面,用于形成第2凸块层的金属糊是将上述特性的金属粉末分散在合适的分散介质中而得的浆料。使用金属糊是为了确保金属粉末的操作性。对于金属糊中的金属粉(第2导电金属),将纯度定为99.9重量%以上、平均粒径定为0.005μm~1.0μm的理由如上所述。
作为分散金属粉末的分散介质,通常使用有机溶剂,可例举例如酯醇、萜品醇、松油、丁基卡必醇乙酸酯、丁基卡必醇、卡必醇等。例如作为优选的酯醇系的有机溶剂,可例举异丁酸-2,2,4-三甲基-3-羟基戊酯(2,2,4-トリメチル-3-ヒドロキシペンタイソブチレ一ト:C12H24O3)。这是因为这些溶剂可以在比较低的温度下干燥。
另外,该金属糊也可以含有一种以上的选自丙烯酸系树脂、纤维素系树脂、醇酸树脂的树脂作为添加剂。加入这些树脂等时,可以防止金属糊中的金属粉的凝集,从而变得更为均质。另外,作为丙烯酸系树脂可例举甲基丙烯酸甲酯聚合物,作为纤维素系树脂可例举乙基纤维素,作为醇酸树脂可例举邻苯二甲酸酐树脂。而且,其中特别优选乙基纤维素。
作为在基板上涂布金属糊的方法,可以使用旋涂法、丝网印刷法、喷墨法、将糊料滴下后用刮片等扩散的方法等,可根据目标凸块的尺寸或图案对应地采用各种方法。
将涂布的金属糊干燥是为了将糊料中的有机溶剂除去。该干燥优选在-20℃以上5℃以下进行。也可以将干燥工序的气氛形成为减压气氛。藉此可以防止干燥过程大气中的水分在金属粉末表面结露。形成为减压气氛时,优选为100Pa以下、更加优选10Pa以下,可根据金属糊中的有机溶剂的挥发性来设定该气氛的真空度。
将金属糊干燥后,通过烧结获得糊料中的金属粒子间以及第1凸块层的表面和金属粒子间形成为彼此点接触的近接状态的烧结体。烧结温度取决于构成第1凸块层的金属(第1导电金属)的种类,一般在70~320℃的范围内。在低于70℃时烧结不完全,不能耐受作为凸块的使用。此外,本发明的凸块的第1凸块层和第2凸块层间必须具备规定的杨氏模量比值。这是因为当低于下限温度时,第2凸块层过于柔软而不能获得合适的杨氏模量,接合时第2凸块层的变形明显而会产生作为凸块的形状方面的问题;此外,当超过上限值的温度时,第2凸块层变得过于坚硬而不能确保合适的杨氏模量比值,接合时第1凸块层有发生变形的可能。而且,作为与第1凸块层的构成金属对应的烧结温度的具体的范围,第1凸块层为金时设为70~300℃、为铜时设为80~300℃、为镍时设为90~320℃。像这样根据第1凸块层的构成金属来调整烧结温度是因为考虑到了块状体的各金属的杨氏模量的差异。并且,烧结时的加热时间优选为10~60分钟。这是因为短时间内烧结炉的温度不稳定而不能进行充分的烧结;另外,时间过长时会影响到生产效率。该烧结较好在无加压的条件下进行。
并且,在形成以上的第1和第2凸块层之前,也可以利用光致抗蚀剂进行图案的形成。使用光致抗蚀剂是形成精细图案时常用的方法。此外,在采用这样的抗蚀剂形成凸块图案时,可设置多个烧结工序。例如,也可以向经曝光而形成的孔(图案)中填充金属糊,首先在较低的温度(80~100℃)下烧结后,将抗蚀剂剥离,然后在较高的温度(200~300℃)下进行再烧结。该2阶段的烧结是为保护抗蚀剂而在低温下进行预烧结、除去抗蚀剂后再进行正式的烧结,这对形成坚固的凸块是有效的。
此外,在形成具有上述中间层的凸块时,通过镀敷等形成第1凸块层后,还包括形成中间层的工序。该中间层的形成方法可以采用镀敷、溅射、CVD等,优选镀敷,特别优选非电解镀。这是由于可以低成本制得较薄的薄膜。
使用形成有本发明的凸块的基板通过倒装法将所述基板安装到对向基板上的方法是在至少加热第2凸块层的同时从所述基板的一个方向或者两个方向加压使凸块接合的方法。作为本发明的凸块的第2凸块层的烧结体是通过被加压使得接触部发生塑性变形的同时在其变形界面发生金属原子间的结合而形成致密的接合部。该加压可以从一个方向进行,也可以从两个方向进行。并且,为了使接合部变得致密,加压时的压力优选大于烧结体的屈服强度。
而且,在进行该接合工序时,必须在至少加热烧结体的同时进行加压。这是因为不加热的情况下,接合部的致密化会不充分,无法获得足够的接合强度。此时的加热温度优选为70~300℃。这是因为低于70℃不能进行接合,而超过300℃则冷却时的热应变的影响会变大。
此外,在该接合工序中,在加热以外还可施加超声波。通过加热或者加热与超声波的组合,可以促进金属粉末的塑性变形及结合,还可以降低加热温度。但是,当凸块的尺寸极微小时,由于振动会导致凸块整体变形,所以对于以间隔幅度较窄的图案形成的微小的凸块,较好是不施加超声波而仅用加热进行接合。施加超声波时,其条件优选振幅为0.5~5μm,施加时间为0.5~3秒。这是因为施加过大的超声波会损坏整个凸块。
接合工序中的上述加热及超声波的施加根据其目的可以是至少对作为第2凸块层的烧结体实施,也可以对凸块整体实施。作为加热方法,除在规定温度的气氛炉中进行加压外,也可以对接合时装载基板(或者对向基板)的载置台进行加热以利用此时的传热。同样地,超声波的施加可以简单地通过从载置台使超声波振荡而进行。
如上所述,通过使用本发明的凸块,无需考虑凸块高度的不均匀就能够通过倒装法进行电路安装。此时的凸块的接合可在低压下进行。
附图说明
图1是简单地说明本实施方式的凸块形成工序的图。
图2是表示本实施方式制得的凸块的外观的SEM照片。
图3是表示本实施方式制得的凸块的外观的SEM照片(放大)。
图4是说明第1及第2凸块层的杨氏模量测定方法的图。
具体实施方式
以下,对本发明的形成凸块的优选实施方式进行说明。在本实施方式中,首先对形成第2凸块层的金属粉末的粒径、烧结条件与烧结后的凸块层的强度之间的关系进行了研究。该研究如下进行:由作为第2导电金属的各金属(金、银)的粒径不同的金属粉末制得多种金属糊,将该金属糊涂布后进行烧结,并评价其强度。金属糊使用的是将由湿式还原法制得的粒径为0.005、0.3、1.0、2.0μm的金属粉末(纯度99.99重量%)与作为有机溶剂的酯醇混合而获得的混合物。然后,将该金属糊涂布在利用抗蚀剂形成了孔的基板(Si/Au镀层)上,进行真空干燥(5℃)。以230℃作为烧结温度使其烧结,之后将抗蚀剂除去,测定杨氏模量。杨氏模量的测定如下进行:对所形成的凸块进行剪切试验,制作应力—应变曲线,求出该曲线的直线部分的斜率。由各种金属糊制得的凸块的杨氏模量示于表1。
[表1]
根据表1,金属粉末的粒径为0.005~1.0μm的金属粉末的杨氏模量比较稳定,与此相对,粒径为2.0μm的金属粉末的杨氏模量明显降低。由由2.0μm的金属粉末实际制得的凸块虽然在形状上暂时保持了立体的状态,但容易倒坍。这被认为是由于烧结温度过低,烧结不充分而导致的。此外,粒径为0.005μm的金属粉末,虽然在烧结后的强度方面没有问题,但是糊料状态的凝集严重,在将要使用之前需要进行充分的搅拌。因此,考虑到操作性,粒径小于该值的金属粉末的糊料并不理想。
接着,对烧结时烧结温度的合适范围进行了研究。使用各金属的粒径为0.3μm的金属糊,以60~340℃的烧结温度形成凸块,测定其杨氏模量。凸块的形成工序和杨氏模量的测定方法与上述相同。其结果示于表2。
[表2]
根据表2,认为通过将烧结温度设为70℃以上可以得到具有实用强度的烧结体。这被认为是由于在70℃以上的烧结温度下烧结,通过颈缩(necking)的促进等可以实现致密化。并且,在低于60℃的温度时不会发生烧结,烧结工序后的凸块松散而无法保持形状。因此,为了形成具有一定强度的凸块,必须在至少70℃以上的温度下进行烧结。此外,烧结体的强度虽然在超过300℃时会急速上升,但必须基于第1凸块层的强度(杨氏模量)来设定合适的杨氏模量比值以确定烧结温度的上限。
经过以上的预备试验,进行了对本发明的2层结构的凸块的制造和评价。图1是说明本实施方式的凸块的制造工序的图。在预先由溅射法形成了Ti膜(0.5μm)及Au膜(1.0μm)的半导体晶片(材质:硅)的表面通过旋涂涂布光致抗蚀剂膜(化药微化学株式会社(化薬マイクロケム株式会社)制:AZP4903),预烘烤(100℃×120秒)后进行图案形成。图案形成在照度为2100mJ/cm2、曝光时间为150秒的照射条件下照射g线(波长436nm)而进行。用触针式膜厚计测得该基板的抗蚀剂膜厚为20μm、面内偏差为±1μm。并且,开孔直径为20μm。
对于该基板,在开孔部的内部形成了金镀层(第1凸块层)。金镀敷使用了电解镀金液(日本电镀工程株式会社(日本エレクトロプレイテイングエンジニヤ一ズ株式会社)制:テンペレツクス209A)。形成了高10μm的金镀层。
接着,在光致抗蚀层的表面滴下作为金属糊的金糊料,通过旋涂法将金糊料填充在开孔内。此处使用的金糊料是将纯度为99.99重量%的金粉(平均粒径:0.3μm)和作为有机溶剂的酯醇(异丁酸-2,2,4-三甲基-3-羟基戊酯(C12H24O3))混合而制得的混合物。涂布糊料后,将其用干燥器于+5℃下真空干燥。
然后,用刮刀将多余的金属糊除去,将半导体晶片放入电炉使金粉烧结(烧结温度设为80℃、30分钟)。其后,将半导体晶片浸渍于丙酮中把抗蚀剂剥离掉,使其于230℃再烧结30分钟。
图2、3是表示本实施方式制得的凸块的外观的SEM照片。根据该照片可知,由本实施例制得的凸块具有在金镀层(第1凸块层)上冠有粉末烧结体(第2凸块层)的形态,在凸块间无桥接形成且是整齐排列的形状。
此外,对于制得的凸块的第1凸块层和第2凸块层,分别进行了杨氏模量的测定。杨氏模量的测定如下进行:实施图4所示的剪切试验,制作应力—应变曲线,求出该曲线的直线部分的斜率。
使用以上制得的形成有凸块图案的硅晶片进行接合试验。该研究如下进行:将由溅射法形成了Ti膜(0.5μm)及Au膜(1.0μm)的玻璃基板作为对向基板,使该对向基板的Au膜面与硅晶片的凸块形成面对向接合。在接合时,把玻璃基板载置在加热至230℃的加热台上,加压10分钟负荷热和压力以使每个凸块负载0.015N的压力。
以上的凸块形成·接合试验是以金(镀敷)为第1凸块层、以金(烧结)为第2凸块层。在本实施方式中,通过与上述相同的步骤,改变第1、第2凸块层的金属,并调整第2凸块层的烧结温度来进行凸块形成及接合试验,并研究了两凸块层的杨氏模量比值与接合性之间的关系。其结果示于表3~表7。
[表3]
○:第1凸块层无变形、第2凸块层无异常变形的良好的接合
×:第1凸块层发生变形、凸块整体变形
[表4]
○:第1凸块层无变形、第2凸块层无异常变形的良好的接合
×:*1:第2凸块层向横向过度变形、以挤出状态接合
*2:第1凸块层发生变形、凸块整体变形
[表5]
○:第1凸块层无变形、第2凸块层无异常变形的良好的接合
×:*1:第2凸块层向横向过度变形、以挤出状态接合
*2:第1凸块层发生变形、凸块整体变形
[表6]
○:第1凸块层无变形、第2凸块层无异常变形的良好的接合
×:第1凸块层发生变形、凸块整体变形
[表7]
○:第1凸块层无变形、第2凸块层无异常变形的良好的接合
×:*1:第2凸块层向横向过度变形、以挤出状态接合
*2:第1凸块层发生变形、凸块整体变形
[表8]
○:第1凸块层无变形、第2凸块层无异常变形的良好的接合
×:*1:第2凸块层向横向过度变形、以挤出状态接合
*2:第1凸块层发生变形、凸块整体变形
在以上的各种金属的组合中,为了制成接合性良好的制品,第1、第2凸块层的强度(杨氏模量)的比值很重要,必须使所采用的任何金属的杨氏模量的比值都在0.1~0.4的范围内。此外,由于金、铜、镍的块状体的强度有差异,所以当第1凸块层是由这些金属构成时,最好对形成第2凸块层的烧结体的烧结温度范围进行适当调整。
另外,通过上述倒装法进行晶片接合后,为了确认各凸块的接合状态(稳定性),在室温下对邻近的凸块接合部间的导通进行了测定,结果电阻为1.5±0.1Ω。作为与此相对的比较,作为现有例,通过金镀敷形成整个凸块,并进行了同样的评价。凸块的形成使用与本实施方式相同的电解金镀液,调整镀敷时间,在抗蚀剂的整个开孔中形成镀层。然后,与本实施方式相同,除去抗蚀剂形成凸块,但凸块的高度为20μm±2μm。
此外,对于具有该镀敷凸块的硅晶片,进行了与本实施方式相同的接合试验。接合后,在室温下对邻近的凸块接合部间的导通进行了测定,但没有实现所有端子的导通。并且,实现导通的部位的电阻为2.1±0.6Ω。将本实施方式和比较例对比可知,比较例明显地不具有良好的导通稳定性。即,本实施方式中所有端子实现了导通,并且电阻值较低,其偏差也小。在具有由比较例的镀敷形成的凸块的基板上由于凸块的高度的不均匀而导致的各凸块的接合状态不均一造成了上述差异。于是,为了消除这种情况,也考虑到了增加接合时的压力,但这样可能会对基板产生不良影响。因此,根据该对比可知,本发明可以用对现有技术来讲不足够的低压力来实现接合。
产业上的利用可能性
本发明的双重结构的凸块在用倒装法接合时可以消除因凸块高度的不均匀而产生的问题。使用了本发明的基板的安装方法适于制造期望高集成化的各种半导体电路。
Claims (9)
1.一种凸块,该凸块以规定图案形成于基板上、由导电金属构成,其特征在于,具有由第1凸块层和第2凸块层构成的2层结构,其中,第1凸块层形成于基板上,由金、铜和镍中的任一种的第1导电金属的块状体构成,第2凸块层形成于所述第1凸块层上,由金和银中的任一种的第2导电金属的粉末的烧结体构成;构成所述第1凸块层的块状体通过镀敷法、溅射法和CVD法中的任一种方法形成;构成所述第2凸块层的烧结体由纯度为99.9重量%以上、平均粒径为0.005μm~1.0μm的第2导电金属构成的金属粉末烧结形成;所述第2凸块层的杨氏模量是所述第1凸块层的杨氏模量的0.1~0.4倍。
2.如权利要求1所述的凸块,其特征在于,第1凸块层相对于凸块整体的高度的比值为0.1~0.9。
3.如权利要求1或2所述的凸块,其特征在于,第1导电金属和第2导电金属是不同种类的金属,在第1凸块层和第2凸块层之间至少设有一层用于提高密合性的块状的中间层。
4.如权利要求3所述的凸块,其特征在于,至少中间层的与第2凸块层接触的面由与第2导电金属相同的导电金属构成。
5.权利要求1~4中任一项所述的凸块的制造方法,其特征在于,包括通过镀敷法、溅射法和CVD法中的任一种方法在基板上形成第1凸块层的工序;和涂布含有纯度为99.9重量%以上、平均粒径为0.005μm~1.0μm的第2导电金属的粉末的金属糊,使所述金属糊干燥后以70~320℃的烧结温度加热烧结,在所述第1凸块层上形成第2凸块层的工序。
6.如权利要求5所述的凸块的制造方法,其特征在于,在形成第1凸块层后,包括至少一次形成中间层的工序。
7.一种将凸块接合的方法,该方法为使用形成有权利要求1~4中任一项所述的凸块的基板通过倒装法将所述基板安装到对向基板上的方法,其特征在于,在至少加热第2凸块层的同时从所述基板的一个方向或者两个方向加压使凸块接合。
8.如权利要求7所述的方法,其特征在于,接合时的加热温度为70~300℃。
9.如权利要求7或8所述的方法,其特征在于,还至少对第2凸块层施加超声波进行加压。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009053085A JP5363839B2 (ja) | 2008-05-12 | 2009-03-06 | バンプ及び該バンプの形成方法並びに該バンプが形成された基板の実装方法 |
JP2009-053085 | 2009-03-06 | ||
PCT/JP2010/053615 WO2010101236A1 (ja) | 2009-03-06 | 2010-03-05 | バンプ及び該バンプの形成方法並びに該バンプが形成された基板の実装方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102318052A true CN102318052A (zh) | 2012-01-11 |
CN102318052B CN102318052B (zh) | 2016-11-30 |
Family
ID=
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5641996A (en) * | 1995-01-30 | 1997-06-24 | Matsushita Electric Industrial Co., Ltd. | Semiconductor unit package, semiconductor unit packaging method, and encapsulant for use in semiconductor unit packaging |
JP2005216508A (ja) * | 2004-01-27 | 2005-08-11 | Tanaka Kikinzoku Kogyo Kk | 金属ペーストおよび当該金属ペーストを用いた半導体ウェハーへのバンプの形成方法 |
CN1717156A (zh) * | 2004-06-29 | 2006-01-04 | 株式会社日立制作所 | 电子部件的安装方法、半导体模块及半导体器件 |
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5641996A (en) * | 1995-01-30 | 1997-06-24 | Matsushita Electric Industrial Co., Ltd. | Semiconductor unit package, semiconductor unit packaging method, and encapsulant for use in semiconductor unit packaging |
JP2005216508A (ja) * | 2004-01-27 | 2005-08-11 | Tanaka Kikinzoku Kogyo Kk | 金属ペーストおよび当該金属ペーストを用いた半導体ウェハーへのバンプの形成方法 |
CN1717156A (zh) * | 2004-06-29 | 2006-01-04 | 株式会社日立制作所 | 电子部件的安装方法、半导体模块及半导体器件 |
Also Published As
Publication number | Publication date |
---|---|
EP2405474A4 (en) | 2015-05-27 |
JP5363839B2 (ja) | 2013-12-11 |
EP2405474A1 (en) | 2012-01-11 |
KR101650219B1 (ko) | 2016-08-30 |
JP2009302511A (ja) | 2009-12-24 |
US20110272802A1 (en) | 2011-11-10 |
US8492894B2 (en) | 2013-07-23 |
KR20110132428A (ko) | 2011-12-07 |
US8962471B2 (en) | 2015-02-24 |
WO2010101236A1 (ja) | 2010-09-10 |
US20140295619A1 (en) | 2014-10-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8962471B2 (en) | Bump, method for forming the bump, and method for mounting substrate having the bump thereon | |
US8704366B2 (en) | Ultra thin bumped wafer with under-film | |
KR101655638B1 (ko) | 금속 배선 형성용 전사 기판 및 상기 전사용 기판에 의한 금속 배선의 형성 방법 | |
CN101587872B (zh) | 半导体装置、半导体装置安装方法和半导体装置安装结构 | |
CN103262227B (zh) | 金属布线形成用转印基板及采用上述转印用基板的金属布线的形成方法 | |
WO2007137568A1 (de) | Flip-chip-bauelement und verfahren zur herstellung | |
JPH04234139A (ja) | 半導体チップの基板への直接取付け法 | |
CN102034768B (zh) | 具有晶粒埋入式以及双面覆盖重增层的基板结构及其方法 | |
EP3070738B1 (en) | Through electrode and method for producing multilayer substrate using through electrode | |
US9666751B2 (en) | Method for producing an electrically conductive contact on a solar cell | |
CN104205312A (zh) | 芯片接合用导电性糊及利用该导电性糊的芯片接合方法 | |
US20190131029A1 (en) | Conductive paste for bonding and manufacturing method of electric device using thereof | |
US20110186966A1 (en) | Gaas integrated circuit device and method of attaching same | |
JPH1041694A (ja) | 半導体素子の基板実装構造及びその実装方法 | |
CN107567651A (zh) | 制造方法以及具有贯通电极的布线基板 | |
CN1151547C (zh) | 半导体装置制造方法 | |
CN102318052B (zh) | 凸块及该凸块的形成方法以及形成有该凸块的基板的安装方法 | |
TW202242910A (zh) | 接合構造體 | |
CN101625984B (zh) | 树脂铸模型电子零件的制造方法 | |
WO2000057467A1 (fr) | Procede de fabrication de puces de circuits integres | |
US6864575B2 (en) | Electronic interface structures and methods | |
CN103444274B (zh) | 焊料转印基材、焊料转印基材的制造方法、以及焊料转印方法 | |
JPS63283144A (ja) | 半導体素子用バンプ | |
JPH03296240A (ja) | 半導体実装基板 | |
CN103943583A (zh) | 叠层芯片的晶圆级凸块圆片级封装架构 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |