CN102299173A - Superstructural longitudinal double-diffusion N-type metal oxide semiconductor tube - Google Patents
Superstructural longitudinal double-diffusion N-type metal oxide semiconductor tube Download PDFInfo
- Publication number
- CN102299173A CN102299173A CN2011102552686A CN201110255268A CN102299173A CN 102299173 A CN102299173 A CN 102299173A CN 2011102552686 A CN2011102552686 A CN 2011102552686A CN 201110255268 A CN201110255268 A CN 201110255268A CN 102299173 A CN102299173 A CN 102299173A
- Authority
- CN
- China
- Prior art keywords
- type
- doped semiconductor
- type heavily
- region
- doped
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses a superstructural longitudinal double-diffusion N-type metal oxide semiconductor tube. The superstructural longitudinal double-diffusion N-type metal oxide semiconductor tube comprises one or more tube units, wherein the tube unit comprises a drain metal; a heavily doped N-type silicon substrate which is used as a drain region is arranged on the drain metal; an N-type doped epitaxial layer is arranged on the silicon substrate; a P-type doped columnar semiconductor region is arranged in the epitaxial layer; a P-type doped semiconductor body region is arranged on the columnar semiconductor; an N-type heavily doped semiconductor source region and a P-type heavily doped semiconductor contact region are arranged in the body region; the P-type heavily doped semiconductor contact region is cross-shaped; and the cross-shaped P-type heavily doped semiconductor contact region divides the N-type heavily doped semiconductor source region into four blocks which are disconnected from one another. In the structure, the opening possibility of a parasitic triode is reduced without affecting the on-resistance performance of an apparatus and increasing manufacturing steps of a process and the degree of difficulty, so that the avalanche tolerance of the apparatus is improved and the reliability of the apparatus when the apparatus works in a severe weather is further ensured.
Description
Technical field
The present invention relates to the power semiconductor field, specifically, relate to a kind of silicon system high pressure ultra-junction longitudinal double diffusion N type metal oxide semiconductor field-effect transistor.
Background technology
At present, power device in the application in fields such as daily life, production more and more widely, power metal oxide semiconductor field-effect transistor particularly, because they have switching speed, less drive current, the safety operation area of broad faster, therefore be subjected to numerous researchers' favor.Quasi-representative at power metal oxide semiconductor field-effect transistor is used---in brushless electric machine, motor driven and the automotive electronics, drive the load major part and be perception, and device can be operated under the non-clamp inductive switch condition inevitably in some topological structure, thereby brings the possibility of the state that is operated in snowslide.On the other hand, with the increase with switching frequency of reducing of chip area, the power density that is applied on the power device is increasing, thereby also increasing to power device snowslide durability requirement.Therefore, snowslide durability has become the important leverage of power device reliably working in system.At present, the one of the main reasons that the power device snowslide was lost efficacy is the parasitic triode unlatching, and then second breakdown.When the snowslide hole current enters P type tagma and N type source region when below of flowing through, be equivalent to form pressure drop on the base resistance of parasitic triode, if this pressure drop greater than the cut-in voltage of PN junction, then parasitic triode conducting, thus cause the device second breakdown easily.
Yet, with reference to Fig. 7, N type source region and P type body contact zone are the stripe shape domain in the tradition ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe, hole current can only be from the P type body contact zone process of below, N type source region, with reference to Fig. 8, make pressure drop between P type body contact zone and the N type source region reach the cut-in voltage of parasitic triode easily, lost efficacy then.The method of traditional snowslide durability of improving power metal oxide semiconductor field-effect transistor only is applicable to low current density; When current density further improves, still can cause the parasitic triode conducting of power metal oxide semiconductor field-effect transistor inside.The present invention promptly is a kind of ultra-junction longitudinal double-diffused metal oxide semiconductor field-effect transistor structure that proposes to improve semiconductor device snowslide durability at this problem.
Summary of the invention
The present invention is directed to the deficiencies in the prior art, a kind of ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe is proposed, this structure can not influence the break-over of device resistive performance and not increase on the basis of technology manufacturing step and degree of difficulty, reduce the possibility that parasitic triode is opened, thereby improve the avalanche capability of device, guaranteed that further device is operated in the reliability under the mal-condition.
For realizing above purpose, the present invention adopts following technical scheme:
A kind of ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe, comprise one or more pipe unit, described pipe unit comprises: drain metal, on drain metal, be provided with heavy doping N type silicon substrate as the drain region, on heavy doping N type silicon substrate, be provided with N type doped epitaxial layer, in N type doped epitaxial layer, be provided with a row P type doping column semiconductor region, on P type doping column semiconductor region, be provided with P type doped semiconductor tagma, and P type doped semiconductor body district is positioned at N type doped epitaxial layer, in P type doped semiconductor tagma, be provided with N type heavily-doped semiconductor source region and P type heavily-doped semiconductor contact zone, N type doped epitaxial layer surf zone beyond N type heavily-doped semiconductor source region and P type heavily-doped semiconductor contact zone is provided with gate oxide, above gate oxide, be provided with polysilicon gate, above polysilicon gate, reach both sides and be provided with oxide layer, on N type heavily-doped semiconductor source region and P type heavily-doped semiconductor contact zone, be connected with source metal, P type heavily-doped semiconductor contact zone presents " ten " word shape, and four mutual disconnected blocks of formation are cut apart with N type heavily-doped semiconductor source region in the P type heavily-doped semiconductor contact zone of " ten " word shape.
Compared with prior art, the present invention has following advantage:
1) with reference to Fig. 1, ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe of the present invention has adopted P type heavily-doped semiconductor contact zone, be that P type heavily-doped semiconductor contact zone presents " ten " word shape, and four mutual disconnected blocks are cut apart with N type heavily-doped semiconductor source region in the P type heavily-doped semiconductor contact zone of " ten " word shape, with reference to Fig. 6, the hole current major part is from the P type heavily-doped semiconductor contact zone process of " ten " word shape during structure operate as normal of the present invention, provide the path of more releasing with respect to traditional structure, thereby the electric current of the below, N type heavily-doped semiconductor source region that reduced to flow through has been avoided the unlatching of parasitic triode.With reference to Fig. 9,7.8 * 10
-5Near the drain-source voltage of the traditional structure in place's second sharply descends, and drain-source current rises rapidly, shows that traditional structure is 7.8 * 10
-5Entered avalanche condition after second, yet structure of the present invention is 7.8 * 10
-5Drain-source voltage still maintains high voltage in a very long time after second, and drain-source current still keeps downward trend, shows that structure of the present invention is 7.8 * 10
-5Still can operate as normal in time after second and do not enter avalanche condition, prove absolutely that the avalanche capability of structure of the present invention is significantly improved.
2) with reference to Fig. 1, by suitably adjusting the width W 2 of P type heavily-doped semiconductor contact, during forward conduction, the path of electronic current still can diffuse in the whole N type doped epitaxial layer in this structure, with reference to Figure 10, can not produce harmful effect to the conducting resistance of structure.
3) other ultra-junction longitudinal double diffusions N type metal oxide semiconductor pipe adopts energetic ion to inject and forms a very dark P type heavily-doped semiconductor contact, reduce the hole current of below, N type heavily-doped semiconductor source region of flowing through, and then improved the snowslide durability of device.Yet dark P type heavily-doped semiconductor contact causes the more serious or punch-through breakdown of charge unbalance degree of ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe easily, thereby has reduced the puncture voltage of device.Structure of the present invention is improved from the domain of P type heavily-doped semiconductor contact, with reference to Figure 11 (the correlation curve schematic diagram of traditional structure and structure puncture voltage of the present invention), the withstand voltage properties of device is not had harmful effect.
Description of drawings
Fig. 1 is the 3 D stereo cross-sectional view of ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe of the present invention.
Fig. 2 is the device profile structure chart of AA' section in the 3 D stereo profile of the ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe of the present invention among Fig. 1.
Fig. 3 is the device profile structure chart of BB' section in the 3 D stereo profile of the ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe of the present invention among Fig. 1.
Fig. 4 is the device profile structure chart of CC' section in the profile of the ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe of the present invention among Fig. 1.
Fig. 5 is the device profile structure chart of DD' section in the profile of the ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe of the present invention among Fig. 1
Hole current distribution map when Fig. 6 is a ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe normal operating conditions of the present invention.
Fig. 7 is the 3 D stereo profile of traditional ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe.
Fig. 8 is the schematic diagram of the parasitic triode in the dashed rectangle in the 3 D stereo profile of the traditional ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe among Fig. 7.
Fig. 9 is the snowslide durability line comparison diagram of the present invention and traditional structure.
I-v curve comparison diagram when Figure 10 is the conducting of the present invention and traditional structure.
Figure 11 is the reverse breakdown curve comparison diagram of the present invention and traditional structure.
Number in the figure explanation: 1. drain metal, 2. heavy doping N type silicon substrate, 3.N the type doped epitaxial layer, 4.P type doping column semiconductor region, 5.P type doped semiconductor tagma, 6.N type heavily-doped semiconductor source region, 7.P type heavily-doped semiconductor contact zone, 8. gate oxide, 9. polysilicon gate, 10. oxide layer, 11. source metals.
Embodiment
Referring to figs. 1 through Fig. 5, a kind of ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe, comprise one or more pipe unit, described pipe unit comprises: drain metal 1, on drain metal 1, be provided with heavy doping N type silicon substrate 2 as the drain region, on heavy doping N type silicon substrate 2, be provided with N type doped epitaxial layer 3, in N type doped epitaxial layer 3, be provided with a row P type doping column semiconductor region 4, on P type doping column semiconductor region 4, be provided with P type doped semiconductor tagma 5, and P type doped semiconductor tagma 5 is positioned at N type doped epitaxial layer 3, in P type doped semiconductor tagma 5, be provided with N type heavily-doped semiconductor source region 6 and P type heavily-doped semiconductor contact zone 7, N type doped epitaxial layer 3 surf zones beyond N type heavily-doped semiconductor source region 6 and P type heavily-doped semiconductor contact zone 7 are provided with gate oxide 8, above gate oxide 8, be provided with polysilicon gate 9, above polysilicon gate 9, reach both sides and be provided with oxide layer 10, on N type heavily-doped semiconductor source region 6 and P type heavily-doped semiconductor contact zone 7, be connected with source metal 11
P type heavily-doped semiconductor contact zone 7 presents " ten " word shape, and four mutual disconnected blocks of formation are cut apart with N type heavily-doped semiconductor source region 6 in " ten " word shape P type heavily-doped semiconductor contact zone 7.
Also adopt following technical measures further to improve performance of the present invention in the present embodiment:
The P type heavily-doped semiconductor contact zone 7 of " ten " word shape is cut apart N type heavily-doped semiconductor source region 6 and is formed four mutual disconnected blocks, and measure-alike between the block.
With reference to Fig. 1, the width W 1 of " ten " word shape P type heavily-doped semiconductor contact zone 7 long axis directions and the width W 2 of short-axis direction are all adjustable, to obtain different snowslide durability and current handling capability.
P type heavily-doped semiconductor contact zone 7 sinks into the degree of depth in the P type doped semiconductor tagma 5 greater than the degree of depth of sinking into N type heavily-doped semiconductor source region 6.
With reference to Figure 10, after having used the P type heavily-doped semiconductor contact zone 7 among the present invention, the ON state current ability of device, just the conducting resistance of device is not compared not reduction with traditional structure.
The present invention can adopt following method to prepare:
1, selects the substrate of a heavy doping N type silicon chip as device, epitaxial growth one deck light dope N type epitaxial loayer on heavy doping N type substrate then.
2, inject the boron ion then on the surface, and annealing pushes away trap, formation P type tagma.
3, on N type epitaxial loayer, adopt the deep trouth corrosion technology to carry out cutting, fill P type silicon then, and carry out chemico-mechanical polishing, form P type post.
4, the growth field oxide etches active area, the regrowth gate oxide.
5, deposit polysilicon and etching form polysilicon gate.
6, phosphonium ion injects and forms N type source region, injects the boron ion then and forms P type body contact zone.
7, carry out surface passivation then, and carve contact hole,, form drain metal and source metal at last at tow sides deposit aluminium all.
Claims (3)
1. ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe, comprise one or more pipe unit, described pipe unit comprises: drain metal (1), on drain metal (1), be provided with heavy doping N type silicon substrate (2) as the drain region, on heavy doping N type silicon substrate (2), be provided with N type doped epitaxial layer (3), in N type doped epitaxial layer (3), be provided with row's P type doping column semiconductor region (4), on P type doping column semiconductor region (4), be provided with P type doped semiconductor tagma (5), and P type doped semiconductor tagma (5) is positioned at N type doped epitaxial layer (3), in P type doped semiconductor tagma (5), be provided with N type heavily-doped semiconductor source region (6) and P type heavily-doped semiconductor contact zone (7), be provided with gate oxide (8) in N type heavily-doped semiconductor source region (6) and P type heavily-doped semiconductor contact zone (7) N type doped epitaxial layer (3) surf zone in addition, be provided with polysilicon gate (9) in gate oxide (8) top, top and both sides at polysilicon gate (9) are provided with oxide layer (10), on N type heavily-doped semiconductor source region (6) and P type heavily-doped semiconductor contact zone (7), be connected with source metal (11)
It is characterized in that P type heavily-doped semiconductor contact zone (7) presents " ten " word shape, and four mutual disconnected blocks of formation are cut apart with N type heavily-doped semiconductor source region (6) in the P type heavily-doped semiconductor contact zone (7) of " ten " word shape.
2. ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe according to claim 1, it is characterized in that shape and the size of being cut apart four mutual disconnected blocks that N type heavily-doped semiconductor source region (6) forms by the P type heavily-doped semiconductor contact zone (7) of " ten " word shape are identical.
3. ultra-junction longitudinal double diffusion N type metal oxide semiconductor pipe according to claim 1, it is characterized in that P type heavily-doped semiconductor contact zone (7) sinks into the interior degree of depth in P type doped semiconductor tagma (5) greater than the degree of depth of sinking in the N type heavily-doped semiconductor source region (6).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110255268 CN102299173B (en) | 2011-09-01 | 2011-09-01 | Superstructural longitudinal double-diffusion N-type metal oxide semiconductor tube |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110255268 CN102299173B (en) | 2011-09-01 | 2011-09-01 | Superstructural longitudinal double-diffusion N-type metal oxide semiconductor tube |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102299173A true CN102299173A (en) | 2011-12-28 |
| CN102299173B CN102299173B (en) | 2013-03-20 |
Family
ID=45359468
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201110255268 Active CN102299173B (en) | 2011-09-01 | 2011-09-01 | Superstructural longitudinal double-diffusion N-type metal oxide semiconductor tube |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102299173B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102646711A (en) * | 2012-04-06 | 2012-08-22 | 东南大学 | Super junction vertical double-diffused metal-oxide semiconductor field-effect transistor with P-type buried layer |
| CN107424997A (en) * | 2017-08-07 | 2017-12-01 | 电子科技大学 | A kind of super-junction MOSFET device with protection ring |
| CN113314613A (en) * | 2021-05-31 | 2021-08-27 | 电子科技大学 | Silicon carbide MOSFET device with avalanche charge transition buffer layer and preparation method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0668616B1 (en) * | 1994-02-21 | 2001-10-17 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate semiconductor device and manufacturing method thereof |
| CN101510561A (en) * | 2009-03-30 | 2009-08-19 | 东南大学 | Ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube |
| CN101552291A (en) * | 2009-03-30 | 2009-10-07 | 东南大学 | Semiconductor tube of hyperconjugation longitudinal double diffusion metal oxide with N channels |
| CN201681941U (en) * | 2010-02-10 | 2010-12-22 | 扬州国宇电子有限公司 | N-channel medium-pressure large-current VDMOS device structure |
| CN201749852U (en) * | 2010-08-27 | 2011-02-16 | 东南大学 | Fast ultra-junction longitudinal double diffusion metal oxide semiconductor tube |
-
2011
- 2011-09-01 CN CN 201110255268 patent/CN102299173B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0668616B1 (en) * | 1994-02-21 | 2001-10-17 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate semiconductor device and manufacturing method thereof |
| CN101510561A (en) * | 2009-03-30 | 2009-08-19 | 东南大学 | Ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube |
| CN101552291A (en) * | 2009-03-30 | 2009-10-07 | 东南大学 | Semiconductor tube of hyperconjugation longitudinal double diffusion metal oxide with N channels |
| CN201681941U (en) * | 2010-02-10 | 2010-12-22 | 扬州国宇电子有限公司 | N-channel medium-pressure large-current VDMOS device structure |
| CN201749852U (en) * | 2010-08-27 | 2011-02-16 | 东南大学 | Fast ultra-junction longitudinal double diffusion metal oxide semiconductor tube |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102646711A (en) * | 2012-04-06 | 2012-08-22 | 东南大学 | Super junction vertical double-diffused metal-oxide semiconductor field-effect transistor with P-type buried layer |
| CN102646711B (en) * | 2012-04-06 | 2014-08-27 | 东南大学 | Super junction vertical double-diffused metal-oxide semiconductor field-effect transistor with P-type buried layer |
| CN107424997A (en) * | 2017-08-07 | 2017-12-01 | 电子科技大学 | A kind of super-junction MOSFET device with protection ring |
| CN107424997B (en) * | 2017-08-07 | 2019-08-02 | 电子科技大学 | A kind of super-junction MOSFET device with protection ring |
| CN113314613A (en) * | 2021-05-31 | 2021-08-27 | 电子科技大学 | Silicon carbide MOSFET device with avalanche charge transition buffer layer and preparation method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102299173B (en) | 2013-03-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101969073B (en) | Rapid superjunction longitudinal double-diffusion metal oxide semiconductor transistor | |
| CN102610643B (en) | Trench MOSFET device | |
| US20090140327A1 (en) | Semiconductor device and manufacturing method of the same | |
| CN102097480B (en) | N-type super-junction transverse double-diffusion metal oxide semiconductor tube | |
| CN109713041B (en) | Improved structure suitable for super junction DMOS device | |
| CN109103186B (en) | Integrated heterojunction freewheeling diode carborundum grooved gate MOSFET | |
| CN104124274A (en) | Super junction lateral double diffusion metal oxide semiconductor field effect transistor and manufacturing method thereof | |
| CN109755289B (en) | Trench type super junction power device | |
| CN106057905A (en) | Trench gate field effect transistor and manufacturing method | |
| CN102299173B (en) | Superstructural longitudinal double-diffusion N-type metal oxide semiconductor tube | |
| CN104851915A (en) | Trench-gate type compound semiconductor power VDMOS device and method for raising puncture voltage thereof | |
| CN102104026B (en) | Method for manufacturing power metal oxide semiconductor (MOS) transistor device integrated with Schottky diodes | |
| CN206976353U (en) | A kind of channel-type semiconductor device for optimizing terminal structure | |
| CN104051546A (en) | Power diode and method for manufacturing power diode | |
| CN107342325B (en) | Transverse double-diffusion metal oxide semiconductor device | |
| CN102637731A (en) | Terminal structure of channel power metal oxide semiconductor (MOS) device and manufacture method of terminal structure | |
| CN102097481B (en) | P-type super-junction transverse double-diffusion metal oxide semiconductor tube | |
| CN106960867B (en) | Insulated gate bipolar transistor device | |
| CN109256428B (en) | Fin type super junction power semiconductor transistor and manufacturing method thereof | |
| CN101393857A (en) | Method for implementing well division construction in super-high density slot type power device design | |
| CN108091567B (en) | Semi-super junction FS IEGT structure and manufacturing method thereof | |
| CN202394980U (en) | Superjunction vertical double-diffused metal oxide semiconductor tube | |
| CN103489917B (en) | A kind of vertical double-diffused MOS structure of high snow slide tolerance ability | |
| CN107425070B (en) | Half surpasses knot MOSFET with supplementary buried oxide layer | |
| CN201749852U (en) | Fast ultra-junction longitudinal double diffusion metal oxide semiconductor tube |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |