CN102237784A - Switch control circuit - Google Patents
Switch control circuit Download PDFInfo
- Publication number
- CN102237784A CN102237784A CN2010101543558A CN201010154355A CN102237784A CN 102237784 A CN102237784 A CN 102237784A CN 2010101543558 A CN2010101543558 A CN 2010101543558A CN 201010154355 A CN201010154355 A CN 201010154355A CN 102237784 A CN102237784 A CN 102237784A
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- diode
- gate fet
- isolated gate
- links
- control circuit
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Abstract
The invention discloses a switch control circuit, which comprises a PNP (Positive Negative Positive) type triode, an insulated gate field effect tube, a first diode, a second diode, a first resistor, a second resistor, a third resistor and a first capacitor, wherein the base of the PNP type triode is connected with the anode of the first diode; the emitter of the PNP type triode is connected with the cathode of the first diode; the gate of the insulated gate filed effect tube is connected with the cathode of the first diode; and the drain of the insulated gate filed effect tube is connected with the anode of the second diode. The starting speed of the switch control circuit is lowered through the first resistor and the first diode tube, and the shut-down speed of the switch control circuit is increased by using the PNP type triode.
Description
Technical field
The present invention relates to a kind of ON-OFF control circuit.
Background technology
Field effect transistor often is applied in the ON-OFF control circuit.The switch motion of desirable field effect transistor is: opening speed is slow, and closing velocity is fast.Yet the opening speed of existing isolated gate FET and closing velocity are all very fast.In addition, in ON-OFF control circuit, the closing velocity of isolated gate FET is too fast can to produce due to voltage spikes, causes electromagnetic interference.
Summary of the invention
In view of above content, be necessary to provide that a kind of opening speed is slow, closing velocity is fast, and can not cause the ON-OFF control circuit of electromagnetic interference.
A kind of ON-OFF control circuit comprises:
One first resistance;
One first diode, its anode links to each other with a control chip by described first resistance, and described control chip is used to export a high level signal or a low level signal;
One positive-negative-positive triode, its base stage links to each other with the anode of described first diode, and emitter links to each other grounded collector with the negative electrode of described first diode;
One second resistance;
One isolated gate FET, its grid links to each other with the negative electrode of described first diode, and source electrode is by described second grounding through resistance;
One the 3rd resistance;
One first electric capacity; And
One second diode, its anode links to each other with the drain electrode of described isolated gate FET, and negative electrode links to each other with a power supply by described the 3rd resistance, and the negative electrode of second diode also links to each other with described power supply by described first electric capacity.
Above-mentioned ON-OFF control circuit is by the slowed down opening speed of described isolated gate FET of described first resistance, first diode, described positive-negative-positive triode has been accelerated the closing velocity of described isolated gate FET, described second diode, the 3rd resistance and first electric capacity are eliminated the caused peak voltage of described isolated gate FET quick closedown, have avoided electromagnetic interference.
Description of drawings
Fig. 1 is the circuit diagram of the better embodiment of ON-OFF control circuit of the present invention.
The main element symbol description
ON-OFF control circuit 100
Isolated gate FET Q1
Positive-negative-positive triode Q2
The first diode D1
The second diode D2
Switch transformer T
Primary coil L1
Secondary coil L2
Resistance R 1～R3
Capacitor C 1～C2
Power supply VCC
Embodiment
Below in conjunction with accompanying drawing and better embodiment the present invention is described in further detail:
Please refer to Fig. 1, ON-OFF control circuit 100 of the present invention is connected between a control chip 200 and the switch transformer T, and described switch transformer T also links to each other with an output circuit 300.Whether described ON-OFF control circuit 100 is used to control exports to the element (figure does not show) of rear end afterwards with the voltage of a power supply VCC by described output circuit 300 through switch transformer T transformation.
Described ON-OFF control circuit 100 comprises an isolated gate FET Q1, a positive-negative-positive triode Q2, one first diode D1, one second diode D2, resistance R 1～R3, and capacitor C 1～C2.In the present embodiment, described isolated gate FET Q1 is a N type isolated gate FET.
The anode of the described first diode D1 links to each other with described control chip 200 by described resistance R 1, and also the base stage with described positive-negative-positive triode Q2 links to each other.The negative electrode of the described first diode D1 links to each other with the grid of described isolated gate FET Q1, and also the emitter with described positive-negative-positive triode Q2 links to each other.The grounded collector of described positive-negative-positive triode Q2.
The drain electrode of described isolated gate FET Q1 links to each other with the anode of the described second diode D2, also links to each other with the source electrode of described isolated gate FET Q1 by described capacitor C 1.The source electrode of described isolated gate FET Q1 is also by described resistance R 2 ground connection.
The negative electrode of the described second diode D2 links to each other with described power supply VCC by described resistance R 3 and capacitor C 2 respectively.
Described switch transformer T comprises a primary coil L1 and a level coil L2.First end of described primary coil L1 links to each other with described power supply VCC, and second end links to each other with the drain electrode of described isolated gate FET Q1.The two ends of the secondary coil L2 of described switch transformer T all link to each other with described output circuit 300.
When described control chip 200 sent a high level signal, described high level signal charged to the grid of described isolated gate FET Q1 and the equivalent capacity between the drain electrode and the equivalent capacity between grid and the source electrode by described resistance R 1 and the first diode D1 successively.Simultaneously, the base stage of described positive-negative-positive triode Q2 is a high level, and according to the operating characteristic of positive-negative-positive triode, described positive-negative-positive triode Q2 ends.
According to the operating characteristic of isolated gate FET Q1, when the voltage of the equivalent capacity of described isolated gate FET Q1 reached the conducting voltage of described isolated gate FET Q1, opened described isolated gate FET Q1 side.In the present embodiment, because described resistance R 1, the dividing potential drop effect of the first diode D1 and the conducting time-lag action of the described first diode D1, the charging process of the equivalent capacity of described isolated gate FET Q1 will slow down.Can make that so the opening speed of described isolated gate FET Q1 is slack-off, the opening speed of the described ON-OFF control circuit 100 that promptly slowed down.
After the described isolated gate FET Q1 conducting, described power supply VCC, switch transformer T, isolated gate FET Q1 and resistance R 2 form a loop, and the voltage that described power supply VCC provides is promptly exported to the element of rear end by described output circuit 300 after the described switch transformer T transformation.
When described control chip 200 sent a low level signal, the base stage of described positive-negative-positive triode Q2 was a low level, according to the operating characteristic of positive-negative-positive triode, and described positive-negative-positive triode Q2 conducting.Equivalent capacity between the grid of described isolated gate FET Q1 and drain electrode and the source electrode is by described positive-negative-positive triode Q2 repid discharge, thereby make described isolated gate FET Q1 closing velocity accelerate, promptly accelerated the closing velocity of described ON-OFF control circuit 100.After described isolated gate FET Q1 closed, described power supply VCC, switch transformer T, isolated gate FET Q1 and resistance R 2 can not form a loop, and described output circuit 300 i.e. output voltage signal not.
Wherein, the described second diode D2, resistance R 3 and capacitor C 2 are formed a sharpening peak circuit, and caused peak voltage when eliminating described isolated gate FET Q1 quick closedown has been avoided electromagnetic interference.
Above-mentioned ON-OFF control circuit 100 is by the slowed down opening speed of described isolated gate FET Q1 of described resistance R 1, the first diode D1, described positive-negative-positive triode Q2 has accelerated the closing velocity of described isolated gate FET Q1, thereby the opening speed of the described ON-OFF control circuit 100 that slowed down has been accelerated the closing velocity of described ON-OFF control circuit 100.The described second diode D2, resistance R 3 and capacitor C 2 are eliminated the caused peak voltage of described isolated gate FET Q1 quick closedown, have avoided electromagnetic interference.
Claims (3)
1. ON-OFF control circuit comprises:
One first resistance;
One first diode, its anode links to each other with a control chip by described first resistance, and described control chip is used to export a high level signal or a low level signal;
One positive-negative-positive triode, its base stage links to each other with the anode of described first diode, and emitter links to each other grounded collector with the negative electrode of described first diode;
One second resistance;
One isolated gate FET, its grid links to each other with the negative electrode of described first diode, and source electrode is by described second grounding through resistance;
One the 3rd resistance;
One first electric capacity; And
One second diode, its anode links to each other with the drain electrode of described isolated gate FET, and negative electrode links to each other with a power supply by described the 3rd resistance, and the negative electrode of second diode also links to each other with described power supply by described first electric capacity.
2. ON-OFF control circuit as claimed in claim 1 is characterized in that: described isolated gate FET is a N type isolated gate FET.
3. ON-OFF control circuit as claimed in claim 1 is characterized in that: the drain electrode of described isolated gate FET also links to each other with the source electrode of described isolated gate FET by one second electric capacity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101543558A CN102237784A (en) | 2010-04-23 | 2010-04-23 | Switch control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101543558A CN102237784A (en) | 2010-04-23 | 2010-04-23 | Switch control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102237784A true CN102237784A (en) | 2011-11-09 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010101543558A Pending CN102237784A (en) | 2010-04-23 | 2010-04-23 | Switch control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102237784A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113422503A (en) * | 2021-06-25 | 2021-09-21 | 深圳木芯科技有限公司 | Power supply clamping circuit and ESD protection circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN200948282Y (en) * | 2006-09-27 | 2007-09-19 | 深圳市菲亚伏实业股份有限公司 | Constant temperature infusion heater |
| CN200976577Y (en) * | 2006-11-29 | 2007-11-14 | 青岛海信电器股份有限公司 | MOS tube driving circuit and television set having the same |
| CN101227778A (en) * | 2008-02-19 | 2008-07-23 | 东南大学 | Self-excited oscillation type high power LED constant-current driving circuit |
| CN201118451Y (en) * | 2007-11-29 | 2008-09-17 | 上海辰蕊微电子科技有限公司 | No loss absorption circuit for reverse activation switch power |
| CN101640956A (en) * | 2009-03-18 | 2010-02-03 | 河海大学常州校区 | Design method of intelligent power supply electronic converter of general-type railway signal lamp |
-
2010
- 2010-04-23 CN CN2010101543558A patent/CN102237784A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN200948282Y (en) * | 2006-09-27 | 2007-09-19 | 深圳市菲亚伏实业股份有限公司 | Constant temperature infusion heater |
| CN200976577Y (en) * | 2006-11-29 | 2007-11-14 | 青岛海信电器股份有限公司 | MOS tube driving circuit and television set having the same |
| CN201118451Y (en) * | 2007-11-29 | 2008-09-17 | 上海辰蕊微电子科技有限公司 | No loss absorption circuit for reverse activation switch power |
| CN101227778A (en) * | 2008-02-19 | 2008-07-23 | 东南大学 | Self-excited oscillation type high power LED constant-current driving circuit |
| CN101640956A (en) * | 2009-03-18 | 2010-02-03 | 河海大学常州校区 | Design method of intelligent power supply electronic converter of general-type railway signal lamp |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113422503A (en) * | 2021-06-25 | 2021-09-21 | 深圳木芯科技有限公司 | Power supply clamping circuit and ESD protection circuit |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20111109 |