CN204290936U - Single channel turns two-way drive circuit - Google Patents
Single channel turns two-way drive circuit Download PDFInfo
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- CN204290936U CN204290936U CN201420770350.1U CN201420770350U CN204290936U CN 204290936 U CN204290936 U CN 204290936U CN 201420770350 U CN201420770350 U CN 201420770350U CN 204290936 U CN204290936 U CN 204290936U
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Abstract
The utility model discloses a kind of single channel and turn two-way drive circuit, this single channel turns two-way drive circuit and comprises PWM input, power input, a PWM output, the 2nd PWM output, reference voltage acquisition module, the first driver module, the second driver module, the first synchronization control module and the second synchronization control module.The first reference voltage that first driver module, the second driver module collect according to reference voltage acquisition module, the second reference voltage, and the pwm signal of PWM input input, alternately export the pwm signal of high level, with the power switch pipe up and down of driven main circuit, first synchronization control module controls the output that the first driver module turns off pwm signal when pwm signal is low level, the second synchronization control module controls the output that the second driver module turns off pwm signal when pwm signal is high level.Achieve drive circuit pwm signal constrained input synchronous, can available protecting main circuit.
Description
Technical field
The utility model relates to electronic circuit technology field, particularly relates to a kind of single channel and turns two-way drive circuit.
Background technology
Current asymmetrical half-bridge power supply, Synchronous High voltage DC-DC power source, SE framework high pressure power amplifier, the main circuits such as sinewave inverter, all need a complementary PWM (Pulse Width Modulation, pulse width modulation) drive circuit of signal, and drive circuit needs to set certain Dead Time, with the problem preventing the power switch pipe up and down of main circuit common, current half-bridge driven IC or need two-way to drive, carry Power MOSFET, but Power MOSFET is limited in scope, the demand of all circuit can not be met, as the L6384 of ST (STMicw Electronics) company, the setting range of Dead Time is 0.5 μ s-3 μ s, Dead Time setting can not be less than 0.5 μ s, can be larger because of Dead Time when power amplifier and the sinewave inverter use of SE framework, cause output waveform distortion.Usually adopt discrete device design single channel to turn two-way drive circuit at present and solve the large problem of half-bridge driven IC Dead Time, but it is asynchronous to use the single channel of discrete device design to turn two-way drive circuit output shutoff sequential at present, cause turn off delay time, namely when the input of single channel pwm signal turns the output of two-way pwm signal, the pwm signal of doubleway output alternately can not turn off the output of pwm signal in time according to the input condition of single channel pwm signal, cause drive circuit pwm signal constrained input asynchronous, cause when main circuit carries out Pulse by Pulse current limliting or short-circuit protection, can not effectively protect.
Utility model content
Main purpose of the present utility model is to provide a kind of single channel to turn two-way drive circuit, is intended to realize drive circuit pwm signal constrained input synchronous, with available protecting main circuit.
In order to achieve the above object, the utility model provides a kind of single channel to turn two-way drive circuit, and described single channel turns two-way drive circuit and comprises PWM input, power input, a PWM output, the 2nd PWM output, reference voltage acquisition module, the first driver module, the second driver module, the first synchronization control module and the second synchronization control module;
Described reference voltage acquisition module gathers the supply voltage of described power input input, and exports the first reference voltage and the second reference voltage; When the pwm signal of described PWM input input is high level, described first driver module exports the pwm signal of high level according to the pwm signal of described first reference voltage and input, and export this high level pwm signal by a PWM output, described second synchronization control module controls the pwm signal of described second driver module output low level, and exports this low level pwm signal by the 2nd PWM output; When the pwm signal of described PWM input input is low level, described second driver module exports the pwm signal of high level according to the pwm signal of described second reference voltage and input, and export this high level pwm signal by the 2nd PWM output, described first synchronization control module controls the pwm signal of described first driver module output low level, and by a PWM output output low level pwm signal.
Preferably, described reference voltage acquisition module comprises the first resistance, the second resistance and the 3rd resistance;
One end of described first resistance is connected with described power input, and the other end of described first resistance is successively via described second resistance, the 3rd grounding through resistance; Described first resistance is connected with the reference voltage input of described first driver module with the common port of the second resistance, and described second resistance is connected with the reference voltage input of described second driver module with the common port of the 3rd resistance.
Preferably, described first driver module comprises the first voltage comparator and the 4th resistance; The power end of described first voltage comparator is connected with described power input, the earth terminal ground connection of described first voltage comparator, the in-phase input end of described first voltage comparator is connected with described PWM input, the inverting input of described first voltage comparator is as the reference voltage input of described first driver module, be connected with the first reference voltage output end of described reference voltage acquisition module, the output of described first voltage comparator is connected with a described PWM output, and is connected with described power input via described 4th resistance.
Preferably, described second driver module comprises the second voltage comparator and the 5th resistance; The power end of described second voltage comparator is connected with described power input, the earth terminal ground connection of described second voltage comparator, the in-phase input end of described second voltage comparator is as the reference voltage input of described second driver module, be connected with the second reference voltage output end of described reference voltage acquisition module, the inverting input of described second voltage comparator is connected with described PWM input, the output of described second voltage comparator is connected with described 2nd PWM output, and is connected with described power input via described 5th resistance.
Preferably, described first synchronization control module comprises diode; The negative electrode of described diode is connected with described PWM input, and the anode of described diode is connected with the output of described first driver module, and is connected with a described PWM output.
Preferably, described second synchronization control module comprises electronic switch; The control end of described electronic switch is connected with described PWM input, and the first end of described electronic switch is connected with the output of described second driver module, and is connected with described 2nd PWM output, the second end ground connection of described electronic switch.
Preferably, described electronic switch is NMOS tube; The grid of described NMOS tube is the control end of described electronic switch, and the drain electrode of described NMOS tube is the first end of described electronic switch, and the source electrode of described NMOS tube is the second end of described electronic switch.
Preferably, described single channel turns two-way drive circuit and also comprises PWM time delay module, described PWM time delay module, when described PWM input input pwm signal, respectively exports this pwm signal to first driver module and second driver module after carrying out time delay to this pwm signal.
Preferably, described PWM time delay module comprises the 6th resistance and an electric capacity; One end of described 6th resistance is connected with described PWM input, and the other end of described 6th resistance is via described capacity earth; Described 6th resistance is connected with the pwm signal input of described first driver module with the common port of described electric capacity, and is connected with the pwm signal input of described second driver module.
The single channel that the utility model provides turns two-way drive circuit, by the first driver module, the first reference voltage that second driver module collects according to reference voltage acquisition module, second reference voltage, and the pwm signal of PWM input input, alternately export the pwm signal of high level, with the power switch pipe up and down of driven main circuit, and first synchronization control module when the pwm signal of PWM input is low level, control the output that the first driver module turns off pwm signal, second synchronization control module is when the pwm signal of PWM input is high level, control the output that the second driver module turns off pwm signal.Thus; make when the pwm signal of PWM input input is low level; the pwm signal that a PWM output exports can be turned off in time; when the pwm signal inputted is high level; the pwm signal that the 2nd PWM output exports can be turned off in time; thus the output of pwm signal alternately can be turned off in time according to the input condition of single channel pwm signal; achieve drive circuit pwm signal constrained input synchronous; main circuit is avoided to damage because of the reason such as overcurrent, short circuit, and then can available protecting main circuit.Meanwhile, the advantages such as the utility model single channel turns two-way drive circuit and has structure simply, is easy to realize, with low cost.
Accompanying drawing explanation
Fig. 1 is the theory diagram that the utility model single channel turns two-way drive circuit one embodiment;
Fig. 2 is the theory diagram that the utility model single channel turns another embodiment of two-way drive circuit;
Fig. 3 is the electrical block diagram that the utility model single channel turns two-way drive circuit one specific embodiment.
The realization of the purpose of this utility model, functional characteristics and advantage, will in conjunction with the embodiments, and be described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
The utility model provides a kind of single channel to turn two-way drive circuit, can be used for the main circuit such as power amplifier, sinewave inverter driving asymmetrical half-bridge power supply, synchronous DC-DC power source, SE framework.
Reference Fig. 1, Fig. 1 are the theory diagram that the utility model single channel turns two-way drive circuit one embodiment.
In one embodiment, as shown in Figure 1, single channel turns two-way drive circuit and comprises PWM input PWM_IN, power input VCC, a PWM output PWM_H, the 2nd PWM output PWM_L, reference voltage acquisition module 10, first driver module 20, second driver module 30, first synchronization control module 40 and the second synchronization control module 50.
Wherein, the input of reference voltage acquisition module 10 is connected with power input VCC, first reference voltage output end of reference voltage acquisition module 10 is connected with the reference voltage input of the first driver module 20, and the second reference voltage output end of reference voltage acquisition module 10 is connected with the reference voltage input of the second driver module 30; The pwm signal input of the first driver module 20 is connected with PWM input PWM_IN, and the output of the first driver module 20 is connected with a PWM output PWM_H; The pwm signal input of the second driver module 30 is connected with PWM input PWM_IN, and the output of the second driver module 30 is connected with the 2nd PWM output PWM_L; The input of the first synchronization control module 40 is connected with PWM input PWM_IN, and the output of the first synchronization control module 40 is connected with a PWM output PWM_H; The input of the second synchronization control module 50 is connected with PWM input PWM_IN, and the output of the second synchronization control module 50 is connected with the 2nd PWM output PWM_L.
Described reference voltage acquisition module 10 gathers the supply voltage that described power input VCC inputs, and exports the first reference voltage and the second reference voltage; When the pwm signal that described PWM input PWM_IN inputs is high level, described first driver module 20 exports the pwm signal of high level according to the pwm signal that described first reference voltage and PWM input PWM_IN input, and export this high level pwm signal by a PWM output PWM_H, described second synchronization control module 50 controls the pwm signal of described second driver module 30 output low level, and exports this low level pwm signal by the 2nd PWM output PWM_L; When the pwm signal that described PWM input PWM_IN inputs is low level, described second driver module 30 exports the pwm signal of high level according to the pwm signal that described second reference voltage and PWM input PWM_IN input, and export this high level pwm signal by the 2nd PWM output PWM_L, described first synchronization control module 40 controls the pwm signal of described first driver module 20 output low level, and by a PWM output PWM_H output low level pwm signal.
In the present embodiment, the pwm signal inputted from PWM input PWM_IN is input to the first driver module 20 and the second driver module 30 respectively, reference voltage acquisition module 10 gathers the supply voltage that power input VCC inputs, export the first reference voltage to the first driver module 20, export the second reference voltage to the second driver module 30 simultaneously.
The amplitude of the first driver module 20 to the pwm signal that the first reference voltage and PWM input PWM_IN input compares, when the first reference voltage is less than the pwm signal amplitude of PWM input PWM_IN input, first driver module 20 exports the first drive singal (exporting the pwm signal of high level), and export this first drive singal to main circuit, to drive main circuit by a PWM output PWM_H.The amplitude of the second driver module 30 to the pwm signal that the second reference voltage and PWM input PWM_IN input compares, when the second reference voltage is greater than the pwm signal amplitude of PWM input PWM_IN input, second driver module 30 exports the second drive singal (exporting the pwm signal of high level), and export this second drive singal to main circuit, to drive main circuit by the 2nd PWM output PWM_L.And when the first driver module 20 is different with the second driver module 30, output drive signal is to main circuit, avoids the power switch pipe up and down of main circuit straight-through and damages main circuit.
When the pwm signal of PWM input PWM_IN is low level, first synchronization control module 40 controls the pwm signal of the first driver module 20 output low level, make the pwm signal of a PWM output PWM_H output low level, namely turn off the pwm signal that a PWM output PWM_H exports; When the pwm signal of PWM input PWM_IN is high level, second synchronization control module 50 controls the pwm signal of the second driver module 30 output low level, make the pwm signal of the 2nd PWM output PWM_L output low level, namely turn off the pwm signal that the 2nd PWM output PWM_L exports.
Thus, relative to prior art, single channel of the present utility model turns two-way drive circuit, when the pwm signal of PWM input input is low level, the pwm signal that a PWM output PWM_H exports can be turned off in time, when the pwm signal inputted is high level, the pwm signal that the 2nd PWM output PWM_L exports can be turned off in time, thus the output of pwm signal alternately can be turned off in time according to the input condition of single channel pwm signal, achieve drive circuit pwm signal constrained input synchronous, avoid main circuit because of overcurrent, reasons such as short circuit and damaging, and then can available protecting main circuit.Meanwhile, the advantages such as the utility model single channel turns two-way drive circuit and has structure simply, is easy to realize, with low cost.
Refer again to Fig. 2, Fig. 2 is the theory diagram that the utility model single channel turns another embodiment of two-way drive circuit.
With the single channel shown in Fig. 1 turn two-way drive circuit unlike, single channel shown in Fig. 2 turns two-way drive circuit and also comprises PWM time delay module 60, the input of PWM time delay module 60 is connected with PWM input PWM_IN, and the output of PWM time delay module 60 is connected with the pwm signal input of the first driver module 20 and the second driver module 30 respectively.This pwm signal, when PWM input PWM_IN inputs pwm signal, is exported to the first driver module 20 and the second driver module 30 to this pwm signal by PWM time delay module 60 respectively after carrying out time delay.
Delay disposal is carried out by the pwm signal of PWM time delay module 60 to input, the pwm signal being input to the first driver module 20 and the second driver module 30 is stablized, and by regulating the delay time of PWM time delay module 60, single channel can be regulated to turn the Dead Time of two-way drive circuit, reduce the delay time of PWM time delay module 60, the Dead Time that single channel turns two-way drive circuit can be reduced, thus the Dead Time making single channel turn two-way drive circuit can be adjusted to and is less than 0.5 μ s, to meet the demand of various main circuit.
Refer again to Fig. 3, Fig. 3 is the electrical block diagram that the utility model single channel turns two-way drive circuit one specific embodiment.
As shown in Figure 3, reference voltage acquisition module 10 comprises the first resistance R1, the second resistance R2 and the 3rd resistance R3.
One end of first resistance R1 is connected with power input VCC, and the other end of the first resistance R1 is successively via the second resistance R2, the 3rd resistance R3 ground connection; First resistance R1 is connected with the reference voltage input of the first driver module 20 with the common port (i.e. A point) of the second resistance R2, and the second resistance R2 is connected with the reference voltage input of the second driver module 30 with the common port (i.e. B point) of the 3rd resistance R3.
Reference voltage acquisition module 10 gathers the supply voltage of power input VCC input by the first resistance R1, the second resistance R2 and the 3rd resistance R3, in Fig. 3, the voltage at A point place is the first reference voltage that reference voltage acquisition module 10 collects, the voltage at B point place is the second reference voltage that reference voltage acquisition module 10 collects, and suitably can regulate the first reference voltage and the second reference voltage by regulating the first resistance R1, the second resistance R2 and the 3rd resistance R3.
As shown in Figure 3, the first driver module 20 comprises the first voltage comparator U1 and the 4th resistance R4, the power end of the first voltage comparator U1 is connected with power input VCC, the earth terminal ground connection of the first voltage comparator U1, the in-phase input end of the first voltage comparator U1 is connected with PWM input PWM_IN, the inverting input of the first voltage comparator U1 is as the reference voltage input of the first driver module 20, be connected with the first reference voltage output end of reference voltage acquisition module 10, in Fig. 3, the inverting input of the first voltage comparator U1 is connected with the common port of the first resistance R1 and the second resistance R2, the output of the first voltage comparator U1 is connected with a PWM output PWM_H, and be connected with power input VCC via the 4th resistance R4.
As shown in Figure 3, the second driver module 30 comprises the second voltage comparator U2 and the 5th resistance R5, the power end of the second voltage comparator U2 is connected with power input VCC, the earth terminal ground connection of the second voltage comparator U2, the in-phase input end of the second voltage comparator U2 is as the reference voltage input of the second driver module 30, be connected with the second reference voltage output end of reference voltage acquisition module 10, in Fig. 3, the in-phase input end of the second voltage comparator U2 is connected with the common port of the second resistance R2 and the 3rd resistance R3, the inverting input of the second voltage comparator U2 is connected with PWM input PWM_IN, the output of the second voltage comparator U2 is connected with the 2nd PWM output PWM_L, and be connected with power input VCC via the 5th resistance R5.
As shown in Figure 3, the first synchronization control module 40 comprises diode D1; The negative electrode of diode D1 is connected with PWM input PWM_IN, the anode of diode D1 is connected with the output of the first driver module 20, and be connected with a PWM output PWM_H, in Fig. 3, the anode of diode D1 is connected with the output of the first voltage comparator U1, and is connected with a PWM output PWM_H.
As shown in Figure 3, the second synchronization control module 50 comprises electronic switch Q1; The control end of electronic switch Q1 is connected with PWM input PWM_IN, the first end of electronic switch Q1 is connected with the output of the second driver module 30, and be connected with the 2nd PWM output PWM_L, in Fig. 3, the first end of electronic switch Q1 is connected with the output of the second voltage comparator U2, and be connected with the 2nd PWM output PWM_L, the second end ground connection of electronic switch Q1.
Particularly, electronic switch Q1 is NMOS tube; The grid of NMOS tube is the control end of electronic switch Q1, and the drain electrode of NMOS tube is the first end of electronic switch Q1, and the source electrode of NMOS tube is second end of electronic switch Q1.
As shown in Figure 3, PWM time delay module 60 comprises the 6th resistance R6 and electric capacity C1; One end of 6th resistance R6 is connected with PWM input PWM_IN, and the other end of the 6th resistance R6 is via electric capacity C1 ground connection; 6th resistance R6 is connected with the pwm signal input of the first driver module 20 with the common port of electric capacity C1, and is connected with the pwm signal input of the second driver module 30.
In Fig. 3, the 6th resistance R6 is connected with the in-phase input end of the first voltage comparator U1 in the first driver module 20 with the common port of electric capacity C1, and is connected with the inverting input of the second voltage comparator U2 in the second driver module 30.When PWM input PWM_IN inputs pwm signal, the RC charging and discharging circuit be made up of the 6th resistance R6 and electric capacity C1 carries out time delay to pwm signal, the pwm signal after time delay is sent into the in-phase input end of the first voltage comparator U1 and the inverting input of the second voltage comparator U2 simultaneously.
The operation principle that the utility model single channel turns two-way drive circuit specifically describes as follows:
As shown in Figure 3, single channel turns two-way drive circuit and inputs pwm signal from PWM input PWM_IN, when the pwm signal inputted is high level, the pwm signal of input is charged to electric capacity C1 by the 6th resistance R6, when the charging voltage on electric capacity C1 is greater than first reference voltage at A point place, namely when the voltage of the in-phase input end input of the first voltage comparator U1 is greater than the voltage of inverting input input of the first voltage comparator U1, the output of the first voltage comparator U1 is in open loop situations, now due to the 4th resistance R4 pull-up, the output of the first voltage comparator U1 is high level, the pwm signal that now a PWM output PWM_H exports is high level.
When the pwm signal of input is low level; namely when the pwm signal that PWM input PWM_IN inputs is low level; due to the conducting of diode D1 positively biased; the output of the first voltage comparator U1 is pulled to low level immediately; the pwm signal that now a PWM output PWM_H exports is low level; thus make when the pwm signal of PWM input PWM_IN input is low level; the pwm signal that one PWM output PWM_H exports turns off immediately; and then it is synchronous to realize pwm signal constrained input, can effectively protect main circuit.
Simultaneously, electric capacity C1 is discharged by the 6th resistance R6, when the charging voltage on electric capacity C1 is low to moderate second reference voltage at B point place, namely when the voltage of the inverting input input of the second voltage comparator U2 is less than the voltage of in-phase input end input of the second voltage comparator U2, the output of the second voltage comparator U2 is in open loop situations, now due to the 5th resistance R5 pull-up, the output of the second voltage comparator U2 is high level, and the pwm signal that now the 2nd PWM output PWM_L exports is high level.
When the pwm signal that PWM input PWM_IN inputs is high level again, the control end (i.e. the grid of NMOS tube) of electronic switch Q1 is high level, electronic switch Q1 conducting, make the 5th resistance R5 by drop-down immediately, the output of the second voltage comparator U2 is pulled to low level, the pwm signal that now the 2nd PWM output PWM_L exports is low level, thus make when the pwm signal of PWM input PWM_IN input is high level, the pwm signal that 2nd PWM output PWM_L exports turns off immediately, and then it is synchronous to realize pwm signal constrained input, can effectively protect main circuit.
These are only preferred embodiment of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model specification and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (9)
1. a single channel turns two-way drive circuit, it is characterized in that, described single channel turns two-way drive circuit and comprises PWM input, power input, a PWM output, the 2nd PWM output, reference voltage acquisition module, the first driver module, the second driver module, the first synchronization control module and the second synchronization control module;
Described reference voltage acquisition module gathers the supply voltage of described power input input, and exports the first reference voltage and the second reference voltage;
When the pwm signal of described PWM input input is high level, described first driver module exports the pwm signal of high level according to the pwm signal of described first reference voltage and input, and export this high level pwm signal by a PWM output, described second synchronization control module controls the pwm signal of described second driver module output low level, and exports this low level pwm signal by the 2nd PWM output;
When the pwm signal of described PWM input input is low level, described second driver module exports the pwm signal of high level according to the pwm signal of described second reference voltage and input, and export this high level pwm signal by the 2nd PWM output, described first synchronization control module controls the pwm signal of described first driver module output low level, and by a PWM output output low level pwm signal.
2. single channel as claimed in claim 1 turns two-way drive circuit, and it is characterized in that, described reference voltage acquisition module comprises the first resistance, the second resistance and the 3rd resistance;
One end of described first resistance is connected with described power input, and the other end of described first resistance is successively via described second resistance, the 3rd grounding through resistance; Described first resistance is connected with the reference voltage input of described first driver module with the common port of the second resistance, and described second resistance is connected with the reference voltage input of described second driver module with the common port of the 3rd resistance.
3. single channel as claimed in claim 1 turns two-way drive circuit, and it is characterized in that, described first driver module comprises the first voltage comparator and the 4th resistance; The power end of described first voltage comparator is connected with described power input, the earth terminal ground connection of described first voltage comparator, the in-phase input end of described first voltage comparator is connected with described PWM input, the inverting input of described first voltage comparator is as the reference voltage input of described first driver module, be connected with the first reference voltage output end of described reference voltage acquisition module, the output of described first voltage comparator is connected with a described PWM output, and is connected with described power input via described 4th resistance.
4. single channel as claimed in claim 1 turns two-way drive circuit, and it is characterized in that, described second driver module comprises the second voltage comparator and the 5th resistance; The power end of described second voltage comparator is connected with described power input, the earth terminal ground connection of described second voltage comparator, the in-phase input end of described second voltage comparator is as the reference voltage input of described second driver module, be connected with the second reference voltage output end of described reference voltage acquisition module, the inverting input of described second voltage comparator is connected with described PWM input, the output of described second voltage comparator is connected with described 2nd PWM output, and is connected with described power input via described 5th resistance.
5. single channel as claimed in claim 1 turns two-way drive circuit, and it is characterized in that, described first synchronization control module comprises diode; The negative electrode of described diode is connected with described PWM input, and the anode of described diode is connected with the output of described first driver module, and is connected with a described PWM output.
6. single channel as claimed in claim 1 turns two-way drive circuit, and it is characterized in that, described second synchronization control module comprises electronic switch; The control end of described electronic switch is connected with described PWM input, and the first end of described electronic switch is connected with the output of described second driver module, and is connected with described 2nd PWM output, the second end ground connection of described electronic switch.
7. single channel as claimed in claim 6 turns two-way drive circuit, and it is characterized in that, described electronic switch is NMOS tube; The grid of described NMOS tube is the control end of described electronic switch, and the drain electrode of described NMOS tube is the first end of described electronic switch, and the source electrode of described NMOS tube is the second end of described electronic switch.
8. single channel as claimed in claim 1 turns two-way drive circuit, it is characterized in that, described single channel turns two-way drive circuit and also comprises PWM time delay module, described PWM time delay module, when described PWM input input pwm signal, respectively exports this pwm signal to first driver module and second driver module after carrying out time delay to this pwm signal.
9. single channel as claimed in claim 8 turns two-way drive circuit, and it is characterized in that, described PWM time delay module comprises the 6th resistance and an electric capacity; One end of described 6th resistance is connected with described PWM input, and the other end of described 6th resistance is via described capacity earth; Described 6th resistance is connected with the pwm signal input of described first driver module with the common port of described electric capacity, and is connected with the pwm signal input of described second driver module.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420770350.1U CN204290936U (en) | 2014-12-08 | 2014-12-08 | Single channel turns two-way drive circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420770350.1U CN204290936U (en) | 2014-12-08 | 2014-12-08 | Single channel turns two-way drive circuit |
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| CN204290936U true CN204290936U (en) | 2015-04-22 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108540118A (en) * | 2017-03-06 | 2018-09-14 | 上海森太克汽车电子有限公司 | A kind of doubleway output Hall chip of SIP-3 encapsulation |
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2014
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108540118A (en) * | 2017-03-06 | 2018-09-14 | 上海森太克汽车电子有限公司 | A kind of doubleway output Hall chip of SIP-3 encapsulation |
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