Summary of the invention
Main purpose of the present invention is to provide a kind of IGBT drive circuit, is intended to the turn-off speed improving IGBT, reduces the switching loss of IGBT.
For achieving the above object, the present invention proposes a kind of IGBT drive circuit, this IGBT drive circuit comprises drive signal generation circuit, booster circuit, accumulator, discharge circuit and negative pressure generative circuit, the output of described drive signal generation circuit is connected with the input of described booster circuit, and the output of described booster circuit is connected with the input of described accumulator; The output of described accumulator and being connected by drive end of IGBT; The input of described negative pressure generative circuit is connected with the output of described booster circuit, and the output of described negative pressure discharge circuit is connected through the discharge end of described discharge circuit with described accumulator; Wherein,
Described drive signal generation circuit, for generation of the positive and negative IGBT drive singal replaced;
Described booster circuit, exports after being boosted by the positive and negative described IGBT drive singal replaced;
Described accumulator, for carrying out energy storage, to drive described IGBT conducting when described booster circuit exports forward voltage; Discharged by described discharge circuit when described booster circuit exports negative voltage, to turn off described IGBT;
Described negative pressure generative circuit, for carrying out energy storage when described booster circuit exports forward voltage, and generates negative voltage, and when described booster circuit exports reverse voltage, described negative voltage is supplied to described discharge circuit.
Preferably, described drive signal generation circuit comprises controller, logical transition circuit, switch driving circuit and driving power, described controller comprises the first signal output part and secondary signal output, described logical transition circuit comprises first input end, second input, first output and the second output, the first input end of described logical transition circuit is connected with the first signal output part of described controller, second input of described logical transition circuit is connected with the secondary signal output of described controller, first controlled end and second controlled end of the first output of described logical transition circuit and the second output and described switch driving circuit connect one to one, the input of described switch driving circuit is connected with described driving power, the output of described switch driving circuit is the output of described drive signal generation circuit, wherein,
Described controller, presets drive singal and the second default drive singal for exporting first;
Described logical transition circuit, for the described first default drive singal and the second default drive singal being converted to, two-way amplitude is equal, frequency is equal, duty ratio is equal, the switch controlling signal of phase 180 degree;
Described switch driving circuit, for equal according to described two-way amplitude, frequency is equal, duty ratio is equal, the switch controlling signal of phase 180 degree control described driving power export the described positive and negative IGBT drive singal replaced.
Preferably, described logical transition circuit comprises the first power supply, second source, the first trigger, the first inverter, the second inverter, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 7th resistance, the 8th resistance and the first switch drive chip, and described first switch drive chip comprises supply pin, the first input pin, the second input pin, the first output pin, the second output pin and grounding leg; First signal output part of described controller is connected with described first power supply through described first resistance, and the secondary signal output of described controller is connected with described second source through described 3rd resistance; One input of described first trigger is connected with the first signal output part of described controller through described second resistance, another input of described first trigger is connected with the secondary signal output of described controller through described 4th resistance, the output of described first trigger is connected through described second inverter one end with described 5th resistance, and the other end of described 5th resistance is connected with the first input pin of described first switch drive chip and the second input pin respectively; The supply pin of described first switch drive chip is connected with described driving power through described 7th resistance, the 8th resistance, the grounding leg ground connection of described first switch drive chip, first output pin of described first switch drive chip is the first output of described logical transition circuit, and the second output pin of described first switch drive chip is the second output of described logical transition circuit.
Preferably, described switch driving circuit comprises the first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 9th resistance, the tenth resistance, the 11 resistance, the 12 resistance, the 13 resistance, the 14 resistance, the first diode, the second diode, the 3rd diode and the 4th diode; The grid of described first switching tube is connected with the first output pin of described first switch drive chip through described 11 resistance, the 9th resistance successively, the negative electrode of described first diode is connected with the grid of described first switching tube, and the anode of described first diode is connected with one end of described 9th resistance, the 11 resistive interconnections; The source electrode of described first switching tube is connected with described driving power through described 8th resistance, and drain electrode is connected with the drain electrode of described second switch pipe; The grid of described second switch pipe is connected with the first output of described first switch drive chip through described 12 resistance, the 9th resistance successively, the anode of described second diode is connected with the grid of described second switch pipe, and the negative electrode of described second diode is connected with one end of described 11 resistance, the tenth resistive interconnections; The grid of described 3rd switching tube is connected with the second output pin of described first switch drive chip through described 13 resistance, the tenth resistance successively, the negative electrode of described 3rd diode is connected with the grid of described 3rd switching tube, and the anode of described 3rd diode is connected with one end of described tenth resistance, the 13 resistive interconnections; The source electrode of described 3rd switching tube is connected with described driving power through described 8th resistance, and the drain electrode of described 3rd switching tube is connected with the drain electrode of described 4th switching tube; The grid of described 4th switching tube is connected with the second output of described first switch drive chip through described 14 resistance, the tenth resistance, the anode of described 4th diode is connected with the grid of described 4th switching tube, and the negative electrode of described 4th diode is connected with one end of described 14 resistance, the tenth resistive interconnections.
Preferably, described booster circuit comprises transformer, described transformer has the first primary input terminal, the second primary input terminal, the first secondary output end and second subprime output, first primary input terminal of described transformer is connected with the common port of described 3rd switching tube and the 4th switching tube, second primary input terminal of described transformer is connected with the common port of described first switching tube and second switch pipe, and the first secondary output end of described transformer and second subprime output form the output of described booster circuit jointly.
Preferably, described accumulator comprises the 5th diode and the 7th electric capacity, the described anode of the 5th diode is connected with the first secondary output end of described transformer, the negative electrode of described 5th diode and one end of described 7th electric capacity, the interconnecting by drive end of described IGBT, the other end of described 7th electric capacity and the second subprime output of described transformer, the drain interconnection of described IGBT.
Preferably, described discharge circuit comprises the 5th switching tube and the 15 resistance, the described grid of the 5th switching tube is connected with the first secondary output end of described transformer, the source electrode of described 5th switching tube is connected with one end of described 5th diode and the 7th capacitive interconnect, and the drain electrode of described 5th switching tube is connected with the second subprime output of described transformer through described 15 resistance.
Preferably, described negative pressure generative circuit comprises the 6th diode, the first voltage-stabiliser tube, the 8th electric capacity and the 9th electric capacity; The described anode of the 6th diode is connected with the first secondary output end of described transformer, and the negative electrode of described 6th diode is connected with the positive pole of the 8th electric capacity, and the described negative pole of the 8th electric capacity is connected with the second subprime output of described transformer; Described 9th electric capacity and described first voltage-stabiliser tube are connected in parallel, and described 9th electric capacity is connected with the second subprime output of described transformer with one end of the anode interconnect of described first voltage-stabiliser tube, described 9th electric capacity is connected with the described other end of described 7th electric capacity with one end of the cathode interconnect of described first voltage-stabiliser tube.
Preferably, described IGBT drive circuit also comprises clamp circuit, and described clamp circuit is connected with the output of described accumulator.
Preferably, described IGBT drive circuit also comprises clamp circuit, described clamp circuit comprises the second voltage-stabiliser tube and the 3rd voltage-stabiliser tube, the negative electrode of described second voltage-stabiliser tube is connected with one end of described 5th diode and the 7th capacitive interconnect, the anode of described second voltage-stabiliser tube is connected with the anode of described 3rd voltage-stabiliser tube, and the negative electrode of described 3rd voltage-stabiliser tube is connected with the negative electrode of described 6th diode.
The present invention is by arranging drive signal generation circuit, booster circuit, accumulator, discharge circuit and negative pressure generative circuit composition IGBT drive circuit, this IGBT drive circuit due to IGBT drive singal drive signal generation circuit generated by booster circuit boost after export accumulator to and carry out charging energy-storing, charging interval is short, thus makes IGBT conducting speed; And, the power supply exported after booster circuit boosting also exports negative pressure generative circuit to and carries out charging energy-storing, and and generate a negative voltage, when accumulator is discharged by discharge circuit, this negative voltage is supplied to discharge circuit, tank voltage and this negative pressure is interacted, thus the voltage rate of release of accumulator is accelerated, and then improve the turn-off speed of IGBT, reduce the switching loss of IGBT.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only a part of embodiment of the present invention, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Need explanation, all directivity instruction (such as up, down, left, right, before and afters in the embodiment of the present invention ...) only for explaining the relative position relation, motion conditions etc. under a certain particular pose (as shown in drawings) between each parts, if when this particular pose changes, then directionality instruction also correspondingly changes thereupon.
In addition, relate to the description of " first ", " second " etc. in the present invention only for describing object, and instruction can not be interpreted as or imply its relative importance or the implicit quantity indicating indicated technical characteristic.Thus, be limited with " first ", the feature of " second " can express or impliedly comprise at least one this feature.In addition; technical scheme between each embodiment can be combined with each other; but must be can be embodied as basis with those of ordinary skill in the art; when technical scheme combination occur conflicting maybe cannot realize time will be understood that the combination of this technical scheme does not exist, also not within the protection range of application claims.
The present invention proposes a kind of IGBT drive circuit, for fast driving IGBT turn-on and turn-off.
With reference to Fig. 1 and Fig. 2, in embodiments of the present invention, this IGBT drive circuit comprises drive signal generation circuit 10, booster circuit 20, accumulator 30, discharge circuit 40 and negative pressure generative circuit 50.
Particularly, the output of described drive signal generation circuit 10 is connected with the input of described booster circuit 20, and the output of described booster circuit 20 is connected with the input of described accumulator 30; The output of described accumulator 30 and being connected by drive end of IGBT; The input of described negative pressure generative circuit 50 is connected with the output of described booster circuit 20, and the output of described negative pressure generative circuit 50 is connected through the discharge end of described discharge circuit 40 with described accumulator 30.
In the present embodiment, drive signal generation circuit 10 is for generation of the positive and negative IGBT drive singal replaced; Booster circuit 20 exports after being boosted by the positive and negative described IGBT drive singal replaced; Accumulator 30 for carrying out energy storage when described booster circuit 20 exports forward voltage, and drives described IGBT conducting, because booster circuit 20 improves output voltage, the speed of IGBT conducting is accelerated.Accumulator 30 also for being discharged by described discharge circuit 40 when booster circuit 20 exports negative voltage, to turn off described IGBT; Negative pressure generative circuit 50 for carrying out energy storage when booster circuit 20 exports forward voltage, and generates negative voltage, and when described booster circuit 20 exports reverse voltage, described negative voltage is supplied to described discharge circuit 40.Due to, one end, two ends of discharge circuit 40 is the discharge voltage of accumulator 30, and the other end is the negative voltage of negative pressure generative circuit 50, both interact, the voltage rate of release of accumulator 30 is accelerated, thus improves the turn-off speed of IGBT, reduce the switching loss of IGBT.
Above-mentioned drive signal generation circuit 10 can adopt the circuit realiration realizing arbitrarily exporting the positive and negative IGBT drive singal replaced, do not limit herein, in a preferred embodiment, this drive signal generation circuit 10 comprises controller MCU, logical transition circuit 11, switch driving circuit 12 and driving power VCC5, described controller MCU comprises the first signal output part PWM and secondary signal output SEL, described logical transition circuit 11 comprises first input end, second input, first output and the second output, the first input end of described logical transition circuit 11 is connected with the first signal output part PWM of described controller MCU, second input of described logical transition circuit 11 is connected with the secondary signal output SEL of described controller MCU, first controlled end and second controlled end of the first output of described logical transition circuit 11 and the second output and described switch driving circuit 12 connect one to one, the input of described switch driving circuit 12 is connected with described driving power VCC5, the output of described switch driving circuit 12 is the output of described drive signal generation circuit 10.
Particularly, described controller MCU presets drive singal and the second default drive singal for exporting first; Two-way amplitude is equal, frequency is equal, duty ratio is equal, the switch controlling signal of phase 180 degree for the described first default drive singal and the second default drive singal being converted to for described logical transition circuit 11; Described switch driving circuit 12 for equal according to described two-way amplitude, frequency is equal, duty ratio is equal, the switch controlling signal of phase 180 degree control described driving power VCC5 export the described positive and negative IGBT drive singal replaced.It should be noted that, two path control signal phase 180 degree, then switch driving circuit 12 can be made can to control driving power VCC5 according to two path control signal and export two kinds of corresponding power supply statuss.
In this preferred embodiment, above-mentioned driving power VCC5 is DC power supply, and controller MCU can be single-chip microcomputer or PWM controller etc.
Above-mentioned logical transition circuit 11 comprises the first power supply VCC1, second source VCC2, the first trigger U1, the first inverter I1, the second inverter I2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 7th resistance R7, the 8th resistance R8 and the first switch drive chip U3.
Wherein, described first switch drive chip U3 comprises supply pin VS, the first input pin
second input pin LinB, the first output pin OutA, the second output pin OutB and grounding leg GND; The first signal output part PWM of described controller MCU is connected with described first power supply VCC1 through described first resistance R1, and the secondary signal output SEL of described controller MCU is connected with described second source VCC2 through described 3rd resistance R3; One input of described first trigger U1 is connected with the first signal output part PWM of described controller MCU through described second resistance R2, another input of described first trigger U1 is connected with the secondary signal output SEL of described controller MCU through described 4th resistance R4, the output of described first trigger U1 is connected with one end of described 5th resistance R5 through described second inverter I2, the other end of described 5th resistance R5 respectively with first input pin of described first switch drive chip U3
be connected with the second input pin LinB; The supply pin VS of described first switch drive chip U3 is connected with described driving power VCC5 through described 7th resistance R7, the 8th resistance R8, the grounding leg GND ground connection of described first switch drive chip U3, the first output pin OutA of described first switch drive chip U3 is the first output of described logical transition circuit 11, and the second output pin OutB of described first switch drive chip U3 is the second output of described logical transition circuit 11.
Be understandable that, controller MCU exports two-way amplitude by the first output and the second output, frequency, duty ratio, the drive singal that phase place is all not identical, after carrying out logical process respectively through the inverter of correspondence and trigger, synthesize a way switch control signal, this way switch control signal is again after the first switch drive chip U3 carries out amplification and conversion process, convert two-way amplitude to equal, frequency is equal, duty ratio is equal, the switch controlling signal that phase is 180 degree, the level of this double switch control signal is one high and one low, switch between two kinds of on off states for control switch drive circuit 12, thus control driving power VCC5 and export two kinds of different voltage statuss, i.e. positive and negative alternately output.
In this logical transition circuit 11, the first electric capacity C1 ground connection is also set between the second resistance R2 and the first inverter I1, filtering is carried out to the signal exported through the second resistance R2.Similarly, the second electric capacity C2 can be set between the 4th resistance R4 and the first trigger U1, filtering is carried out to the signal exported through the 4th resistance R4.In addition, the power end of the first inverter I1 is connected with the 3rd filter capacitor C3.
It should be noted that, if carry out variable connector control, a logical transition circuit 11 can also be set up in parallel again, can refer to above-mentioned logical transition circuit 11 and realize, repeat no more herein.Directly can certainly set up the 4th power supply VCC4, the second trigger U2, the 3rd inverter I3, the 4th inverter I4, the 6th resistance R6, second switch driving chip U4 and the 4th filter capacitor C4 on the basis of former logical transition circuit 11; Second switch driving chip U4 and the first switch drive chip U3 adopts the field effect transistor driving chip of same model, such as, can adopt IR4428.Wherein, the first input end of described second trigger U2 is connected with the first signal output part PWM of described controller MCU through the 3rd inverter I3, the 4th resistance R4, second input of described second trigger U2 is connected with the output of the first inverter I1, the power end of the second trigger U2 is connected with the 4th power supply VCC4, and be connected to ground through the 4th filter capacitor C4, the second trigger U2 earth terminal ground connection; The output of the second trigger U2 is connected with one end of the 6th resistance R6 through the 4th inverter I4, the other end of the 6th resistance R6 and first input pin of second switch driving chip U4
be connected with the second input pin LinB; Supply pin VS is connected with described driving power VCC5 through described 7th resistance R7, the 8th resistance R8, and the connected mode of other pin of described first switch drive chip U3 is arranged with reference to the first switch drive chip U3, as shown in Figure 2.
In addition, this first switch drive chip U3 and second switch driving chip U4 is provided with filter capacitor equally, such as, 5th electric capacity C5, the 6th electric capacity C6, particularly, the supply pin VS of the first switch drive chip U3 and the supply pin VS of second switch driving chip U4 is also connected to ground through described 5th electric capacity C5, and the two ends of the 5th electric capacity C5 are connected in parallel to the 6th electric capacity C6, one end that anode and the supply pin VS of the 5th electric capacity C5 and first/second switch driving chip U3 of the 6th electric capacity C6 interconnect is connected, the minus earth of the 6th electric capacity C6.
Above-mentioned switch driving circuit 12 comprises the first switching tube Q1, second switch pipe Q2, the 3rd switching tube Q3, the 4th switching tube Q4, the 9th resistance R9, the tenth resistance R10, the 11 resistance R11, the 12 resistance R12, the 13 resistance RVCC5, the 14 resistance R14, the first diode D1, the second diode D2, the 3rd diode D3 and the 4th diode D4.
Wherein, the grid of the first switching tube Q1 is connected with the first output pin OutA of described first switch drive chip U3 through described 11 resistance R11, the 9th resistance R9 successively, the negative electrode of described first diode D1 is connected with the grid of described first switching tube Q1, and one end that anode and described 9th resistance R9, the 11 resistance R11 of described first diode D1 interconnect is connected; The source electrode of described first switching tube Q1 is connected with described driving power VCC5 through described 8th resistance R8, and drain electrode is connected with the drain electrode of described second switch pipe Q2; The grid of described second switch pipe Q2 is connected with first output of described first switch drive chip U3 through described 12 resistance R12, the 9th resistance R9 successively, the anode of described second diode D2 is connected with the grid of described second switch pipe Q2, and one end that negative electrode and described 11 resistance R11, the tenth resistance R10 of described second diode D2 interconnect is connected; The grid of described 3rd switching tube Q3 is connected with the second output pin OutB of described first switch drive chip U3 through described 13 resistance RVCC5, the tenth resistance R10 successively, the negative electrode of described 3rd diode D3 is connected with the grid of described 3rd switching tube Q3, and one end that anode and described tenth resistance R10, the 13 resistance RVCC5 of described 3rd diode D3 interconnect is connected; The source electrode of described 3rd switching tube Q3 is connected with described driving power VCC5 through described 8th resistance R8, and the drain electrode of described 3rd switching tube Q3 is connected with the drain electrode of described 4th switching tube Q4; The grid of described 4th switching tube Q4 is connected with second output of described first switch drive chip U3 through described 14 resistance R14, the tenth resistance R10, the anode of described 4th diode D4 is connected with the grid of described 4th switching tube Q4, and one end that negative electrode and described 14 resistance R14, the tenth resistance R10 of described 4th diode D4 interconnect is connected.
Wherein, the first switching tube Q1 and the 4th switching tube Q4 forms one group of switch, and control driving power VCC5 and export a kind of power supply status, second switch pipe Q2 and second switch pipe Q2 forms one group of switch, controls driving power VCC5 and exports another kind of power supply status.When to export high level signal, the second output be low level signal for the first output of logical transition circuit 11, the first switching tube Q1 and the 4th switching tube Q4 turns off, second switch pipe Q2 and the 3rd switching tube Q3 conducting.Wherein output low level signal during second switch pipe Q2 conducting, exports high level signal (output voltage of driving power VCC5) during the 3rd switching tube Q3 conducting.When the first output output low level signal of logical transition circuit 11, the second output are high level signal, the first switching tube Q1 and the 4th switching tube Q4 conducting, second switch pipe Q2 and the 3rd switching tube Q3 turns off.Wherein export high level signal (output voltage of driving power VCC5) during the first switching tube Q1 conducting, output low level signal during the 4th switching tube Q4 conducting.
Above-mentioned booster circuit 20 comprises transformer T1, this transformer T1 has the first primary input terminal, the second primary input terminal, the first secondary output end and second subprime output, first primary input terminal of described transformer T1 is connected with the common port of described 3rd switching tube Q3 and the 4th switching tube Q4, second primary input terminal of described transformer T1 is connected with the common port of described first switching tube Q1 and second switch pipe Q2, and first secondary output end of described transformer T1 and second subprime output form the output of described booster circuit 20 jointly.This transformer T1 is used for carrying out power supply output according to the control of switch driving circuit 12, out-put supply is carried out boosting process simultaneously.
In conjunction with above-described embodiment, when the first switching tube Q1 and the 4th switching tube Q4 conducting, when second switch pipe Q2 and the 3rd switching tube Q3 turns off, the first primary input terminal input high level signal of transformer T1, the i.e. output voltage of driving power VCC5, second primary input terminal input low level signal, then its first secondary output end exports as forward voltage, and second subprime output exports as reverse voltage.
When the first switching tube Q1 and the 4th switching tube Q4 conducting, when second switch pipe Q2 and the 3rd switching tube Q3 turns off, the first primary input terminal input low level signal of transformer T1, second primary input terminal input high level signal, the i.e. output voltage of driving power VCC5, then its first secondary output end exports as reverse voltage, and second subprime output exports as forward voltage.
Above-mentioned accumulator 30 comprises the 5th diode D5 and the 7th electric capacity C7, the anode of described 5th diode D5 is connected with first secondary output end of described transformer T1, the negative electrode of described 5th diode D5 and one end of described 7th electric capacity C7, the interconnecting by drive end of described IGBT, the other end of described 7th electric capacity C7 and the second subprime output of described transformer T1, the drain interconnection of described IGBT.It should be noted that, the 7th electric capacity C7 and above-mentioned transformer T1 forms resonant circuit, can improve output voltage.
Above-mentioned discharge circuit 40 comprises the 5th switching tube Q5 and the 15 resistance R15, the grid of described 5th switching tube Q5 is connected with first secondary output end of described transformer T1, one end that source electrode and the described 5th diode D5 and the 7th electric capacity C7 of described 5th switching tube Q5 interconnect is connected, and the drain electrode of described 5th switching tube Q5 is connected with the second subprime output of described transformer T1 through described 15 resistance R15.When first secondary output end of transformer T1 exports forward voltage, 5th switching tube Q5 turns off, when first secondary output end of transformer T1 exports reverse voltage, 5th switching tube Q5 opens, 7th electric capacity C7 is discharged by the 15 resistance R15, and when first secondary output end of transformer T1 exports forward voltage again, the 5th switching tube Q5 turns off, 7th electric capacity C7 stops electric discharge and again charges, and circulates with this.
Above-mentioned negative pressure generative circuit 50 comprises the 6th diode D6, the first voltage-stabiliser tube Z1, the 8th electric capacity C8 and the 9th electric capacity C9; The anode of described 6th diode D6 is connected with first secondary output end of described transformer T1, and the negative electrode of described 6th diode D6 is connected with the positive pole of the 8th electric capacity C8, and the negative pole of described 8th electric capacity C8 is connected with the second subprime output of described transformer T1; Described 9th electric capacity C9 and described first voltage-stabiliser tube Z1 is connected in parallel, and described 9th electric capacity C9 is connected with the second subprime output of described transformer T1 with one end of the anode interconnect of described first voltage-stabiliser tube Z1, described 9th electric capacity C9 is connected with the described other end of described 7th electric capacity C7 with one end of the cathode interconnect of described first voltage-stabiliser tube Z1.Wherein, the 8th electric capacity C8 is polar capacitor, and capacity relative the 9th electric capacity C9 and the 7th electric capacity C7 is larger.Because the first voltage-stabiliser tube Z1 is in parallel with the 9th electric capacity C9, the charging voltage amplitude of restriction the 9th electric capacity C9.
By reference to the accompanying drawings 1 and the physical circuit principle of Fig. 2 to above-mentioned booster circuit 20, discharge circuit 40, negative pressure generative circuit 50, accumulator 30 carry out entirety set forth:
When first secondary output end of transformer T1 exports forward voltage, when second subprime output exports reverse voltage, 5th switching tube Q5 is in off state, the junction capacitance of the 7th electric capacity C7 and IGBT carries out charging energy-storing, make IGBT conducting, because transformer T1 boosts to driving power VCC5, and the resonant circuit that the 7th electric capacity C7 is formed improves the starting resistor of IGBT, thus the conducting speed of IGBT is accelerated.
Simultaneously, the forward voltage that first secondary output end of transformer T1 exports also is charged to the 8th electric capacity C8 and the 9th electric capacity C9 by the 6th diode D6, due to the restriction of the first voltage-stabiliser tube Z1, charging voltage after 9th electric capacity C9 is full of electricity is the voltage U d1 at the first voltage-stabiliser tube Z1 two ends, and this Ud1 is negative pressure state.
When first secondary output end of transformer T1 exports reverse voltage, when second subprime output exports forward voltage, 5th switching tube Q5 is in conducting state, 7th electric capacity C7 is discharged by the 5th resistance R5, now the gate pole bias voltage of IGBT equals the tank voltage of the 7th electric capacity C7 and the voltage U d1 sum at the first voltage-stabiliser tube Z1 two ends, because Ud1 is negative pressure state, therefore the gate pole bias voltage of IGBT can be dragged down rapidly, and IGBT is turned off rapidly.
Further, this IGBT drive circuit also comprises clamp circuit 60 further, and described clamp circuit 60 is connected with the output of described accumulator 30.Damage when this clamp circuit 60 is for preventing the gate pole of IGBT to be in overvoltage.
Preferably, clamp circuit 60 comprises the second voltage-stabiliser tube Z2 and the 3rd voltage-stabiliser tube Z3, one end that negative electrode and the described 5th diode D5 and the 7th electric capacity C7 of described second voltage-stabiliser tube Z2 interconnect is connected, the anode of described second voltage-stabiliser tube Z2 is connected with the anode of described 3rd voltage-stabiliser tube Z3, and the negative electrode of described 3rd voltage-stabiliser tube Z3 is connected with the negative electrode of described 6th diode D6.The clamp circuit 60 that second voltage-stabiliser tube Z2 and the 3rd voltage-stabiliser tube Z3 forms limits the gate voltage scope of IGBT, and protection IGBT gate pole is not breakdown.
The foregoing is only the preferred embodiments of the present invention; not thereby the scope of the claims of the present invention is limited; every under inventive concept of the present invention; utilize the equivalent structure transformation that specification of the present invention and accompanying drawing content are done, or directly/be indirectly used in other relevant technical fields to include in scope of patent protection of the present invention.