CN108540118A - A kind of doubleway output Hall chip of SIP-3 encapsulation - Google Patents
A kind of doubleway output Hall chip of SIP-3 encapsulation Download PDFInfo
- Publication number
- CN108540118A CN108540118A CN201710127091.9A CN201710127091A CN108540118A CN 108540118 A CN108540118 A CN 108540118A CN 201710127091 A CN201710127091 A CN 201710127091A CN 108540118 A CN108540118 A CN 108540118A
- Authority
- CN
- China
- Prior art keywords
- output
- nmos tube
- sip
- voltage
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005538 encapsulation Methods 0.000 title claims abstract description 43
- 230000005611 electricity Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000005355 Hall effect Effects 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N ferric oxide Chemical compound O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/90—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of galvano-magnetic devices, e.g. Hall-effect devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
Landscapes
- Hall/Mr Elements (AREA)
- Measuring Magnetic Variables (AREA)
Abstract
The present invention provides a kind of doubleway output Hall chip that SIP 3 is encapsulated, including the first drive module, the second drive module, the first NMOS tube, the second NMOS tube, the first pull down resistor and the second pull down resistor；First drive module is for providing the first driving current；Second drive module is for providing the second driving current；The drain electrode of first NMOS tube is connected with the first signal output pin, source electrode ground connection；The drain electrode of second NMOS tube is connected with second signal output pin, source electrode ground connection；One end of first pull down resistor is grounded, and the other end is connected with the grid of the first NMOS tube；One end of second pull down resistor is grounded, and the other end is connected with the grid of the second NMOS tube；Voltage and second driving current voltage second pull down resistor at of first drive module at the first pull down resistor only makes one in the first NMOS tube and the second NMOS tube to be connected simultaneously.The doubleway output Hall chip that the SIP 3 of the present invention is encapsulated can realize simple two-way signal output under the encapsulation of SIP 3.
Description
Technical field
The present invention relates to the technical fields of semiconductor chip, more particularly to a kind of doubleway output Hall of SIP-3 encapsulation
Chip.
Background technology
When as soon as block metal to alive or wafer are placed vertically in magnetic field, the both ends of thin slice will produce
Potential difference, this phenomenon are referred to as Hall effect.Hall chip is a kind of Magnetic Sensor based on Hall effect, is imitated in Hall
It on the basis of answering principle, is made using integration packaging and packaging technology, can magnetic input signal be easily converted into reality
Electric signal in, while but also with the requirement easy to operate with reliability of industrial occasions practical application.Specifically, Hall switch
Output is digital quantity, by many non-electrical, non-magnetic physical quantity, such as power, torque, pressure, stress, position, displacement, speed plus
Speed, angle, angular speed, revolution, rotating speed and working condition changed time etc., be transformed into electricity being detected and
Control.For example, the switch that Hall element integrates regularly is arranged on object by precalculated position, when in moving object
Permanent magnet pass through it when, pulse signal can be obtained from measuring circuit.The fortune can be sensed out according to sequences of pulsed signals
The displacement of animal body.If measuring the umber of pulse sent out in the unit interval, its movement velocity can be determined.
In the prior art, Hall chip includes shown in the single channel output Hall chip and Fig. 2 of SIP-3 encapsulation shown in FIG. 1
SIP-4 encapsulation doubleway output Hall chip.Three pins of the single channel output Hall chip of SIP-3 encapsulation are respectively power supply
Positive pin, power cathode pin and signal output pin.Four pins difference of the doubleway output Hall chip of SIP-4 encapsulation
For positive pole pin, power cathode pin, the first signal output pin and second signal output pin.
The width of the single channel output Hall chip of SIP-3 encapsulation is 4.1mm.When the single channel using single SIP-3 encapsulation is defeated
When going out Hall chip control two-way output signal, Redundancy Design can not achieve.If Hall chip is damaged, two-way output letter
It number will break down simultaneously, and lead to the poor reliability of the Hall chip of the structure.
The package width of the doubleway output Hall chip of SIP-4 encapsulation is 5.4mm.When the two-way using SIP-4 encapsulation is defeated
It, can be according to two-way output signal when wherein output signal fails all the way when going out Hall chip control two-way output signal
State is found in time to make corresponding measure, therefore the Hall chip good reliability of the structure.However, the two-way of SIP-4 encapsulation is defeated
Go out Hall chip and inconvenience is brought to the design scheme of structure space, magnet and the consistency treatment of signal.
Invention content
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of two-way of SIP-3 encapsulation is defeated
Go out Hall chip, simple two-way signal output can be realized under SIP-3 encapsulation, and Hall chip is overcome to be set in structure space, magnet
Limitation in terms of the consistency treatment of meter and signal.
In order to achieve the above objects and other related objects, the present invention provides a kind of doubleway output Hall core of SIP-3 encapsulation
Piece, including the first drive module, the second drive module, the first NMOS tube, the second NMOS tube, the first pull down resistor and the second drop-down
Resistance；First drive module is for providing the first driving current, including the first Hall element, the amplifier and the compared with
One voltage current adapter；The first input end of the amplifier compared with is connected with positive pole pin, the second input terminal
It is connected with first Hall element, output end is connected with the input terminal of the first voltage current converter, first electricity
The output end of voltage-current converter is connected with the grid of first NMOS tube；Second drive module is driven for providing second
Streaming current, including the second Hall element, reversed comparison amplifier and second voltage current converter；The reverse phase comparison amplifier
First input end be connected with the positive pole pin, the second input terminal is connected with second Hall element, output end with
The input terminal of the second voltage current converter is connected, the output end of the second voltage current converter and described second
The grid of NMOS tube is connected；First input of the first input end of the amplifier compared with and the reverse phase comparison amplifier
Hold polarity identical；The drain electrode of first NMOS tube is connected with the first signal output pin, source electrode ground connection；Second NMOS tube
Drain electrode be connected with second signal output pin, source electrode ground connection；One end of first pull down resistor is grounded, the other end with it is described
The grid of first NMOS tube is connected；One end of second pull down resistor is grounded, the grid of the other end and second NMOS tube
It is connected；Voltage and second driving current of first driving current at first pull down resistor are under described second
Voltage at pull-up resistor only makes one in first NMOS tube and second NMOS tube to be connected simultaneously.
In one embodiment of the invention, the conducting voltage of the conducting voltage of first NMOS tube and second NMOS tube
It is identical.
In one embodiment of the invention, the gain amplifier phase of the amplifier compared with and the reverse phase comparison amplifier
Together.
In one embodiment of the invention, the first input end of the amplifier compared with and the reverse phase comparison amplifier
First input end be positive input terminal.
In one embodiment of the invention, the first input end of the amplifier compared with and the reverse phase comparison amplifier
First input end be negative input end.
In one embodiment of the invention, first pull down resistor is identical with the resistance value of second pull down resistor.
In one embodiment of the invention, the first voltage current converter and the second voltage current converter it is defeated
It is identical as the ratio of input voltage to go out electric current.
In one embodiment of the invention, the width of the doubleway output Hall chip of the SIP-3 encapsulation is 4.1mm.
In one embodiment of the invention, when the poles magnet S incude first Hall element and second Hall element,
The first signal output pin output is low level, and the second signal output pin output is high level.
In one embodiment of the invention, when the poles magnet N incude first Hall element and second Hall element,
The first signal output pin output is high level, and the second signal output pin output is low level.
As described above, the doubleway output Hall chip of the SIP-3 encapsulation of the present invention, has the advantages that：
(1) simple two-way signal output can be realized under SIP-3 encapsulation；
(2) limitation of the Hall chip in terms of the consistency treatment of structure space, Magnet design and signal is overcome.
Description of the drawings
Fig. 1 is shown as the structural schematic diagram of the single channel output Hall element of SIP-3 encapsulation in the prior art；
Fig. 2 is shown as the structural schematic diagram of the doubleway output Hall chip of SIP-4 encapsulation in the prior art；
Fig. 3 is shown as the structural schematic diagram of the doubleway output Hall chip of the SIP-3 encapsulation of the present invention；
Fig. 4 is shown as the structural schematic diagram of a preferred embodiment of the first drive module in the present invention；
Fig. 5 is shown as the structural schematic diagram of a preferred embodiment of the second drive module in the present invention.
Component label instructions
1 first drive module
11 first Hall elements
12 compared with amplifier
13 first voltage current converters
2 second drive modules
21 second Hall elements
22 reversed comparison amplifiers
23 second voltage current converters
3 first pull down resistors
4 second pull down resistors
5 first NMOS tubes
6 second NMOS tubes
Specific implementation mode
Illustrate that embodiments of the present invention, those skilled in the art can be by this explanations by particular specific embodiment below
Content disclosed by book understands other advantages and effect of the present invention easily.
It should be clear that structure, ratio, size etc. depicted in this specification institute accompanying drawings, only coordinating specification to be taken off
The content shown is not limited to the enforceable qualifications of the present invention so that those skilled in the art understands and reads, therefore
Do not have technical essential meaning, the modification of any structure, the change of proportionate relationship or the adjustment of size are not influencing the present invention
Under the effect of can be generated and the purpose that can reach, it should all still fall and obtain the model that can cover in disclosed technology contents
In enclosing.Meanwhile cited such as "upper" in this specification, "lower", "left", "right", " centre " and " one " term, be also only
Convenient for being illustrated for narration, rather than to limit the scope of the invention, relativeness is altered or modified, in no essence
It changes under technology contents, when being also considered as the enforceable scope of the present invention.
The doubleway output Hall chip of the SIP-3 encapsulation of the present invention can realize simple two-way signal output under SIP-3 encapsulation,
Overcome limitation of the Hall chip in terms of the consistency treatment of structure space, Magnet design and signal simultaneously.
As shown in figure 3, the doubleway output Hall chip of the SIP-3 encapsulation of the present invention includes three output pins, respectively
Positive pole pin, the first signal output pin and second signal output pin.
Specifically, the doubleway output Hall chip of SIP-3 of the invention encapsulation drives including the first drive module 1, second
Module 2, the first NMOS tube 5, the second NMOS tube 6, the first pull down resistor 3 and the second pull down resistor 4.
First drive module 1 is for providing the first driving current, as shown in figure 4, including the first Hall element 11, compared with
Compared with amplifier 12 and first voltage current converter 13；The first input end of amplifier 12 and positive pole pin phase compared with
Even, the second input terminal is connected with the first Hall element 11, and output end is connected with the input terminal of first voltage current converter 13, the
The output end of one voltage current adapter 13 is connected with the grid of the first NMOS tube 5.
Second drive module 2 is for providing the second driving current, as shown in figure 5, including the second Hall element 21, reversed ratio
Compared with amplifier 22 and second voltage current converter 23；The first input end of reverse phase comparison amplifier 22 and positive pole pin phase
Even, the second input terminal is connected with the second Hall element 21, and output end is connected with the input terminal of second voltage current converter 23, the
The output end of two voltage current adapters 23 is connected with the grid of the second NMOS tube.
It is identical with the first input end for the amplifier 12 that compares and the first input end polarity of reverse phase comparison amplifier 22.
5 drain electrodes of the first NMOS tube are connected with the first signal output pin, source electrode ground connection；The drain electrode of second NMOS tube 6 with
Second signal output pin is connected, source electrode ground connection.
One end of first pull down resistor 3 is grounded, and the other end is connected with the grid of the first NMOS tube 5.
One end of second pull down resistor 4 is grounded, and the other end is connected with the grid of the second NMOS tube 6.
Voltage and second driving current of first driving current at the first pull down resistor 3 are at the second pull down resistor 4
Voltage only makes one in the first NMOS tube 5 and the second NMOS tube 6 to be connected simultaneously.
The circuit theory of the brief description once doubleway output Hall chip of SIP-3 encapsulation of the invention.First driving mould
Block and the second drive module provide the first driving current and the second driving current respectively, and by under the first pull down resistor and second
Pull-up resistor provides a grid voltage to the grid of the first NMOS tube and the second NMOS tube respectively.Due to the first NMOS tube and second
The source electrode of NMOS tube is grounded, therefore when above-mentioned grid voltage is more than the conducting voltage of NMOS tube, NMOS tube conducting, drain electrode exports low
Level；When above-mentioned grid voltage is less than the conducting voltage of NMOS tube, NMOS tube cut-off, drain electrode output high level.Due to first
Voltage and second driving current voltage second pull down resistor at of the driving current at the first pull down resistor while only one
A conducting voltage more than NMOS tube, therefore the first signal output pin and second signal output pin export low and high level respectively,
To realize the switch control of Hall chip.
Preferably, the conducting voltage of the first NMOS tube is identical with the conducting voltage of the second NMOS tube.
Preferably, with compare amplifier and the gain amplifier of reverse phase comparison amplifier it is identical.
Preferably, the first input end of the first input end of amplifier and reverse phase comparison amplifier is just defeated compared with
Enter end.
Preferably, the first input end of the first input end of amplifier and reverse phase comparison amplifier is negative defeated compared with
Enter end.
Preferably, the resistance value of the first pull down resistor and the second pull down resistor is identical.
Preferably, the ratio of the output current and input voltage of first voltage current converter and second voltage current converter
It is worth identical.
Preferably, the width of the doubleway output Hall chip of SIP-3 of the invention encapsulation is 4.1mm.
The use principle of the doubleway output Hall chip of SIP-3 encapsulation of the invention is simply illustrated below.
Specifically, the first signal output pin and second signal output pin are passed through into the first pull-up resistor respectively when use
It is connected to external power supply with the second pull-up resistor.
When the poles magnet S incude the first Hall element and the second Hall element, the first drive module is in the first pull down resistor
The voltage at place is high level, and the conducting of the first NMOS tube, then the first signal output pin output is low level, and the second drive module exists
Voltage at second pull down resistor is low level, and the cut-off of the second NMOS tube, then second signal output pin output is high level.
When the poles magnet N incude the first Hall element and the second Hall element, the first drive module is in the first pull down resistor
The voltage at place is low level, and the cut-off of the first NMOS tube, then the first signal output pin output is high level, and the second drive module exists
Voltage at second pull down resistor is high level, and the conducting of the second NMOS tube, then second signal output pin output is low level.
Therefore, the doubleway output Hall chip of SIP-3 of the invention encapsulation can export high level and low level two simultaneously
Road signal can in time be found corresponding to make when wherein output signal fails all the way according to the state of two-way output signal
Measure, to have high reliability.
In conclusion the doubleway output Hall chip of the SIP-3 encapsulation of the present invention can realize two-way under SIP-3 encapsulation
Signal exports；Overcome limitation of the Hall chip in terms of the consistency treatment of structure space, Magnet design and signal.So
The present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology can all carry out modifications and changes to above-described embodiment without violating the spirit and scope of the present invention.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should by the present invention claim be covered.
Claims (10)
1. a kind of doubleway output Hall chip of SIP-3 encapsulation, it is characterised in that：Including the first drive module, the second driving mould
Block, the first NMOS tube, the second NMOS tube, the first pull down resistor and the second pull down resistor；
First drive module is for providing the first driving current, including the first Hall element, the amplifier and the compared with
One voltage current adapter；The first input end of the amplifier compared with is connected with positive pole pin, the second input terminal
It is connected with first Hall element, output end is connected with the input terminal of the first voltage current converter, first electricity
The output end of voltage-current converter is connected with the grid of first NMOS tube；
Second drive module is for providing the second driving current, including the second Hall element, reversed comparison amplifier and the
Two voltage current adapters；The first input end of the reverse phase comparison amplifier is connected with the positive pole pin, and second is defeated
Entering end with second Hall element to be connected, output end is connected with the input terminal of the second voltage current converter, and described the
The output end of two voltage current adapters is connected with the grid of second NMOS tube；
It is described identical with the first input end for the amplifier that compares and the first input end polarity of reverse phase comparison amplifier；
The drain electrode of first NMOS tube is connected with the first signal output pin, source electrode ground connection；The drain electrode of second NMOS tube
It is connected with second signal output pin, source electrode ground connection；
One end of first pull down resistor is grounded, and the other end is connected with the grid of first NMOS tube；
One end of second pull down resistor is grounded, and the other end is connected with the grid of second NMOS tube；
Voltage and second driving current of first driving current at first pull down resistor are under described second
Voltage at pull-up resistor only makes one in first NMOS tube and second NMOS tube to be connected simultaneously.
2. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：First NMOS
The conducting voltage of pipe is identical with the conducting voltage of second NMOS tube.
3. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：It is described compared with
Amplifier is identical with the gain amplifier of the reverse phase comparison amplifier.
4. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：It is described compared with
The first input end of the first input end of amplifier and the reverse phase comparison amplifier is positive input terminal.
5. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：It is described compared with
The first input end of the first input end of amplifier and the reverse phase comparison amplifier is negative input end.
6. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：First drop-down
Resistance is identical with the resistance value of second pull down resistor.
7. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：The first voltage
The output current of current converter and the second voltage current converter is identical as the ratio of input voltage.
8. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：The SIP-3 encapsulation
Doubleway output Hall chip width be 4.1mm.
9. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：When the poles magnet S incude
When first Hall element and second Hall element, first signal output pin output is low level, described the
The output of binary signal output pin is high level.
10. the doubleway output Hall chip of SIP-3 encapsulation according to claim 1, it is characterised in that：When the poles magnet N are felt
When answering first Hall element and second Hall element, the first signal output pin output is high level, described
The output of second signal output pin is low level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710127091.9A CN108540118B (en) | 2017-03-06 | 2017-03-06 | SIP-3 packaged double-output Hall chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710127091.9A CN108540118B (en) | 2017-03-06 | 2017-03-06 | SIP-3 packaged double-output Hall chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108540118A true CN108540118A (en) | 2018-09-14 |
| CN108540118B CN108540118B (en) | 2024-06-18 |
Family
ID=63489450
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710127091.9A Active CN108540118B (en) | 2017-03-06 | 2017-03-06 | SIP-3 packaged double-output Hall chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108540118B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101697468A (en) * | 2009-10-14 | 2010-04-21 | 无锡海威半导体科技有限公司 | Low-voltage BLDC motor drive integrated circuit |
| US20110304372A1 (en) * | 2010-06-11 | 2011-12-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and apparatus for amplifying a time difference |
| CN103825591A (en) * | 2014-03-13 | 2014-05-28 | 北京经纬恒润科技有限公司 | Switch type Hall chip |
| CN204290936U (en) * | 2014-12-08 | 2015-04-22 | Tcl通力电子（惠州）有限公司 | Single channel turns two-way drive circuit |
| WO2015089954A1 (en) * | 2013-12-20 | 2015-06-25 | 京东方科技集团股份有限公司 | Shift register unit, gate drive circuit and display device |
| CN105312453A (en) * | 2014-09-19 | 2016-02-10 | 东风汽车电子有限公司 | Hall element lead foot shaping clamp |
| CN206650648U (en) * | 2017-03-06 | 2017-11-17 | 上海森太克汽车电子有限公司 | The doubleway output Hall chip that a kind of SIP 3 is encapsulated |
-
2017
- 2017-03-06 CN CN201710127091.9A patent/CN108540118B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101697468A (en) * | 2009-10-14 | 2010-04-21 | 无锡海威半导体科技有限公司 | Low-voltage BLDC motor drive integrated circuit |
| US20110304372A1 (en) * | 2010-06-11 | 2011-12-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and apparatus for amplifying a time difference |
| WO2015089954A1 (en) * | 2013-12-20 | 2015-06-25 | 京东方科技集团股份有限公司 | Shift register unit, gate drive circuit and display device |
| CN103825591A (en) * | 2014-03-13 | 2014-05-28 | 北京经纬恒润科技有限公司 | Switch type Hall chip |
| CN105312453A (en) * | 2014-09-19 | 2016-02-10 | 东风汽车电子有限公司 | Hall element lead foot shaping clamp |
| CN204290936U (en) * | 2014-12-08 | 2015-04-22 | Tcl通力电子（惠州）有限公司 | Single channel turns two-way drive circuit |
| CN206650648U (en) * | 2017-03-06 | 2017-11-17 | 上海森太克汽车电子有限公司 | The doubleway output Hall chip that a kind of SIP 3 is encapsulated |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108540118B (en) | 2024-06-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN202256454U (en) | Current sensor | |
| CN102279305A (en) | Closed loop magnetic balance type Hall current sensor | |
| CN103487767A (en) | Load driving circuit and electronic load | |
| CN206650648U (en) | The doubleway output Hall chip that a kind of SIP 3 is encapsulated | |
| CN104655919A (en) | Single-magnetic-core quasi digital type direct current high-current sensor | |
| CN101813757A (en) | Magnetic sensor circuit | |
| CN207113898U (en) | A kind of Hall magnetic rotary displacement transducer control circuit | |
| CN101261311B (en) | Output contact for feedback in integrated circuit motor driver | |
| CN108195442A (en) | TMR liquid level sensors | |
| CN202171609U (en) | Current induction detection circuit | |
| CN108540118A (en) | A kind of doubleway output Hall chip of SIP-3 encapsulation | |
| CN203323808U (en) | Water meter measurement module | |
| CN201355795Y (en) | Electronic reversing DC motor with nine reversing units | |
| CN110530437A (en) | A kind of directly excitation formula angle position sensing metering device | |
| CN104568033B (en) | High frequency excitation unit | |
| CN103453951A (en) | Synchronous sampling method and device for signals of electromagnetic flowmeter | |
| CN209820546U (en) | Antimagnetic metering device | |
| CN213423312U (en) | Drive circuit for closed-loop current sensor | |
| CN202048885U (en) | Magnetic induction type position detecting device | |
| CN204595058U (en) | Non-contact type current determinator | |
| CN207908005U (en) | TMR liquid level sensors | |
| CN101769954B (en) | Voltage detecting circuit for multiple serial batteries | |
| CN204681284U (en) | A kind of two-phase motor frequency-changing control system based on DSP | |
| CN203537280U (en) | A position detecting device | |
| CN208706362U (en) | A kind of 380V electricity permanent magnetic controller device of simple low-power consumption |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant |