CN102176449B - 一种高密度系统级封装结构 - Google Patents
一种高密度系统级封装结构 Download PDFInfo
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Abstract
本发明涉及一种高密度系统级封装结构,包括线路整理晶圆;位于线路整理晶圆上的至少一组倒装封装层;位于倒装封装层上的至少一组布线封装层;位于末组布线封装层上的引线键合封装层;设置于线路整理晶圆下方的连接球。与现有技术相比,本发明请求保护的一种高密度系统级封装结构,可以形成包含整体系统功能而非单一的芯片功能的最终封装产品,降低了系统内电阻、电感以及芯片间的干扰因素。此外,可以形成更为复杂的多层互联结构,实现封装密度更高的系统级封装。
Description
技术领域
本发明涉及半导体技术,尤其涉及一种高密度系统级封装结构。
背景技术
随着集成电路技术的不断发展,电子产品越来越向小型化、智能化、高性能以及高可靠性方向发展。而集成电路封装不仅直接影响着集成电路、电子模块乃至整机的性能,而且还制约着整个电子系统的小型化、低成本和可靠性。在集成电路晶片尺寸逐步缩小,集成度不断提高的情况下,电子工业对集成电路封装技术提出了越来越高的要求。
在公告号为CN1747156C的中国专利中就公开了一种封装线路整理晶圆。所述封装线路整理晶圆包括:线路整理晶圆,所述线路整理晶圆包括一表面;位于所述线路整理晶圆表面上的接球垫;形成于所述线路整理晶圆表面上的防焊层,所述防焊层包括至少一开口,所述开口露出所述接球垫;所述封装线路整理晶圆还包括一图案化金属补强层,所述图案化金属补强层沿着所述防焊层开口的侧壁形成于所述接球垫上。
按照上述方法所封装制造的最终产品仅具有单一的芯片功能,然而,随着半导体产品轻薄短小的趋势以及产品系统功能需求的不断提高,如何进一步提高系统级封装的集成性成为本领域技术人员亟待解决的问题。
发明内容
本发明解决的技术问题是:如何实现具有多层结构的高密度系统级封装。
为解决上述技术问题,本发明提供一种高密度系统级封装结构,包括:线路整理晶圆;位于线路整理晶圆上的至少一组倒装封装层,所述倒装封装层包括依次位于线路整理晶圆上的第一倒贴装层、底部填充、第一封装层、第一布线层;所述第一布线层包括贯穿第一封料层的第一纵向布线、覆盖于第一封料层上且与所述第一纵向布线相连的第一横向布线;
位于倒装封装层上的至少一组布线封装层,所述布线封装层包括依次位于倒装封装层上的第一正贴装层、第二封料层、第二布线层;
所述第二封料层填充于所述第一正贴装层的各半导体器件之间,所述第二封料层的高度不高于所述第一正贴装层的高度以裸露出所述第一正贴装层中半导体器件的连接部件;
所述第二布线层包括贯穿第二封料层的第二纵向布线、覆盖于第二封料层上且与所述第二纵向布线相连的第二横向布线。
位于末组布线封装层上的引线键合封装层,所述引线键合封装层包括依次位于末组布线封装层上的正贴装层、金属引线、封料层;设置于线路整理晶圆下方的连接球;其中,线路整理晶圆、各封装层之间透过布线层实现相邻封装层或间隔封装层间的电互联;
可选地,所述引线键合封装层中的金属引线在引线键合封装层的贴装层与末组布线封装层中的布线层间形成电性互联。
可选地,所述线路整理晶圆设有上下表面,所述上下表面上设有焊盘。
可选地,所述线路整理晶圆上表面的焊盘间距小于下表面的焊盘间距。
可选地,所述贴装层中包括芯片,所述芯片为单颗或多颗。
可选地,所述贴装层还包括无源器件,所述无源器件为电容、电阻或电感中的一种或多种。
与现有技术相比,本发明请求保护的一种高密度系统级封装结构,将芯片和无源器件进行整合后再一并封装,可以形成包含整体系统功能而非单一的芯片功能的最终封装产品;同时,多层封装层间透过布线层更实现了三维立体角度的高密度系统互联,相比现有的系统级封装,多层布线结构充分利用了芯片本身的厚度,在满足半导体封装轻薄短小趋势要求以及更复杂的系统功能整合要求的同时,更好地降低了系统内电阻、电感以及芯片间的干扰因素,结构强度以及产品可靠性得到很好地加强。
附图说明
图1为本发明一种高密度系统级封装结构一实施例的示意图。
具体实施方式
在下面的描述中阐述了很多具体细节以便于充分理解本发明。但是本发明能够以很多不同于在此描述的其它方式来实施,本领域技术人员可以在不违背本发明内涵的情况下做类似推广,因此本发明不受下面公开的具体实施的限制。
其次,本发明利用示意图进行详细描述,在详述本发明实施例时,为便于说明,所述示意图只是实例,其在此不应限制本发明保护的范围。
本发明提供一种高密度系统级封装结构,包括:线路整理晶圆;位于线路整理晶圆上的至少一组倒装封装层,所述倒装封装层包括依次位于线路整理晶圆上的倒贴装层、底部填充、封料层、布线层;位于倒装封装层上的至少一组布线封装层,所述布线封装层包括依次位于倒装封装层上的正贴装层、封料层、布线层;位于末组布线封装层上的引线键合封装层,所述引线键合封装层包括依次位于末组布线封装层上的正贴装层、金属引线、封料层;设置于线路整理晶圆下方的连接球;其中,线路整理晶圆、各封装层之间透过布线层实现相邻封装层或间隔封装层间的电互联。
下面结合附图对本发明的具体实施方式做详细的说明。
参考图1,示出了本发明一种高密度系统级封装结构一实施例的示意图,本实施例中,所述一种高密度系统级封装结构以第一倒装封装层、第一布线封装层和第一引线键合封装层为例,但是本发明不限制与此,所述一种高密度系统级封装结构包括:线路整理晶圆101、位于线路整理晶圆101上的第一倒装封装层、位于第一倒装封装层上的第一布线封装层、位于第一布线封装层上的第一引线键合封装层、设置于线路整理晶圆101下方的连接球113。其中,
线路整理晶圆101是后续堆叠各封装层的基础,同时,也是承载后续各层封装层的基础,所述线路整理晶圆101包括两个功能面,其中,所述线路整理晶圆101的第一表面用于进行封装层的堆叠,所述线路整理晶圆101的第二表面用于植球(植入连接球),本实施例中,所述线路整理晶圆101的上表面用于进行封装层的堆叠,所述线路整理晶圆101的下表面用于植球,所述线路整理晶圆101的上、下表面均设置有用于实现电连接的焊盘,上下表面的焊盘通过线路整理晶圆101内部的连接走线实现导通,其中,所述线路整理晶圆101上表面的焊盘间距可以小于其下表面的焊盘间距,目的是上表面的密间距焊盘以顺应芯片高精度、高集成度的技术要求,下表面较宽松的焊盘间距以适应最终产品SMT(表面贴装)时技术精度相对较低的要求,因此,此处线路整理晶圆不但可以对后续的封装层进行线路整理,还可以作为芯片制造技术和元器件贴装技术间的精度桥梁。
第一倒装封装层中包括依次位于线路整理晶圆101上的第一倒贴装层102、底部填充、第一封料层105、第一布线层106。其中,
所述第一倒贴装层102包括多种半导体器件,本实施例中,所述第一倒贴装层102包括芯片和无源器件,并按照功能面朝下的方式贴附于线路整理晶圆101上,所述第一倒贴装层102的功能面,是指第一倒贴装层102中的芯片的功能焊点103和无源器件的焊盘所在表面。第一倒贴装层102中芯片的功能焊点103、无源器件的焊盘与线路整理晶圆101上表面的焊盘互联。
在本发明的一个优选的实施例中,设置于线路整理晶圆101之上的第一倒贴装层102及后续提及的贴装层都可以包含一个或多个相同或不同芯片,还可以包括一个或多个相同或不同的无源器件。这些芯片和无源器件各自成为一个系统级封装产品的一部分,各自完成实现系统级功能中的一个或多个单独的功能。
在本发明的一个优选的实施例中,第一倒贴装层102中的芯片与无源器件的组合是根据系统功能来配置的。因此,在一个或一组芯片的周围,可能有相同或不同的另外的一个或一组芯片,或者相同或不同的电容、电阻或电感等无源器件;类似的,在一个无源器件的周围,可能有相同或不同的其他的无源器件,或者一个或多个相同或不同芯片。
第一倒贴装层102的芯片与线路整理晶圆101间的间隙中设有填充料104以构成底部填充,进而避免后续封料层中内部空洞等产品可靠性问题。所述填充料104可以是高分子环氧树脂,这种材料的流动性好,能够充分填充倒装芯片与封料层间的间隙。
第一封料层105将第一倒贴装层102的各个器件包覆密封以形成固定和保护,既可作为后续工艺的承载体,同时还用于绝缘和隔离不同封装层。较佳地,所述第一封料层105的材料是环氧树脂,因为环氧树脂的密封性能好,塑型容易,是形成第一封料层105的优选材料,通常可以采用诸如转注、压缩或印刷的方法形成第一封料层105。
第一布线层106包括第一纵向布线和第一横向布线。其中,所述第一纵向布线为贯穿所述第一封料层105的导线(例如,金属导线),用于实现第一倒装封装层与线路整理晶圆101间的电连接;所述第一横向布线覆盖于第一封料层105上且与所述第一纵向布线相连,用于实现第一倒装封装层与后续封装层间的电连接。本实施例中,所述第一纵向布线与线路整理晶圆101上表面的焊盘导通互联,第一横向布线与第一纵向布线、以及后续第一布线封装层中的第二布线层导通互联。
第一布线封装层中包括依次位于第一倒装封装层上的第一正贴装层107、第二封料层108、第二布线层109。
所述第一正贴装层107也包括多种半导体器件,本实施例中,所述第一正贴装层107包括芯片和无源器件,并按照功能面朝上的方式贴附于第一封料层105上,所述第一正贴装层的功能面,是指第一正贴装层107中的芯片的焊盘和无源器件的焊盘所在表面。所述第一正贴装层107与第一倒贴装层102类似,可以包含一个或多个相同或不同芯片,还可以包括一个或多个相同或不同的无源器件。
第二封料层108固定及保护第一正贴装层107的各个器件,形成使第一正贴装层107中芯片和无源器件的焊盘裸露的封装体,裸露的芯片和无源器件的焊盘用于在第二封料层108内及各封装层间形成电连接。形成第二封料层108的材料可以与形成第一封料层105的材料相同,即采用环氧树脂来形成第二封料层108。
第二布线层109包括第二纵向布线和第二横向布线。其中,所述第二纵向布线为贯穿所述第二封料层108的导线(例如,金属导线),用于实现与第一布线层106的第一横线布线间的导通互联,根据设计需求,所述第二纵向布线还可用于实现与线路整理晶圆101之间的电连接;所述第二横向布线为覆盖于所述第二封料层108上的导线(例如,金属导线),所述第二横向布线连接于第二纵向布线,用于实现第一正贴装层107的各器件之间的电连接,本实施例中,具体地,所述第二横向布线与第一正贴装层107中芯片和无源器件的焊盘相连。
实际应用中,可以根据设计需求有选择地在封料层中设置纵向布线,以实现各封装层之间或封装层和线路整理晶圆101之间的电连接,由于封料层具有良好的绝缘性,可以避免各封装层中器件之间的干扰。
第一引线键合封装层包括依次位于第一布线封装层上的第二正贴装层110、金属引线111、第三封料层112。
所述第二正贴装层110与第一正贴装层107类似,可以包含一个或多个相同或不同芯片,还可以包括一个或多个相同或不同的无源器件。
所述引线键合封装层中的金属引线111在引线键合封装层的第二正贴装层110与第一布线封装层中的第二布线层109间形成电性互联。本实施例中,具体地,所述金属引线111将第二正贴装层110中的芯片焊盘与第二布线层109的第二横向布线导通互联。
第三封料层112包覆密封第二正贴装层110及金属引线111形成封装体,以避免外界环境的污染和侵蚀。形成第三封料层112的材料可以与形成第一封料层105和第二封料层108的材料相同,即采用环氧树脂来形成第三封料层112。
所述一种高密度系统级封装结构还包括设置于线路整理晶圆101下方的连接球113,所述连接球113与线路整理晶圆101下表面的焊盘相连。形成所述连接球113的材料可以是金属锡、锡合金等多种金属。
本发明一种高密度系统级封装结构,线路整理晶圆、各封装层间实现了相邻或相隔封装层间的互联,再经由线路整理晶圆内部的线路整理实现了系统的整合,最终通过连接球将功能输出。
虽然本发明已以较佳实施例披露如上,但本发明并非限定于此。任何本领域技术人员,在不脱离本发明的精神和范围内,均可作各种更动与修改,因此本发明的保护范围应当以权利要求所限定的范围为准。
Claims (6)
1.一种高密度系统级封装结构,其特征在于,包括:线路整理晶圆;位于线路整理晶圆上的至少一组倒装封装层,所述倒装封装层包括:依次位于线路整理晶圆上的第一倒贴装层、底部填充、第一封装层、第一布线层;所述第一布线层包括贯穿第一封料层的第一纵向布线、覆盖于第一封料层上且与所述第一纵向布线相连的第一横向布线;
倒装封装层上包括两组以上布线封装层,所述布线封装层包括:依次位于倒装封装层上的第一正贴装层、第二封料层、第二布线层;
所述第二封料层填充于所述第一正贴装层的各半导体器件之间,所述第二封料层的高度不高于所述第一正贴装层的高度以裸露出所述第一正贴装层中半导体器件的连接部件;
每组贴装层侧面和顶面的封装材料相同;
所述第二布线层包括贯穿第二封料层的第二纵向布线、覆盖于第二封料层上且与所述第二纵向布线相连的第二横向布线;
相邻布线封装层中的第二纵向布线错位设置;
位于末组布线封装层上的引线键合封装层,所述引线键合封装层包括依次位于末组布线封装层上的正贴装层、金属引线、封料层;设置于线路整理晶圆下方的连接球;其中,线路整理晶圆、各封装层之间透过布线层实现相邻封装层或间隔封装层间的电互联。
2.如权利要求1所述的一种高密度系统级封装结构,其特征在于,所述引线键合封装层中的金属引线在引线键合封装层的贴装层与末组布线封装层中的布线层间形成电性互联。
3.如权利要求1~2任一权利要求所述的一种高密度系统级封装结构,其特征在于:所述线路整理晶圆设有上下表面,所述上下表面上设有焊盘。
4.如权利要求3所述的一种高密度系统级封装结构,其特征在于:所述线路整理晶圆上表面的焊盘间距小于下表面的焊盘间距。
5.如权利要求1~2任一权利要求所述的一种高密度系统级封装结构,其特征在于:所述贴装层中包括芯片,所述芯片为单颗或多颗。
6.如权利要求5所述的一种高密度系统级封装结构,其特征在于:所述贴装层还包括无源器件,所述无源器件为电容、电阻或电感中的一种或多种。
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