CN102111965B - Method for fabricating circuit board - Google Patents
Method for fabricating circuit board Download PDFInfo
- Publication number
- CN102111965B CN102111965B CN 200910312489 CN200910312489A CN102111965B CN 102111965 B CN102111965 B CN 102111965B CN 200910312489 CN200910312489 CN 200910312489 CN 200910312489 A CN200910312489 A CN 200910312489A CN 102111965 B CN102111965 B CN 102111965B
- Authority
- CN
- China
- Prior art keywords
- product area
- insulating barrier
- copper foil
- circuit board
- foil layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title abstract description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 55
- 239000011889 copper foil Substances 0.000 claims abstract description 40
- 239000000047 product Substances 0.000 claims description 52
- 230000004888 barrier function Effects 0.000 claims description 38
- 239000000758 substrate Substances 0.000 claims description 31
- 238000004519 manufacturing process Methods 0.000 claims description 20
- 229910052802 copper Inorganic materials 0.000 claims description 15
- 239000010949 copper Substances 0.000 claims description 15
- 238000003466 welding Methods 0.000 claims description 11
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 239000006227 byproduct Substances 0.000 claims description 2
- 238000009413 insulation Methods 0.000 abstract 1
- 229910000679 solder Inorganic materials 0.000 abstract 1
- 239000012535 impurity Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 4
- 239000003292 glue Substances 0.000 description 4
- 238000003825 pressing Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000003854 Surface Print Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 238000009422 external insulation Methods 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 239000004922 lacquer Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
Images
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- Manufacturing Of Printed Wiring (AREA)
Abstract
The method for fabricating a circuit board comprises the following steps: a circuit board including a product area and a non-product area surrounding the product area is provided with a first insulating layer, a first copper foil layer formed on one side of the first insulating layer, and lateral surfaces; a first circuit graph is formed in the first copper foil layer corresponding to the product area, the first copper foil layer corresponding to the non-product area is removed to enable that part of the first insulating layer is exposed out of the lateral surfaces or one side near to the first copper foil layer, and the first circuit graph comprises a first conductive circuit; insulation covering layers are respectively formed on the lateral surfaces of the circuit board and the surface in the non-product area with the first insulating layer exposed out of one side of the first copper foil layer; a solder mask layer is formed on the surface of the first conductive circuit; and the non-product area is separated from the product area, so that the circuit board formed by the product area is obtained.
Description
Technical field
The present invention relates to the print circuit plates making field, relate in particular to a kind of manufacture method of circuit board.
Background technology
Printed circuit board (PCB) is widely used because having the packaging density advantages of higher.Application about high-density interconnected circuit board sees also document Takahashi, A.Ooki, N.Nagai, A.Akahoshi, H.Mukoh, A.Wajima, M.Res.Lab., High density multilayer printed circuit board for HITAC M-880, IEEETrans.on Components, Packaging, and Manufacturing Technology, 1992,15 (4): 418-425.
In the circuit board making process, usually adopt double face copper, two-sided copper-clad plate generally includes two-layer Copper Foil and is sandwiched in insulating barrier between two Copper Foils, and this insulating barrier is made by materials such as glass-fiber-fabric and glue usually.In the process that conducting transmission line is made, need to carry out etching to two Copper Foils, thereby will in copper foil layer, form the conducting wire.In carrying out etched process, because the etched removal of Copper Foil of copper-clad plate edge, so that insulating layer exposing outside, the materials such as the glass fibre that wherein exposes, glue are easily at follow-up surface treatment process, produce foreign matter impurity such as gold-plated, the green lacquer of solder-mask printing etc., cause easily the bad of product, not and the equipment of contaminate subsequent processing procedure, to cause the bad of circuit board product.
Summary of the invention
Therefore, be necessary to provide a kind of circuit board manufacturing method, can effectively prevent from producing in the board production process foreign matter impurity to the impact of the circuit board of production.
Below will a kind of circuit board manufacturing method be described with embodiment.
A kind of circuit board manufacturing method, comprise step: provide the circuit substrate that comprises product area and non-product area, described non-product area is around described product area, described circuit substrate has the first insulating barrier and is formed at the first copper foil layer of the first insulating barrier one side, and described circuit substrate has the side; In the first copper foil layer corresponding to described product area, form the first line pattern, and thereby the first copper foil layer that non-product area is corresponding removes so that part the first insulating barrier exposes from the side and near a side of the first copper foil layer, and described the first circuit graphics package is drawn together the first conducting wire; The first insulating barrier forms insulating cover on the surface of exposing near the first copper foil layer one side in the side of circuit substrate and non-product area; Form welding resisting layer on surface, described the first conducting wire; Described non-product area is separated from described product area, thereby obtain the circuit board that consisted of by product area.
The circuit board manufacturing method that the technical program provides, after etching forms the outer-layer circuit figure, the surface of insulating layer that the non-product area of circuit board is exposed has formed insulating cover, thereby can avoid the equipment of the dirty contaminating impurity successive process that the insulating barrier that exposes produces, also avoid the above-mentioned dirty impurity of circuit substrate surface adhesion and caused the product of successive process bad, thereby can promote the yield of circuit board making.
Description of drawings
Fig. 1 is the schematic diagram of the circuit substrate that provides of the technical program embodiment.
Fig. 2 is that Fig. 1 is along the cut-away view of II-II line.
Fig. 3 is the schematic diagram after the circuit substrate that provides of the technical program embodiment forms line pattern.
Fig. 4 is the schematic diagram after the circuit substrate that provides of the technical program embodiment forms insulating cover.
Fig. 5 is the schematic diagram after conducting wire surface that the technical program embodiment provides forms welding resisting layer.
Fig. 6 is the schematic diagram behind the weld pad plated with gold layer of the circuit substrate that provides of the technical program embodiment.
Fig. 7 is the schematic diagram of the circuit board that completes that provides of the technical program embodiment.
The main element symbol description
Embodiment
Below in conjunction with drawings and Examples the circuit board manufacturing method that the technical program provides is described further.
A kind of circuit board manufacturing method that the technical program the first embodiment provides, described circuit board manufacturing method comprises step:
See also Fig. 1 and Fig. 2, the first step provides circuit substrate 100.
The first copper-clad plate 110 has the first copper foil layer 111 and 112, the second copper-clad plates 120 of the first insulating barrier have the second copper foil layer 121 and the second insulating barrier 122.The first copper foil layer 111 and the second copper foil layer 121 lay respectively at the first insulating barrier 112 and the second insulating barrier 122 away from a side of double face copper 130.Double face copper 130 has the 3rd insulating barrier 131 and is formed at the internal layer conducting wire 132 of the 3rd insulating barrier 131 relative both sides.
Second step sees also Fig. 3, forms a plurality of the first line patterns 113 in the zone of more than 111 product area 101 correspondences of the first copper foil layer, forms a plurality of the second line patterns 123 in the zone of more than 121 product area 101 correspondences of the second copper foil layer.
Before this step, can further include the step of dragging for the limit, be about to because the double face copper 130 of the circuit substrate 100 that pressing forms, the first copper-clad plate 110 and the second copper-clad plate 120 unnecessary rim charges are removed, thereby obtain the regular circuit substrate of shape 100, to make things convenient for the making of subsequent conditioning circuit plate.
In the present embodiment, in the zone of more than 111 product area 101 correspondences of the first copper foil layer, form a plurality of the first line patterns 113 by image transfer technique and etch process, in the zone of more than 121 product area 101 correspondences of the second copper foil layer, form a plurality of the second line patterns 123, thereby so that the etched removal of Copper Foil that the first copper foil layer 111 removes a plurality of the first line patterns 113, the second copper foil layer 121 is except the etched removal of Copper Foil of a plurality of the second line patterns 123.The first copper foil layer 111 in each product area 101 has first line pattern 113, and the second copper foil layer 121 in each product area 101 has second line pattern 123.Each first line pattern 113 includes the first conducting wire 1131 and the first weld pad 1132.Each second line pattern 123 includes the second conducting wire 1231 and the second weld pad 1232.The first weld pad 1132 and the second weld pad 1232 are used for soldering of electronic components.
After the first line pattern 113 and the second line pattern 123 form, be positioned at the first insulating barrier 112 of circuit substrate frontside edge and the second insulating barrier 122 and 106 expose from the side.Because the first insulating barrier 112 and the second insulating barrier 122 are made by materials such as glass-fiber-fabric and glue, after soaking through etching solution, above-mentioned material comes off from the first insulating barrier 112, the second insulating barrier 122 and the 3rd insulating barrier 131 easily, forms foul impurity.
The 3rd step, see also Fig. 4, the position of non-product area 102 correspondences and side 106 forms insulating covers 150 in first surface 104 and second surface 105, with the second insulating barrier 122 of covering the first insulating barrier 112 that first surface 104 exposes in non-product area 102, exposing non-product area 102 from second surface 105 and 106 partial circuit substrates 100 that expose from the side.
Form the mode that insulating cover 150 can adopt printing-ink or peelable glue, also can adopt the mode of pressing coverlay.In the present embodiment, insulating cover 150 forms by the mode of printing-ink, and the insulating cover 150 of formation is covered in non-product area 102 positions of side 106 and first surface 104 and second surface 105 correspondences.
The 4th step saw also Fig. 5, formed welding resisting layer 160 in the first conducting wire 1131 and 1231 surfaces, the second conducting wire.
After above-mentioned steps, see also Fig. 6, can also be at the first weld pad 1132 and the second weld pad 1232 plated with gold layers 170, to improve chemical stability and the electric conductivity of the first weld pad 1132 and the second weld pad 1232.Certainly, after plated with gold layer 170, can also be at the welding resisting layer 160 surface printing word markings that form, to indicate the effect of circuit board each several part.
The 5th step saw also Fig. 7, non-product area 102 is separated from product area 101, thereby obtain the circuit board 10 that is made of product area 101.
By stamp or the mode of dragging for type, non-product area 102 is separated from each other with product area 101, thereby obtains independent circuit board 10.
The circuit board manufacturing method that the technical program provides, after etching forms the outer-layer circuit figure, the surface of insulating layer that the non-product area of circuit board is exposed and the side of circuit substrate have formed insulating cover, thereby can avoid the equipment of the dirty contaminating impurity successive process that the insulating barrier that exposes produces, also avoid the above-mentioned dirty impurity of circuit substrate surface adhesion and caused the product of successive process bad, thereby can promote the yield of circuit board making.
Be understandable that, for the person of ordinary skill of the art, can make other various corresponding changes and distortion by technical conceive according to the present invention, and all these change the protection range that all should belong to claim of the present invention with distortion.
Claims (7)
1. circuit board manufacturing method comprises step:
The circuit substrate that comprises product area and non-product area is provided, and described non-product area is around described product area, and described circuit substrate has the first insulating barrier and is formed at first copper foil layer on the first insulating barrier one surface, and described circuit substrate has the side;
In the first copper foil layer corresponding to described product area, form the first line pattern, and thereby the first copper foil layer that non-product area is corresponding removes so that part the first insulating barrier exposes from the side and near a side of the first copper foil layer, and described the first circuit graphics package is drawn together the first conducting wire; The surface that the first insulating barrier exposes near the first copper foil layer one side in the side of circuit substrate and non-product area forms insulating cover;
Form welding resisting layer on surface, described the first conducting wire;
Described non-product area is separated from described product area, thereby obtain the circuit board that consisted of by product area.
2. circuit board manufacturing method as claimed in claim 1 is characterized in that, described the first line pattern also comprises the first weld pad, after forming welding resisting layer, also is included in the step of plated with gold layer on the first weld pad.
3. circuit board manufacturing method as claimed in claim 1 is characterized in that, after forming welding resisting layer, also is included in the step of printing word mark on the welding resisting layer.
4. circuit board manufacturing method as claimed in claim 1 is characterized in that, the quantity of described product area is a plurality of, and described non-product area is around each product area.
5. circuit board manufacturing method as claimed in claim 1, it is characterized in that, described circuit substrate also comprises double face copper, the first glue-line, the second glue-line, the second insulating barrier and the second copper foil layer that is formed at described the second insulating barrier one surface, double face copper comprises the 3rd insulating barrier and is formed at the conducting wire of the 3rd insulating barrier both sides, the first insulating barrier is pressed on by the first glue-line on the conducting wire of the 3rd insulating barrier one side of double face copper, and described the second insulating barrier is pressed on by the second glue-line on the conducting wire of the 3rd insulating barrier opposite side of double face copper.
6. circuit board manufacturing method as claimed in claim 5 is characterized in that, before forming the first line pattern, also comprises the step of circuit substrate being dragged for the limit, with the shape of correction circuit substrate.
7. circuit board manufacturing method as claimed in claim 5, it is characterized in that, when in the first copper foil layer corresponding to described product area, forming the first line pattern, also in the second copper foil layer corresponding to described product area, form the second line pattern, the second line pattern comprises the second conducting wire, described insulating cover also is formed on interior the second insulating barrier of non-product area on the surface of exposing near the second copper foil layer one side, and described welding resisting layer also is formed on surface, the second conducting wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910312489 CN102111965B (en) | 2009-12-29 | 2009-12-29 | Method for fabricating circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910312489 CN102111965B (en) | 2009-12-29 | 2009-12-29 | Method for fabricating circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102111965A CN102111965A (en) | 2011-06-29 |
| CN102111965B true CN102111965B (en) | 2013-01-09 |
Family
ID=44175939
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200910312489 Expired - Fee Related CN102111965B (en) | 2009-12-29 | 2009-12-29 | Method for fabricating circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102111965B (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1762186A (en) * | 2003-12-16 | 2006-04-19 | 三井金属矿业株式会社 | Multilayer printed wiring board and method for manufacturing the multilayer printed wiring board |
-
2009
- 2009-12-29 CN CN 200910312489 patent/CN102111965B/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1762186A (en) * | 2003-12-16 | 2006-04-19 | 三井金属矿业株式会社 | Multilayer printed wiring board and method for manufacturing the multilayer printed wiring board |
Non-Patent Citations (1)
| Title |
|---|
| JP特开平8-250823A 1996.09.27 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102111965A (en) | 2011-06-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C53 | Correction of patent of invention or patent application | ||
| CB02 | Change of applicant information |
Address after: 518103 Shenzhen Province, Baoan District Town, Fuyong Tong tail Industrial Zone, factory building, building 5, floor, 1 Applicant after: FUKU PRECISION COMPONENTS (SHENZHEN) Co.,Ltd. Co-applicant after: Zhen Ding Technology Co.,Ltd. Address before: 518103 Shenzhen Province, Baoan District Town, Fuyong Tong tail Industrial Zone, factory building, building 5, floor, 1 Applicant before: FUKU PRECISION COMPONENTS (SHENZHEN) Co.,Ltd. Co-applicant before: Hongsheng Technology Co.,Ltd. |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CB03 | Change of inventor or designer information | ||
| CB03 | Change of inventor or designer information |
Inventor after: Lai Jianchun Inventor before: Xu Mengjie |
|
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170512 Address after: 529040 No. 1-3 building, No. 268, Qing Lan Road, Jianghai District, Guangdong, Jiangmen Patentee after: Jiangmen Zhongyang Circuit Technology Co.,Ltd. Address before: 510000 unit 2414-2416, building, No. five, No. 371, Tianhe District, Guangdong, China Patentee before: GUANGDONG GAOHANG INTELLECTUAL PROPERTY OPERATION Co.,Ltd. Effective date of registration: 20170512 Address after: 2414-2416, main building, No. five, No. 371, Tianhe District mountain road, Guangzhou, Guangdong, China Patentee after: GUANGDONG GAOHANG INTELLECTUAL PROPERTY OPERATION Co.,Ltd. Address before: 518103 Shenzhen Province, Baoan District Town, Fuyong Tong tail Industrial Zone, factory building, building 5, floor, 1 Co-patentee before: Zhen Ding Technology Co.,Ltd. Patentee before: FUKU PRECISION COMPONENTS (SHENZHEN) Co.,Ltd. |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130109 Termination date: 20211229 |