CN102082216B - Light emitting diode chip and manufacturing method thereof - Google Patents
Light emitting diode chip and manufacturing method thereof Download PDFInfo
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- CN102082216B CN102082216B CN 200910199405 CN200910199405A CN102082216B CN 102082216 B CN102082216 B CN 102082216B CN 200910199405 CN200910199405 CN 200910199405 CN 200910199405 A CN200910199405 A CN 200910199405A CN 102082216 B CN102082216 B CN 102082216B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 45
- 229910052751 metal Inorganic materials 0.000 claims abstract description 36
- 239000002184 metal Substances 0.000 claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 31
- 238000005566 electron beam evaporation Methods 0.000 claims abstract description 10
- 238000000576 coating method Methods 0.000 claims abstract description 9
- 239000010410 layer Substances 0.000 claims description 163
- 239000004065 semiconductor Substances 0.000 claims description 56
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 29
- 239000002131 composite material Substances 0.000 claims description 24
- 238000010276 construction Methods 0.000 claims description 24
- 229910052594 sapphire Inorganic materials 0.000 claims description 19
- 239000010980 sapphire Substances 0.000 claims description 19
- 238000007747 plating Methods 0.000 claims description 14
- 239000011241 protective layer Substances 0.000 claims description 11
- 238000002360 preparation method Methods 0.000 claims description 10
- 239000011248 coating agent Substances 0.000 claims description 8
- 229910052804 chromium Inorganic materials 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- 238000005498 polishing Methods 0.000 claims description 5
- 238000000227 grinding Methods 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 abstract description 6
- 238000004544 sputter deposition Methods 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 150000001875 compounds Chemical group 0.000 abstract 3
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 238000000605 extraction Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 150000004767 nitrides Chemical class 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000001704 evaporation Methods 0.000 description 4
- 230000008020 evaporation Effects 0.000 description 4
- 238000002474 experimental method Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000002310 reflectometry Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
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- 238000005538 encapsulation Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000004038 photonic crystal Substances 0.000 description 1
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- 239000000126 substance Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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Abstract
The invention discloses a light emitting diode chip and a manufacturing method thereof, wherein the light emitting diode chip is characterized in that a reflecting mirror of a compound structure is prepared at the back surface of a substrate; the reflecting mirror of the compound structure is provided with a dielectric layer with the refractive index of 1.1-1.6, an Al film layer and a secondary metal layer sequentially from the substrate till the downward; and the secondary metal layer is preferably an Ag frilm layer, and the reflecting mirror can be prepared by using or employing] a coating method, a PECVD (plasma enhanced chemical vapor deposition) method, an electron beam evaporation method or a sputtering method. According to the invention, because the reflecting mirror of a SiO2/ Al/ Ag compound structure is adopted, the problem that Ag has high possibility of falling off as Ag is directly plated on SiO2 is solved, and the metal cluster phenomenon has high possibility of occurring as the Ag membranous layer is heated in a subsequent wire bonding technology is overcome, thus the light emergent efficiency of the chip is improved by more than 25%.
Description
Technical field
The present invention relates to light-emitting diode chip for backlight unit and manufacture method thereof, refer in particular at chip back and be coated with speculum, can improve light-emitting diode chip for backlight unit and the manufacture method thereof of chip light-emitting efficiency.
Background technology
Light-emitting diode has that volume is little, efficient is high and the advantage such as the life-span is long, has a wide range of applications in fields such as traffic indication, outdoor panchromatic demonstrations.Especially utilize large-power light-emitting diodes may realize semiconductor solid lighting, cause the revolution of human illumination history, thereby become gradually the study hotspot of present person in electronics.
Usually the chip of light-emitting diode is for having stacked gradually the structure of N-shaped semiconductor layer, active layer, p-type semiconductor layer at substrates such as sapphires.In addition, dispose the p electrode at the p-type semiconductor layer, dispose the n electrode at the N-shaped semiconductor layer, as shown in Figure 1.
In order to obtain the LED of high brightness, crucial internal quantum efficiency and the external quantum efficiency that needs to improve device, and the chip light extraction efficiency is the principal element of limiting device external quantum efficiency, main cause is that the refractive index difference between epitaxial material, backing material and the air is larger, and the light that causes active area to produce can not be derived chip in the generation total reflection of different refractivity material interface.Proposed the method for several raising chip light extraction efficiencies in the prior art, having comprised: 1) adopted the geometric shape such as the structural change chip of inverted pyramid etc., reduce light in the propagation distance of chip internal, reduce the Optical Absorption loss; 2) adopt structure controls such as resonant cavity or photonic crystal and change spontaneous radiation; 3) adopt method for coarsening surface, make light in semiconductor and the Air Interface generation diffusion of alligatoring, increase the chance of its projection; 4) utilize the technological means such as reversing welding technology.Wherein, existing coarsening technique is only for N type semiconductor or P type semiconductor surface or avris mostly, and improves luminous efficiency by back side evaporation metal mirror layer.
Very limited to the lifting of brightness by the speculum that simple metal forms, there is research to adopt by SiO
2The double-decker metallic mirror that thin layer and metallic diaphragm consist of, this double-level-metal speculum makes the light emission rate of LED be improved to a certain extent.Yet, when this speculum of preparation, directly at SiO
2Upper metal cladding tends to run into metal level and holds caducous problem, and produces easily the phenomenon of metal cluster in the routing technique of metal level postorder owing to heating, and these problems reduce mirror reflects efficient greatly.
Therefore, how to break through prior art raising light emission rate and become in fact the technical task that those skilled in the art need to be resolved hurrily.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of light-emitting diode chip for backlight unit and manufacture method thereof, improves the light extraction efficiency of chip.
In order to solve the problems of the technologies described above, the present invention adopts following technical scheme:
A kind of light-emitting diode chip for backlight unit, comprise successively Sapphire Substrate, semiconductor epitaxial layers, described semiconductor epitaxial layers comprises the N-shaped semiconductor layer at least, be positioned at the active layer on the N-shaped semiconductor layer, and be positioned at p-type semiconductor layer on the active layer, be provided with the n electrode at described N-shaped semiconductor layer, be provided with transparency conducting layer and p electrode at the p-type semiconductor layer, it is characterized in that: the speculum that is prepared with composite construction at substrate back, the speculum of described composite construction is followed successively by dielectric layer downwards from substrate, Al rete and the second metal level, the refractive index of described dielectric layer are 1.1-1.6.
Further, described dielectric layer thickness is 10-10000
Described Al thicknesses of layers is 10-20000
Described the second metal layer thickness is 10-20000
Further, described dielectric layer is SiO
2Layer or ITO (indium tin oxide) layer.
Better, described SiO
2Layer thickness is 100-5000
Described Al thicknesses of layers is 100-10000
Further, described the second metal level is the Ag rete.
Better, described Ag thicknesses of layers is 100-10000
Better, the Thickness Ratio of described Ag rete and Al rete is greater than 45
As one of preferred version of the present invention, also comprise layer protective layer in the mirror surface of described composite construction, described protective layer is SiO
2, a kind of in Ti, Cr or the Au rete.
The present invention also provides a kind of manufacture method of light-emitting diode chip for backlight unit, may further comprise the steps:
Steps A, prepare semiconductor epitaxial layers on Sapphire Substrate one surface, this layer comprise the N-shaped semiconductor layer at least, be positioned at the active layer on the N-shaped semiconductor layer and be positioned at p-type semiconductor layer on the active layer; And make transparency conducting layer and the p electrode be in the n electrode of described N-shaped semiconductor layer surface and be in described p-type semiconductor layer surface;
Step B, behind grinding and polishing, be prepared with the speculum of composite construction on sapphire another surface in described Sapphire Substrate, the speculum of described composite construction is followed successively by dielectric layer, Al rete and the second metal level downwards from substrate, wherein, the manufacture method of described speculum is: adopt coating, electron beam evaporation plating or PECVD (plasma chemical vapor deposition) technique in another surface preparation a layer thickness of described Sapphire Substrate to be
Dielectric layer, adopt again electron beam evaporation plating mode or sputter mode to prepare a layer thickness in described dielectric layer surface to be
The Al rete, prepare a layer thickness at described Al film surface at last and be
The second metal level.
Further, described the second metal level is the Ag rete.
Better, described Ag thicknesses of layers is
Further, described dielectric layer is SiO
2Layer or ITO layer.
Better, described SiO
2Layer thickness is
Described Al thicknesses of layers is
Better, when the described Ag rete of preparation and Al rete, make their Thickness Ratio greater than 45.
Better, before step B, also comprise the step with another surperficial attenuate of Sapphire Substrate, polishing.
As one of preferred version of the present invention, comprise also after step B and adopt coating, electron beam evaporation plating or pecvd process to prepare layer protective layer in the mirror surface of described composite construction that described protective layer is SiO
2, a kind of in Ti, Cr or the Au rete.
Compared to prior art, beneficial effect of the present invention is:
Light-emitting diode chip for backlight unit provided by the invention and manufacture method thereof prepare the metallic mirror of composite construction at the back side of chip substrate, because metallic mirror has adopted SiO
2The composite construction of/Al/Ag has solved at SiO
2Upper directly plating Ag, cause the extremely caducous problem of Ag, and overcome the Ag rete in the routing technique of postorder because the easy phenomenon that produces metal cluster of heating, and with respect to cloth formula Bragg mirror (distributedBragg reflector, DBR), the reflectivity of DBR can be subject to the impact of incident angle. and the ODR reflectivity is just so not harsh to the requirement of incidence angle, it is all very high 0 °～85 ° scope internal reflection rate, and this speculum technology can be selected electrolyte, the kind of metal is more, and the reflection efficiency of metallic mirror is improved.
Technical scheme provided by the invention can improve the light extraction efficiency of chip integral body by optimizing each thicknesses of layers, makes the brightness of chip and milliwatt number average promote more than 25% than common process chip.
Description of drawings
Fig. 1 is the generalized section of the light-emitting diode chip for backlight unit of routine;
Fig. 2 is the generalized section of light-emitting diode chip for backlight unit of the present invention.
Description of symbols among the figure:
10 Sapphire Substrate
11 dielectric layers
12 Al retes
13 second metal levels
21 N-shaped semiconductor layers
22 active layers
23 p-type semiconductor layers
30 transparency conducting layers
40 n electrodes
50 p electrodes
Embodiment
Further specify implementation step of the present invention below in conjunction with accompanying drawing, for the accompanying drawing that makes things convenient for that illustrates is not proportionally drawn.
Please referring to Fig. 2, a kind of light-emitting diode chip for backlight unit, comprise successively Sapphire Substrate 10, semiconductor epitaxial layers, described semiconductor epitaxial layers comprises N-shaped semiconductor layer 21 at least, be positioned at the active layer 22 on the N-shaped semiconductor layer 21, and be positioned at p-type semiconductor layer 23 on the active layer 22, be provided with n electrode 40 at described N-shaped semiconductor layer 21, be provided with transparency conducting layer 30 (ITO layer or Ni/Au layer) and p electrode 50 at p-type semiconductor layer 23, it is characterized in that: be prepared with the speculum of composite construction at substrate 10 back sides, the speculum of described composite construction is followed successively by dielectric layer 11 downwards from substrate, Al rete 12 and the second metal level 13.Described dielectric layer thickness is 10-10000
Described Al thicknesses of layers is 10-20000
Described the second metal layer thickness is 10-20000
Wherein, the material of described the second metal level 13 can be metal A g, the Au etc. of complex refractivity index, and in the present embodiment, described the second metal level 13 is preferably the Ag rete, and thickness is 100-10000
Described dielectric layer 11 can adopt SiO
2, ITO or other low-refractions dielectric substance, the scope of its refractive index should be 1.1-1.6.In the present embodiment, dielectric layer 11 is preferably SiO
2Layer, its thickness is 100-5000
The thickness of described Al rete 12 is preferably 100-10000
Wherein, the chip that performance is better, the Thickness Ratio of described Ag rete 13 and Al rete 12 is greater than 45.
As preferred version of the present invention, can also add layer protective layer on the surface of the speculum of described composite construction, such as SiO
2Or other are difficult for the metal level (such as Ti, Cr or Au etc.) of oxidation, can be used for preventing mirror layer scuffing, oxidation or coming off.
The method of making above-mentioned light-emitting diode chip for backlight unit may further comprise the steps:
Steps A, prepare semiconductor layer on Sapphire Substrate 10 1 surfaces, this layer comprises N-shaped semiconductor layer 21, active layer 22, p-type semiconductor layer 23 at least.
Wherein, during the preparation semiconductor layer, can adopt the methods such as sputtering method, evaporation, chemical vapour deposition technique (CVD), plasma chemical vapor deposition (PECVD), metallic compound vapour deposition process (MOCVD), molecular beam epitaxy (MBE).Present embodiment is preferably and utilizes organic metal gas phase deposition technology successively growing n-type nitride semiconductor layer 21, active layer 22 (being the luminous zone), p-type nitride semiconductor layer 23 on Sapphire Substrate 10.Described N-shaped nitride semiconductor layer 21 is N-shaped gallium nitride (GaN) layer, and described p-type nitride semiconductor layer 23 is p-type gallium nitride (GaN) layer.
Then, make transparency conducting layer 30 and the p electrode 50 that is in the n electrode 40 on described N-shaped semiconductor layer 21 surfaces and is in described p-type semiconductor layer 23 surfaces.Be specially, utilize coating technique, can utilize sputtering method, evaporation etc., at described p-type semiconductor layer 23 plating layer of transparent conductive layers 30.Described transparency conducting layer 30 is the electrically conducting transparent such as ITO, Ni/Au and can forms the material that good ohmic contact with the P layer, is preferably the ITO layer.Utilize photoetching and evaporation coating technique, at N-shaped nitride semiconductor layer 21 preparation n electrodes 40, at p-type nitride semiconductor layer 23 preparation p electrodes 50.
In addition, can also utilize plasma chemical vapor deposition technique, prepare diaphragm at the structure upper surface of steps A gained.The diaphragm material is SiO
2, only expose n electrode 40 and p electrode 50.
Step B, be prepared with the speculum of composite construction on another surface of described Sapphire Substrate 10, the speculum of described composite construction is followed successively by dielectric layer 11, Al rete 12 and the second metal level 13 downwards from substrate 10, wherein, the manufacture method of described speculum is: adopting coating, electron beam evaporation plating or pecvd process is 10-10000 in another surface of described Sapphire Substrate 10 (being substrate back) growth a layer thickness
Dielectric layer 11, adopting electron beam evaporation plating mode or sputter mode is 10-20000 in described dielectric layer 11 surface preparation a layer thickness again
Al rete 12, be 10-20000 in described Al rete 12 surface preparation a layer thickness at last
The second metal level 13.
Better, described the second metal level 13 is the Ag rete, thickness is 100-10000
Described dielectric layer 11 is SiO
2Layer or ITO layer, in the present embodiment, dielectric layer 11 is preferably SiO
2Layer, its thickness is 100-5000
The thickness of described Al rete 12 is preferably 100-10000
When preparation described Ag rete 13 and Al rete 12, adjust their thickness, make Thickness Ratio greater than 45 availables can be better light-emitting diode chip for backlight unit.
Better, before step B, also comprise the step with Sapphire Substrate 10 another surperficial attenuates, polishing.
The structure that obtains at last can obtain the higher light-emitting diode of light emission rate through subsequent techniques such as cutting, encapsulation.
In addition, can also adopt the techniques such as coating, electron beam evaporation plating or PECVD to prepare layer protective layer in the mirror surface of described composite construction after step B, described protective layer is SiO
2, Ti, Cr or Au rete.
Other process conditions that relate among the present invention are the common process condition, belong to the category that those skilled in the art are familiar with, and do not repeat them here.
Light-emitting diode chip for backlight unit provided by the invention is owing to adopted SiO
2The speculum of the composite construction of/Al/Ag has solved at SiO
2Upper directly plating Ag causes the extremely caducous problem of Ag, and has overcome the Ag rete in the routing technique of postorder because the easy phenomenon that produces metal cluster of heating is improved the light extraction efficiency of chip.Following table is contrast experiment's data of speculum technique of the present invention and existing speculum technique:
Contrast experiment's data of table 1 speculum technique of the present invention and existing speculum technique
| Back of the body plating speculum technique | Voltage (v) | Wavelength (nm) | Luminous power (mw) |
| Ti/Al | 3.33 | 461 | 88.9 |
| SiO 2/Al | 3.32 | 462.46 | 190.6 |
| SiO 2/Al/Ag | 3.29 | 461.28 | 210.1 |
By as seen from Table 1, carry on the back the plating speculum and adopt SiO of the present invention
2During/Al/Ag composite construction, light extraction efficiency promotes more than 25% than common process chip.
Because described SiO
2/ Al/Ag composite construction speculum, its each thicknesses of layers also has larger impact to the light extraction efficiency of chip, and the present invention is optimized its each layer thickness by great many of experiments.Experimental data in the table 2 has provided each layer thickness of speculum to the impact of chip light-emitting efficiency:
Table 2 SiO
2Each rete of/Al/Ag composite construction speculum adopts contrast experiment's data of different-thickness
Above-described embodiment is the unrestricted technical scheme of the present invention in order to explanation only.Any technical scheme that does not break away from spirit and scope of the invention all should be encompassed in the middle of the patent claim of the present invention.
Claims (12)
1. light-emitting diode chip for backlight unit, comprise successively Sapphire Substrate, semiconductor epitaxial layers, described semiconductor epitaxial layers comprises the N-shaped semiconductor layer at least, be positioned at the active layer on the N-shaped semiconductor layer and be positioned at p-type semiconductor layer on the active layer, be provided with the n electrode at described N-shaped semiconductor layer, be provided with transparency conducting layer and p electrode at the p-type semiconductor layer, it is characterized in that: the speculum that is prepared with composite construction at substrate back, the speculum of described composite construction is followed successively by dielectric layer, Al rete and the second metal level downwards from substrate, and described dielectric layer is SiO
2Layer or ITO layer, described the second metal level is the Ag rete; The refractive index of described dielectric layer is 1.1-1.6.
2. light-emitting diode chip for backlight unit according to claim 1, it is characterized in that: described dielectric layer thickness is
Described Al thicknesses of layers is
Described the second metal layer thickness is
3. light-emitting diode chip for backlight unit according to claim 1 is characterized in that: described SiO
2Layer thickness is
Described Al thicknesses of layers is
4. light-emitting diode chip for backlight unit according to claim 1, it is characterized in that: described Ag thicknesses of layers is
5. light-emitting diode chip for backlight unit according to claim 4, it is characterized in that: the Thickness Ratio of described Ag rete and Al rete is greater than 45.
6. light-emitting diode chip for backlight unit according to claim 1, it is characterized in that: the mirror surface at described composite construction also comprises layer protective layer, described protective layer is SiO
2, a kind of in Ti, Cr or the Au rete.
7. the manufacture method of a light-emitting diode chip for backlight unit is characterized in that, the method may further comprise the steps:
Steps A, prepare semiconductor epitaxial layers on Sapphire Substrate one surface, this layer comprise the N-shaped semiconductor layer at least, be positioned at the active layer on the N-shaped semiconductor layer and be positioned at p-type semiconductor layer on the active layer; And make transparency conducting layer and the p electrode be in the n electrode of described N-shaped semiconductor layer surface and be in described p-type semiconductor layer surface;
Step B, behind grinding and polishing, be prepared with the speculum of composite construction on sapphire another surface in described Sapphire Substrate, the speculum of described composite construction is followed successively by dielectric layer, Al rete and the second metal level downwards from substrate, wherein, the manufacture method of described speculum is: adopt coating, electron beam evaporation plating or pecvd process in another surface preparation a layer thickness of described Sapphire Substrate to be
Dielectric layer, adopt again electron beam evaporation plating mode or sputter mode to prepare a layer thickness in described dielectric layer surface to be
The Al rete, prepare a layer thickness at described Al film surface at last and be
The second metal level, described dielectric layer is SiO
2Layer or ITO layer, described the second metal level is the Ag rete.
8. the manufacture method of the light-emitting diode chip for backlight unit described in according to claim 7, it is characterized in that: described Ag thicknesses of layers is
9. the manufacture method of the light-emitting diode chip for backlight unit described in according to claim 7 is characterized in that: described SiO
2Layer thickness is
Described Al thicknesses of layers is
10. the manufacture method of the light-emitting diode chip for backlight unit described in according to claim 7 is characterized in that:
The Thickness Ratio of described Ag rete and Al rete is greater than 45.
11. the manufacture method of the light-emitting diode chip for backlight unit according to claim 7 is characterized in that:
Before step B, also comprise the step with another surperficial attenuate of Sapphire Substrate, polishing.
12. the manufacture method of the light-emitting diode chip for backlight unit according to claim 7 is characterized in that:
Also comprise after step B and adopt coating, electron beam evaporation plating or pecvd process to prepare layer protective layer in the mirror surface of described composite construction, described protective layer is SiO
2, a kind of in Ti, Cr or the Au rete.
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| CN 200910199405 CN102082216B (en) | 2009-11-26 | 2009-11-26 | Light emitting diode chip and manufacturing method thereof |
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| CN102082216B true CN102082216B (en) | 2013-04-24 |
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| CN102664220B (en) * | 2012-05-15 | 2014-12-17 | 湘能华磊光电股份有限公司 | Cutting method of LED (light-emitting diode) wafer and protection plate used by cutting method |
| CN105039922B (en) * | 2015-06-17 | 2018-01-30 | 蓝思科技（长沙）有限公司 | A kind of colored sapphire substrate and preparation method thereof |
| CN106252477B (en) * | 2016-10-31 | 2018-11-02 | 江苏新广联科技股份有限公司 | A kind of the flip LED chips structure and production method of compound total reflection mirror |
| CN108134005B (en) * | 2017-12-13 | 2023-12-22 | 华灿光电（浙江）有限公司 | Light-emitting diode chip and preparation method thereof |
| CN110350061A (en) * | 2019-07-10 | 2019-10-18 | 佛山市国星半导体技术有限公司 | A kind of LED chip, packaging and packaging method exempted from packaging plastic |
| CN110491981A (en) * | 2019-08-14 | 2019-11-22 | 佛山市国星半导体技术有限公司 | A kind of high-power flip LED chips and preparation method thereof |
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|---|---|---|---|---|
| CN1373522A (en) * | 2001-03-05 | 2002-10-09 | 全新光电科技股份有限公司 | LED with substrate coated with metallic reflection film and its preparing process |
| CN2665934Y (en) * | 2003-09-25 | 2004-12-22 | 洪瑞华 | High-brightness LED with reflection mirror on electroplated substrate |
| CN101355118A (en) * | 2007-07-25 | 2009-01-28 | 中国科学院半导体研究所 | Method for preparing GaN power type LED using optical compound film as electrode |
| CN101567414A (en) * | 2009-06-04 | 2009-10-28 | 上海蓝光科技有限公司 | Light-emitting diode chip and manufacturing method thereof |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1373522A (en) * | 2001-03-05 | 2002-10-09 | 全新光电科技股份有限公司 | LED with substrate coated with metallic reflection film and its preparing process |
| CN2665934Y (en) * | 2003-09-25 | 2004-12-22 | 洪瑞华 | High-brightness LED with reflection mirror on electroplated substrate |
| CN101355118A (en) * | 2007-07-25 | 2009-01-28 | 中国科学院半导体研究所 | Method for preparing GaN power type LED using optical compound film as electrode |
| CN101567414A (en) * | 2009-06-04 | 2009-10-28 | 上海蓝光科技有限公司 | Light-emitting diode chip and manufacturing method thereof |
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