CN101895195B - Ultrahigh pressure signal interface circuit - Google Patents
Ultrahigh pressure signal interface circuit Download PDFInfo
- Publication number
- CN101895195B CN101895195B CN201010215240A CN201010215240A CN101895195B CN 101895195 B CN101895195 B CN 101895195B CN 201010215240 A CN201010215240 A CN 201010215240A CN 201010215240 A CN201010215240 A CN 201010215240A CN 101895195 B CN101895195 B CN 101895195B
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- voltage
- interface circuit
- circuit
- input
- pressure signal
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Abstract
The invention discloses an ultrahigh pressure signal interface circuit which is characterized by comprising a resistor R1, a diode D1 and an NMOS (N-channel Metal Oxide Semiconductor) tube M1, wherein an input signal Vi is input from one end of the resistor R1, the other end of the resistor R1 is connected with the drain electrode of the NMOS tube M1 and the cathode of the diode D1, the anode of the diode D1 is grounded, a substrate of the NMOS tube M1 is grounded, and the source electrode of the NMOS tube M1 is taken as an output end and outputs a low pressure signal Vo to a core control circuit. The input voltage range of the interface circuit is higher than a limit voltage of a process gate source, and the anti-static capacity of the interface circuit is superior to that of a common structure, therefore, the interface circuit can be directly taken as a single-plug interface circuit, is also easy to integrate in a circuit as a module, realizes the conversion from a high pressure signal to the low pressure signal, broadens the input voltage range, and improves the anti-static capacity.
Description
Technical field
The present invention relates to the semiconductor integrated circuit field, be used for need high-voltage signal being converted into the circuit of low-voltage signal, be specifically related to a kind of ultrahigh pressure signal interface circuit.
Background technology
The DC/DC converter has obtained using widely in fields such as satellite, spacecraft, automobile, household electrical appliance, communication, thermometricallies with its good performance.In the DC/DC converter, core control circuit be generally low-voltage device (operating voltage≤5V), and outside circuit be high tension apparatus (its operating voltage＞5V is tens volts, tens volts even go up hectovolt) mostly.Need a kind of simple and reliable, at a high speed, the high voltage interface circuit of low-power consumption converts high-voltage signal to low-voltage signal to accomplish various signals collecting, interface circuit will provide functions such as electrostatic defending simultaneously.
At present, general digital signal level change-over circuit is the grid input structure, owing to receive process technology limit, the voltage range that can change is limited.Input signal V
iLevel range be 0～V
DD(supply voltage of circuit), and V
DD≤BV
GS(the grid source puncture voltage of device), BV
GSDetermine by process conditions.The low pressure core control circuit generally adopts low pressure process to make BV
GSLower, narrower with the level range of the interface circuit input signal of low pressure process design, the scope of circuit application also is restricted.
If will improve the incoming signal level scope of digital signal level change-over circuit, will improve the BV of input pipe
GS, input pipe and functional circuit have different operating voltages, and in order to adapt to this multivoltage environment, industrial quarters is often used the transistor of multiple different gate oxide thickness.Input pipe adopts thick grating oxide layer to satisfy incoming signal level; Low supply voltage uses the thin oxide gate layer process to realize circuit function down; In core control circuit, just have two kinds of technologies like this, increased the difficulty of technology controlling and process, its performance can't reach the optimum of technology; Reduced device reliability and rate of finished products, production cost increases.And when input voltage was higher than 40V, thick grating oxide layer technology also can't solve the directly problem of input of signal.Need a kind of transistor circuit of single thin oxide gate layer process that adopts to realize the conversion of high-voltage signal, solve this type of problem to low-voltage signal.
Summary of the invention
For realizing the conversion of high-voltage signal to low-voltage signal; And reach and widen input voltage range, improve antistatic effect; The interface circuit that the purpose of this invention is to provide a kind of superhigh pressure signal; Its input voltage range is higher than technological limits voltage, antistatic effect is superior to ordinary construction, can also be integrated in the circuit as module easily directly as monolithic plug interface circuit.
For reaching above purpose, the present invention takes following technical scheme to be achieved:
A kind of ultrahigh pressure signal interface circuit comprises resistance R 1, diode D
1With NMOS pipe M1, input signal Vi is by the input of resistance R 1 one ends, and the other end of resistance R 1 connects the drain electrode of NMOS pipe M1 and the negative electrode of diode D1; Diode D1 plus earth; The substrate ground connection of NMOS pipe M1, the source electrode of NMOS pipe M1 are as output, and output low-voltage signal Vo is to core control circuit.
In the such scheme, be connected with electrostatic discharge protective circuit between described output and the ground.
The level range of described input signal Vi is 0～(BV
GS-V
Thn+ BV
DS), BV wherein
GSBe core control circuit grid source puncture voltage, V
TnBe NMOS pipe M1 threshold voltage, BV
DSBe NMOS pipe M1 drain-source breakdown voltage.The level range of described output signal Vo is 0～(V
DD-V
Thn), V wherein
DDSupply voltage for core control circuit.
Adopt interface circuit of the present invention; Input voltage range is higher than technology grid source limiting voltage, antistatic effect is superior to ordinary construction, can adopt low ironed grid technique for core circuit directly as monolithic plug interface circuit; Interface adopts the circuit of thick grid technique; Can omit thick grid technique step, directly adopt low ironed grid technique to accomplish integrated circuit and make, be integrated in the circuit as module easily; Realized the conversion of high-voltage signal, and widened input voltage range and (can widen a BV to low-voltage signal
DS), improved antistatic effect.
Description of drawings
Fig. 1 is the ultrahigh pressure signal interface circuit structure (dotted portion) that the present invention proposes
Fig. 2 is the input/output signal amplitude of circuit of the present invention
Fig. 3 is a kind of structured flowchart of using high-voltage pulse counting circuit of the present invention
Fig. 4 is the signal waveform of Fig. 3 high-voltage pulse counting circuit
Fig. 5 is a current sampling circuit in a kind of application PWM type of the present invention DC/DC circuit
Fig. 6 is the simulation waveform of current sampling circuit in Fig. 5 PWM type DC/DC circuit
Embodiment
Embodiment does further detailed description to the present invention below in conjunction with accompanying drawing facility body.
As shown in Figure 1, a kind of ultrahigh pressure signal interface circuit comprises resistance R 1, diode D1 and NMOS pipe M
1Form.Input signal is by the input of R1 one end, and the other end of R1 connects the drain electrode of M1 and the negative electrode of diode, diode anode ground connection, and the substrate ground connection of M1, the source electrode of M1 is exported low-voltage signal as the output of circuit.The level range of input signal Vi is 0～(BV
GS-V
Thn+ BV
DS), BV wherein
GSBe core control circuit (low-voltage circuit) grid source puncture voltage, V
TnBe M1 pipe threshold voltage, BV
DSBe M
1The pipe drain-source breakdown voltage.The output signal level scope is 0～(V
DD-V
Thn), direct low-voltage core control circuit in the connected system.
Ultrahigh pressure signal interface circuit input/output signal amplitude shown in Figure 1 is as shown in Figure 2.The advantage that the present invention has has:
1. adopt high-voltage tube technology to make (its BV like NMOS pipe M1
DSValue is much larger than the BV of core control circuit mesolow device
DS, BV
GSApproaching with low-voltage device), its input voltage can reach the extra-high pressure scope, for example adopts BCD (BIPOLAR, the CMOS AND DMOS) technology of compatible 500 volts of DMOS, and input voltage can reach more than the 500V.
2. signalling channel is for being total to the grid structure for amplifying, and contrast common source structure for amplifying has more excellent frequency characteristic.
Input signal over the ground or power supply all do not have direct current channel, its quiescent current is almost nil.
4.M1 the drain electrode antistatic effect will be far superior to grid, and input sealed in a resistance R 1, further improved antistatic level, but the output electrostatic discharge protective circuit of compatibility standard is also strengthened the electrostatic defending to the low pressure core control circuit.
5. diode D1 provides overvoltage scope defencive function.
The present invention is applicable to that the useful signal amplitude range is 0～V
DD-V
Tn, input signal does not lose in this scope, can be applicable to the transmission of numeral and analog signal, is higher than V
DD-V
TnSignal level then be compressed into V
DD-V
Tn
Below be two application examples:
As shown in Figure 3, a kind of high-voltage pulse counting circuit of using circuit of the present invention as input interface.
Input signal is by R
1End input, via R
1The other end output to M
1Drain electrode, M
1Source electrode output.When input signal is higher than supply voltage V
DD, input voltage V
O=V
DD-V
Tn(M
1Threshold voltage); Input signal is lower than supply voltage V
DDThe time, V
O=V
iIf V
DD=5V, M
1Pipe is high pressure NMOS pipe (grid source puncture voltage BV
GS=8V, drain-source breakdown voltage BV
DS=25V), adopt domestic certain processing line process modeling to carry out analog simulation.The input/output signal simulation waveform is as shown in Figure 4, when circle partly is input range 200mV pulse, and the enlarged and displayed of input and output waveform.
The emulation explanation is as input signal V
InBe lower than high-voltage MOS pipe M
1Grid current potential V
DDDuring=5V, the signal transmission does not have level breakdown, V
o=V
InWhen input signal was higher than the grid current potential of high-voltage MOS pipe M1, input signal was compressed into V
DD-V
Tn, completed successfully the high-low level conversion transmission of signal.
As shown in Figure 5, a kind ofly use the present invention as current sampling circuit in the PWM type DC/DC circuit of interface circuit, power MOS pipe M
2The conducting electric current turn-offs or overcurrent protection function to realize power tube through resistance R sc sampling, and normal sampled signal level amplitude can not surpass 1V, but when sampling resistor was opened a way, signal level was elevated to M
2The pipe driving voltage deducts a pipe threshold value, can reach usually more than the 10V, and the comparator input terminal of MOS structure must adopt the thick-bar high-voltage element manufacturing like this, and its performance can't reach the optimum of technology.
Adopt circuit of the present invention as interface circuit, can directly adopt low pressure process designs comparator, reach better parameter index.When sampling resistor just often, the sampled signal amplitude is lower than VDDL-V
Tn, the signal transmission does not have level breakdown; When sampling resistor was opened a way, interface circuit can be not limited to VDDL-V
Tn, reach the unusual purpose of reliably protecting down.
Fig. 6 is the emulation input and output waveform of Fig. 5 circuit, when circle partly is input range 200mV pulse, and the enlarged and displayed of input and output waveform.When input signal was higher than the grid current potential VDDL of NMOS pipe, the output signal level amplitude was VDDL-V
Tn, but when incoming signal level was lower than the grid current potential VDDL of NMOS pipe, the output signal was followed input signal fully.
Claims (4)
1. a ultrahigh pressure signal interface circuit is characterized in that, comprises resistance R 1, diode D
1With NMOS pipe M1; Input signal Vi is by the input of resistance R 1 one ends, and the other end of resistance R 1 connects the drain electrode of NMOS pipe M1 and the negative electrode of diode D1, diode D1 plus earth; The substrate ground connection of NMOS pipe M1; The source electrode of NMOS pipe M1 is as output, and output low-voltage signal Vo is to core control circuit, and the grid of NMOS pipe M1 connects supply voltage V
DD, the grid current potential is V
DD
2. ultrahigh pressure signal interface circuit as claimed in claim 1 is characterized in that, is connected with electrostatic discharge protective circuit between described output and the ground.
3. ultrahigh pressure signal interface circuit as claimed in claim 1 is characterized in that, the level range of described input signal Vi is 0～(BV
GS-V
Thn+ BV
DS), BV wherein
GSBe core control circuit grid source puncture voltage, V
ThnBe NMOS pipe M1 threshold voltage, BV
DSBe NMOS pipe M1 drain-source breakdown voltage.
4. ultrahigh pressure signal interface circuit as claimed in claim 1 is characterized in that, the level range of described output low-voltage signal Vo is 0～(V
DD-V
Thn), V wherein
DDSupply voltage for core control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010215240A CN101895195B (en) | 2010-07-01 | 2010-07-01 | Ultrahigh pressure signal interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010215240A CN101895195B (en) | 2010-07-01 | 2010-07-01 | Ultrahigh pressure signal interface circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101895195A CN101895195A (en) | 2010-11-24 |
| CN101895195B true CN101895195B (en) | 2012-10-03 |
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ID=43104299
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|---|---|---|---|
| CN201010215240A Expired - Fee Related CN101895195B (en) | 2010-07-01 | 2010-07-01 | Ultrahigh pressure signal interface circuit |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI459534B (en) * | 2011-07-25 | 2014-11-01 | Richtek Technology Corp | Ultra-high voltage integrated circuit with esd protection capbility |
| CN103760488B (en) * | 2014-01-09 | 2016-08-17 | 上海华虹宏力半导体制造有限公司 | Test pad shares circuit |
| CN105591355B (en) * | 2016-02-24 | 2018-07-20 | 硅谷数模半导体（北京）有限公司 | USB-C controls chip and its protection circuit and USB-C systems |
| US10319714B2 (en) * | 2017-01-24 | 2019-06-11 | Analog Devices, Inc. | Drain-extended metal-oxide-semiconductor bipolar switch for electrical overstress protection |
| CN108075457A (en) * | 2017-12-27 | 2018-05-25 | 上海传英信息技术有限公司 | A kind of anti-surge circuit, surge pipe and the electrical equipment with the surge pipe |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101141114A (en) * | 2007-10-16 | 2008-03-12 | 北京交通大学 | CMOS self-adaptive biasing circuit |
| CN201039562Y (en) * | 2007-04-17 | 2008-03-19 | 吴壬华 | A voltage sampling and protection circuit for high-voltage gas discharging lamp |
| CN201435767Y (en) * | 2009-05-15 | 2010-03-31 | 日安电子(深圳)有限公司 | Camera protective plate and camera |
-
2010
- 2010-07-01 CN CN201010215240A patent/CN101895195B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201039562Y (en) * | 2007-04-17 | 2008-03-19 | 吴壬华 | A voltage sampling and protection circuit for high-voltage gas discharging lamp |
| CN101141114A (en) * | 2007-10-16 | 2008-03-12 | 北京交通大学 | CMOS self-adaptive biasing circuit |
| CN201435767Y (en) * | 2009-05-15 | 2010-03-31 | 日安电子(深圳)有限公司 | Camera protective plate and camera |
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| Publication number | Publication date |
|---|---|
| CN101895195A (en) | 2010-11-24 |
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