CN105591355B - USB-C controls chip and its protection circuit and USB-C systems - Google Patents
USB-C controls chip and its protection circuit and USB-C systems Download PDFInfo
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- CN105591355B CN105591355B CN201610101865.6A CN201610101865A CN105591355B CN 105591355 B CN105591355 B CN 105591355B CN 201610101865 A CN201610101865 A CN 201610101865A CN 105591355 B CN105591355 B CN 105591355B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/20—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
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Abstract
The invention discloses a kind of USB C control chips and its protection circuits and USB C systems.The USB C control chip protection circuit：First NMOS transistor is connected between the first interface and the first outer member of USB C control chip, wherein when the drain voltage of the first NMOS transistor is more than threshold voltage, the source electrode of the first NMOS transistor with drain it is separated；And second NMOS transistor, be connected between the second interface and the second outer member of USB C control chips, wherein when the drain voltage of the second NMOS transistor is more than threshold voltage, the source electrode of the second NMOS transistor with drain it is separated.Through the invention, solve the problems, such as that USB C control the high voltage damage that the internal circuit of chip is easily entered in the related technology.
Description
Technical field
The present invention relates to circuit fields, and chip and its protection circuit and USB-C are controlled in particular to a kind of USB-C
System.
Background technology
Supporting universal serial bus C classes interface standard (Universal Serial Bus Type-C, abbreviation USB-C) is
Support the interface standard of universal serial bus (Universal Serial Bus, abbreviation USB) tissue latest definition.Table 1 is
USB-C interface pins and the mapping table for transmitting signal.
1 USB-C interface pins of table and the mapping table for transmitting signal
| A1 | A2 | A3 | A4 | A5 | A6 | A7 | A8 | A9 | A10 | A11 | A12 |
| GND | TX1+ | TX1- | VBUS | CC1 | D+ | D- | SBU1 | VBUS | RX2- | RX2+ | GND |
| B1 | B2 | B3 | B4 | B5 | B6 | B7 | B8 | B9 | B10 | B11 | B12 |
| GND | TX2+ | TX2- | VBUS | CC2 | D+ | D- | SBU2 | VBUS | RX1- | RX1+ | GND |
As shown in table 1, following a few class signals are transmitted in the pin of USB-C interfaces：
1. transmitting the high speed signal of USB 3.0/3.1：TX1+ pins, TX1- pins, TX2+ pins, TX2- pins, RX1+
Pin, RX1- pins, RX2+ pins, RX2- pins；
2. transmitting the high speed signal of USB 2.0：D+ pins and D- pins；
3. transmitting power supply signal：VBUS pins；
4. transmitting auxiliary signal：SBU1 pins and SBU2 pins；
5. transmission configuration signal：CC1 pins and CC2 pins.
Wherein, CC1 pins and CC2 pins are mainly used for carrying out plug detection, device type detection in USB-C interfaces
And auxiliary signal communication, the signal of the two pins transmission play crucial effect in USB-C interfaces.CC1 pins and CC2
The signal transmitted on pin is handled by USB-C control chips, and due to technique, USB-C controls chip to CC1 pins
It is usually less than 5.5V with the highest tolerance voltage of CC2 pins.But in actual application process, it is added in CC1 pins and CC2 draws
Voltage on foot may be more than 6V, and the internal circuit of USB-C control chips is caused to be inputted on CC1 pins and CC2 pins
High voltage damages.
The problem of being damaged for the high voltage that the internal circuit of the control chips of USB-C in the related technology is easily entered, at present
Not yet propose effective solution scheme.
Invention content
The main purpose of the present invention is to provide a kind of USB-C control chips and its protection circuit and USB-C systems, with solution
The problem of high voltage damage that certainly internal circuit of USB-C controls chip is easily entered in the related technology.
To achieve the goals above, according to an aspect of the invention, there is provided a kind of USB-C control chip protection electricity
Road.The USB-C controls chip protection circuit：First NMOS transistor, be connected on USB-C control chip first interface with
Between first outer member, wherein source electrode is connected to the first interface of USB-C control chips, and drain electrode is connected to the first outside member
Part, grid connect threshold voltage, wherein when the drain voltage of the first NMOS transistor is more than threshold voltage, the first NMOS is brilliant
The source electrode of body pipe is separated with drain electrode, wherein the first outer member is to be connected with the first interface of USB-C control chips
Element；And second NMOS transistor, it is connected between the second interface and the second outer member of USB-C control chips, wherein
Source electrode is connected to the second interface of USB-C control chips, and drain electrode is connected to the second outer member, and grid connects threshold voltage,
In, when the drain voltage of the second NMOS transistor is more than threshold voltage, the source electrode of the second NMOS transistor and the interruption of drain electrode
It opens, wherein the second outer member is the element for controlling the second interface of chip with USB-C and being connected.
Further, USB-C controls chip protection circuit further includes：First PMOS transistor, source electrode and the first NMOS
The drain electrode of transistor is connected, and grid connects threshold voltage；First resistor, first end are connected with the drain electrode of the first PMOS transistor
It connects, second end ground connection；Second PMOS transistor, source electrode are connected with the drain electrode of the second NMOS transistor, and grid connects threshold value electricity
Pressure；And second resistance, first end are connected with the drain electrode of the second PMOS transistor, second end ground connection.
Further, the first NMOS transistor and the second NMOS transistor are the transistors of model A07404.
Further, the first PMOS transistor and the second PMOS transistor are the transistors of model AON2401.
To achieve the goals above, according to an aspect of the invention, there is provided a kind of USB-C controls chip.The USB-C
Control chip includes the USB-C control chip protection circuits of the present invention.
To achieve the goals above, according to an aspect of the invention, there is provided a kind of USB-C controls chip.The USB-C
Controlling chip includes：First resistor, first end ground connection；Second resistance, first end ground connection；First NMOS transistor, source electrode and
The second end of one resistance is connected, and drains and controls the first interface of chip as USB-C, and grid connects threshold voltage, wherein when
When the drain voltage of first NMOS transistor is more than threshold voltage, the source electrode of the first NMOS transistor with drain it is separated；With
And second NMOS transistor, source electrode are connected with the second end of second resistance, drain electrode connects as the second of USB-C control chips
Mouthful, grid connects threshold voltage, wherein when the drain voltage of the second NMOS transistor is more than threshold voltage, the 2nd NMOS is brilliant
The source electrode of body pipe is separated with drain electrode.
Further, USB-C controls chip further includes：First PMOS transistor, source electrode and the first NMOS transistor
Drain electrode is connected, and grid connects threshold voltage；3rd resistor, first end are connected with the drain electrode of the first PMOS transistor, and second
End ground connection, wherein the resistance value of 3rd resistor is identical as the resistance value of first resistor；Second PMOS transistor, source electrode and the 2nd NMOS
The drain electrode of transistor is connected, and grid connects threshold voltage；And the 4th resistance, the drain electrode of first end and the second PMOS transistor
It is connected, second end ground connection, wherein the resistance value of the 4th resistance is identical as the resistance value of second resistance.
To achieve the goals above, according to an aspect of the invention, there is provided a kind of USB-C systems.The USB-C systems
USB-C including the present invention controls chip.
To achieve the goals above, according to an aspect of the invention, there is provided a kind of USB-C systems.The system includes：
USB-C controls chip, including：First resistor, first end ground connection；Second resistance, first end ground connection；First NMOS transistor, source
Pole is connected with the second end of first resistor, drains and controls the first interface of chip as USB-C, and grid connects threshold voltage,
Wherein, when the drain voltage of the first NMOS transistor is more than threshold voltage, between the source electrode and drain electrode of the first NMOS transistor
It disconnects；And second NMOS transistor, source electrode are connected with the second end of second resistance, drain electrode is as USB-C control chips
Second interface, grid connect threshold voltage, wherein when the drain voltage of the second NMOS transistor is more than threshold voltage, second
The source electrode of NMOS transistor is separated with drain electrode；And USB-C connectors, first interface and the first of USB-C control chips
Interface is connected, and the second interface that second interface controls chip with USB-C is connected.
Further, which further includes：Power supply control chip, voltage output interface and the first of USB-C control chips
The second interface that interface controls chip with USB-C is connected.
It is brilliant that the present invention controls the first NMOS between the first interface and the first outer member of chip by being connected on USB-C
Body pipe, and be connected on USB-C control chip second interface and the second outer member between the second NMOS transistor, solve
USB-C controls the problem of high voltage damage that the internal circuit of chip is easily entered in the related technology, and then has reached protection
USB-C controls the effect of the internal circuit of chip.
Description of the drawings
The attached drawing constituted part of this application is used to provide further understanding of the present invention, schematic reality of the invention
Example and its explanation are applied for explaining the present invention, is not constituted improper limitations of the present invention.In the accompanying drawings：
Fig. 1 is the schematic diagram of USB-C control chip protection circuits according to a first embodiment of the present invention；
Fig. 2 is the schematic diagram of USB-C control chip protection circuits according to a second embodiment of the present invention；
Fig. 3 is the schematic diagram of USB-C control chips according to a first embodiment of the present invention；
Fig. 4 is the schematic diagram of USB-C control chips according to a second embodiment of the present invention；
Fig. 5 is the schematic diagram of USB-C control chips according to a third embodiment of the present invention；And
Fig. 6 is the schematic diagram of USB-C systems according to the ... of the embodiment of the present invention.
Specific implementation mode
It should be noted that in the absence of conflict, the features in the embodiments and the embodiments of the present application can phase
Mutually combination.The present invention will be described in detail below with reference to the accompanying drawings and embodiments.
In order to make those skilled in the art more fully understand application scheme, below in conjunction in the embodiment of the present application
Attached drawing, technical solutions in the embodiments of the present application are clearly and completely described, it is clear that described embodiment is only
The embodiment of the application part, instead of all the embodiments.Based on the embodiment in the application, ordinary skill people
The every other embodiment that member is obtained without making creative work should all belong to the model of the application protection
It encloses.
It should be noted that term " first " in the description and claims of this application and above-mentioned attached drawing, "
Two " etc. be for distinguishing similar object, without being used to describe specific sequence or precedence.It should be appreciated that using in this way
Data can be interchanged in the appropriate case, so as to embodiments herein described herein.In addition, term " comprising " and " tool
Have " and their any deformation, it is intended that cover it is non-exclusive include, for example, containing series of steps or unit
Process, method, system, product or equipment those of are not necessarily limited to clearly to list step or unit, but may include without clear
It is listing to Chu or for these processes, method, product or equipment intrinsic other steps or unit.
The embodiment provides a kind of USB-C to control chip protection circuit.
Fig. 1 is the schematic diagram of USB-C control chip protection circuits according to a first embodiment of the present invention.As shown in Figure 1, should
USB-C controls chip protection circuit：First NMOS transistor 10 and the second NMOS transistor 20.
USB-C control chips are used to handle the signal transmitted on CC1 pins and the CC2 pins in USB-C interface standards.
USB-C controls chip, and there are two interfaces, correspond respectively to the CC1 pins in USB-C interface standards and CC2 pins.CC1 pins and
CC2 pins can be not only used for transmission configuration signal, can be also used for transmission voltage, and USB-C controls the interior of chip in order to prevent
The high pressure damage that portion's circuit is transmitted on CC1 pins and CC2 pins devises the USB-C control chip protection circuits of the present invention.
The protection circuit includes the first NMOS transistor 10 and the second NMOS transistor 20.
First NMOS transistor 10 is connected between the first interface and the first outer member of USB-C control chips.First
Outer member refers to the element for controlling the first interface of chip with USB-C and being connected.The element can control chip with USB-C
The USB-C connectors that are connected of first interface, specifically, USB-C controls the first interface and the one of USB-C connectors of chip
A pin connection.USB-C connectors are the interfaces for including all pins of USB-C interface standards, and USB-C connectors can be with outside
Equipment connects, and receives the voltage of external equipment and by controlling the pin that is connected of first interface of chip with USB-C by voltage
It is sent to the first interface of USB-C control chips.The element can also be what the first interface that chip is controlled with USB-C was connected
Power supply control chip, the voltage output which can be connected by controlling the first interface of chip with USB-C
Interface transmits voltage to USB-C control chips.
The specific connection type of first NMOS transistor 10 is the first interface that source electrode is connected to that USB-C controls chip, leakage
Pole is connected to the first outer member, and grid connects threshold voltage.Specifically, drain electrode is connected on the first outer member and USB-C
The pin that the first interface of control chip is connected.First NMOS transistor 10 is connected on the first interface of USB-C control chips
Between the first outer member, the protection circuit between the first interface and the first outer member of chip is controlled as USB-C, when
When the drain voltage of first NMOS transistor 10 is more than threshold voltage, that is, when the first outer member controls chip to USB-C
When the voltage of first interface transmission is more than threshold voltage, the source electrode of the first NMOS transistor 10 with drain separated, be disconnected
USB-C controls the connection between the first interface and the first outer member of chip, this is the characteristic of NMOS transistor, passes through first
NMOS transistor 10 protects the internal circuit of USB-C control chips not damaged by excessively high control source.It should be noted that
Above-mentioned threshold voltage is not the conducting voltage of transistor, but makes the voltage that no current passes through between source electrode and drain electrode, grid
It is connected with threshold voltage, when drain voltage is more than the threshold voltage being connect with grid, no current is logical between source electrode and drain electrode
It crosses, disconnects the connection between the first interface and the first outer member of USB-C control chips.The concrete numerical value of the threshold voltage is
It is determined by the model of the first NMOS transistor 10, suitable threshold voltage can be determined according to actual demand, in threshold value
The concrete model of the first NMOS transistor 10 is selected after voltage.
Second NMOS transistor 20 is connected between the second interface and the second outer member of USB-C control chips, wherein
Source electrode is connected to the second interface of USB-C control chips, and drain electrode is connected to the second outer member, and grid connects threshold voltage,
In, when the drain voltage of the second NMOS transistor 20 is more than threshold voltage, source electrode and the drain electrode of the second NMOS transistor 20
It is separated, wherein the second outer member is the element for controlling the second interface of chip with USB-C and being connected.2nd NMOS crystal
The specific connection type of pipe 20 is similar to the first NMOS transistor 10, and details are not described herein.USB-C controls the of chip among the above
The CC1 pins and CC2 pins, " first " and " second " that one interface and second interface correspond in USB-C interface standards do not have to simultaneously
In the specific sequence of description or precedence.Preferably, the first NMOS transistor 10 and the second NMOS transistor 20 can be types
Number be A07404 transistor.The conducting voltage of the transistor of A07404 models is 0.8V, threshold voltage 3.3V.By using
NMOS transistor is connected between the interface and outer member of USB-C control chips, can protect the inside of USB-C control chips
Circuit is not damaged by high voltage, can be born the high voltage close to 20V, is much higher than 6V.Further, it is also possible to by replacing first
The model of NMOS transistor 10 and the second NMOS transistor 20 is to support the protection of higher voltage.
Preferably, it can also include the first PMOS transistor, source electrode and the first NMOS which, which controls chip protection circuit,
The drain electrode of transistor 10 is connected, and grid connects threshold voltage；First resistor, the drain electrode phase of first end and the first PMOS transistor
Connection, second end ground connection；Second PMOS transistor, source electrode are connected with the drain electrode of the second NMOS transistor 20, and grid connects threshold
Threshold voltage；And second resistance, first end are connected with the drain electrode of the second PMOS transistor, second end ground connection.Preferably, first
PMOS transistor and the second PMOS transistor are the transistors of model AON2401.The conducting voltage of AON2401 models is ﹣
0.65V。
The USB-C that the embodiment provides controls chip protection circuit, and the first interface of chip is controlled by being connected on USB-C
The first NMOS transistor 10 between the first outer member, and it is connected on the second interface and second of USB-C control chips
The second NMOS transistor 20 between outer member, the internal circuit for solving USB-C controls chip in the related technology are easily defeated
The problem of high voltage damage entered, and then achieved the effect that the internal circuit for protecting USB-C control chips.
Fig. 2 is the schematic diagram of USB-C control chip protection circuits according to a second embodiment of the present invention.As shown in Fig. 2,
The first interface that the ends CC1 ' control chip with USB-C is connected, and the ends CC1 " control first interface and the outside of chip as USB-C
The interface that element is connected, the source electrode of series connection one NMOS transistor Q1, Q1 are connected to the ends CC1 ' between the ends CC1 ' and the ends CC1 ",
The drain electrode of Q1 is connected to the ends CC1 ", the voltage of the grid connection 3.3V of Q1.When the voltage value at the ends CC1 " is more than 3.3V, the ends CC1 '
And the ends CC1 " is separated, no electric current and voltage pass through.
CC2 ' holds the second interface for controlling chip with USB-C to be connected, and the ends CC2 " connect as the second of USB-C control chips
The interface that mouth is connected with outer member, the source electrode connection of series connection one NMOS transistor Q2, Q2 between the ends CC2 ' and the ends CC2 "
It is held to CC2 ', the drain electrode of Q2 is connected to the ends CC2 ", the voltage of the grid connection 3.3V of Q2.The voltage value for working as the ends CC2 " is more than 3.3V
When, CC2 ' end and CC2 " end it is separated, no electric current and voltage pass through.
The source electrode of PMOS transistor Q3 is connected with the drain electrode of Q1, and the drain electrode of Q3 is connected with the first end of resistance R5, Q3
Grid be connected to 3.3V voltages, the second end ground connection of resistance R5.The source electrode of PMOS transistor Q4 is connected with the drain electrode of Q2, Q4
Drain electrode be connected with the first end of resistance R6, the grid of Q4 is connected to 3.3V voltages, the second end ground connection of resistance R6.
The embodiments of the present invention also provide a kind of USB-C to control chip.It includes that the present invention is implemented that the USB-C, which controls chip,
The USB-C of example controls chip protection circuit.Specifically, USB-C control chip protection circuits can be integrated in USB-C control cores
In piece.
Fig. 3 is the schematic diagram of USB-C control chips according to a first embodiment of the present invention.As shown in figure 3, the USB-C is controlled
Coremaking piece includes：First resistor 30, first end ground connection；Second resistance 40, first end ground connection；First NMOS transistor 10, source electrode
It is connected with the second end of first resistor 30, drains and control the first interface of chip as USB-C, grid connects threshold voltage,
Wherein, when the drain voltage of the first NMOS transistor 10 is more than threshold voltage, the source electrode of the first NMOS transistor 10 and drain electrode
It is separated；And second NMOS transistor 20, source electrode are connected with the second end of second resistance 40, drain electrode is controlled as USB-C
The second interface of coremaking piece, grid connect threshold voltage, wherein when the drain voltage of the second NMOS transistor 20 is more than threshold value electricity
When pressure, the source electrode of the second NMOS transistor 20 is separated with drain electrode.
Preferably, it further includes the first PMOS transistor, the leakage of source electrode and the first NMOS transistor 10 which, which controls chip,
Pole is connected, and grid connects threshold voltage；3rd resistor, first end are connected with the drain electrode of the first PMOS transistor, second end
Ground connection, wherein the resistance value of 3rd resistor is identical as the resistance value of first resistor 30；Second PMOS transistor, source electrode and the 2nd NMOS
The drain electrode of transistor 20 is connected, and grid connects threshold voltage；And the 4th resistance, the leakage of first end and the second PMOS transistor
Pole is connected, second end ground connection, wherein the resistance value of the 4th resistance is identical as the resistance value of second resistance 40.
Fig. 4 is the schematic diagram of USB-C control chips according to a second embodiment of the present invention.As shown in figure 4, the of resistance R1
One end connects power supply AVDD33, and the first end of resistance R2 connects power supply AVDD33, the first end ground connection of resistance R3, and the of resistance R4
One end is grounded.The first choice end of selecting switch S1 is connected with the second end of R1, the second selection end of selecting switch S1 and R3
Second end be connected, the first choice end of selecting switch S2 is connected with the second end of R2, selecting switch S2 second selection
End is connected with the second end of R4.The source electrode of NMOS transistor Q1 is connected with the third of selecting switch S1 selection end, the leakage of Q1
Pole controls the first interface of chip as USB-C, and the grid of Q1 connects 3.3V voltages.The source electrode of NMOS transistor Q2 is opened with selection
The third selection end for closing S2 is connected, and the drain electrode of Q2 controls the second interface of chip, the grid connection 3.3V electricity of Q2 as USB-C
Pressure.
The source electrode of PMOS transistor Q3 is connected with the drain electrode of Q1, and the drain electrode of Q3 is connected with the first end of resistance R5, Q3
Grid be connected to 3.3V voltages, the second end ground connection of resistance R5.The source electrode of PMOS transistor Q4 is connected with the drain electrode of Q2, Q4
Drain electrode be connected with the first end of resistance R6, the grid of Q4 is connected to 3.3V voltages, the second end ground connection of resistance R6.Resistance R5
Resistance value it is identical as the resistance value of resistance R3, the resistance value of resistance R6 is identical as the resistance value of resistance R4.
As shown in Figure 4, CC1 ' nodes and CC2 ' nodes be in the related technology USB-C control chip first interface and
Second interface, CC1 " nodes and CC2 " nodes are the first interface and second interface of USB-C controls chip provided in this embodiment.
For the USB-C control chips of the relevant technologies when the second selection end of S1 is connected to third selection end, outer member connects CC1 ' sections
When point, since the first end of resistance R3 is grounded, play the role of the voltage for pulling down outer member.But it is provided in this embodiment
USB-C controls chip using CC1 " nodes as the first interface being connect with outer member, when USB-C control chip interiors are without electricity
When pressure, resistance R3 can not be connected to outer member, can not play the role of pull down resistor.USB-C control chips are claimed to be at this time
In the case of non-transformer (Dead battery).Therefore, using PMOS transistor Q3 and resistance R5 identical with the resistance value of resistance R3
Play the role of pulling down outer member voltage when USB-C controls chip interior does not have voltage, to ensure that USB-C controls chip pair
The signal transmitted on CC1 pins is normally handled.Pass through PMOS transistor Q3 and resistance R5 identical with the resistance value of resistance R3
And PMOS transistor Q4 and resistance R6 identical with the resistance value of resistance R4 so that NMOS transistor Q1 and Q2 do not influence USB-C
Chip is controlled to the function of first interface and second interface signal processing, which, which can solve NMOS transistor Q1 and Q2, causes
USB-C control chip the problem of Dead battery can not carry out equipment detection.
Fig. 5 is the schematic diagram of USB-C control chips according to a third embodiment of the present invention.As shown in figure 5, the present embodiment
USB-C control chip internal circuit configuration and the USB-C control chips of second embodiment of the invention it is identical, and in the present invention the
On the basis of the USB-C control chips of two embodiments, two selecting switch are increased.The first choice end of selecting switch S3 and choosing
The third selection end for selecting switch S1 is connected, and the first choice end of selecting switch S4 is connected with the third of selecting switch S2 selection end
It connects.The second of the second selection end and selecting switch S3 of selecting switch S3 selects end to be connected, and with the electricity of power supply control chip
Pressure output interface VCONN is connected.
The embodiments of the present invention also provide a kind of USB-C systems.The USB-C systems include the USB- of the embodiment of the present invention
C controls chip.
Specifically, the system includes USB-C control chips, USB-C control chips include：First resistor, the first termination
Ground；Second resistance, first end ground connection；First NMOS transistor, source electrode are connected with the second end of first resistor, and drain conduct
USB-C controls the first interface of chip, and grid connects threshold voltage, wherein when the drain voltage of the first NMOS transistor is more than
When threshold voltage, the source electrode of the first NMOS transistor is separated with drain electrode；And second NMOS transistor, source electrode and the second electricity
The second end of resistance is connected, and drains and controls the second interface of chip as USB-C, and grid connects threshold voltage, wherein when second
When the drain voltage of NMOS transistor is more than threshold voltage, the source electrode of the second NMOS transistor with drain it is separated；And
USB-C connectors, the first interface that first interface controls chip with USB-C are connected, second interface and USB-C control chips
Second interface is connected.
Preferably, which further includes power supply control chip, the first interface of voltage output interface and USB-C control chips
The second interface that chip is controlled with USB-C is connected.
Fig. 6 is the schematic diagram of USB-C systems according to the ... of the embodiment of the present invention.As shown in fig. 6, the USB-C systems include
USB-C controls chip protection circuit 100, and USB-C control chip protection circuits 100 are USB-C controls provided in an embodiment of the present invention
Chip protection circuit processed.The USB-C systems further include USB-C control chips 200, and USB-C controls two pins of chip 200
CC1 ' and CC2 ' is connected with USB-C control chip protection circuits 100, and USB-C controls the pin CC1 " of chip protection circuit 100
The interface being connect with outer member as USB-C control chips 200 with CC2 ".Preferably, USB-C controls chip protection circuit
100 can also be integrated in USB-C control chips 200, be integrated with the USB-C control cores of USB-C control chip protection circuits 100
Piece 200 is USB-C controls chip provided in an embodiment of the present invention.USB-C control chip protection circuit 100 pin CC1 " and
CC2 " is connected with the A5 pins of USB-C connectors 400 and B5 pins respectively, and with the voltage output of power supply control chip 300
Interface VCONN is connected.
USB controls the SSTX pins of chip 500 and SSRX pins use USB3.0 interface standards, believes respectively with USB high speeds
The SSTX pins of number switch chip 600 are connected with SSRX pins.The TX1+ of USB high speed signals switch chip 600/- pin with
The A2/3 of USB-C connectors 400 is connected, RX1+/- pin and the USB-C connectors 400 of USB high speed signals switch chip 600
B10/11 be connected, TX2+/- pin of USB high speed signals switch chip 600 is connected with the B2/3 of USB-C connectors 400
It connects, RX2+/- pin of USB high speed signals switch chip 600 is connected with the A10/11 of USB-C connectors 400, and USB high speeds are believed
The SBU1/SBU2 pins of number switch chip 600 are connected with the A8/B8 of USB-C connectors 400.The D+ of USB control chips 500/
D- pins use USB2.0 interface standards, are connected with A6/B6 the and A7/B7 pins of USB-C connectors 400.USB controls chip
500 are connected with power supply control chip 300, the A4/B4/ of the VBUS pins and USB-C connectors 400 of power supply control chip 300
A9/B9 pins are connected.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, any made by repair
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (3)
1. a kind of USB-C controls chip, which is characterized in that including：
First resistor, first end ground connection；
Second resistance, first end ground connection；
First NMOS transistor, source electrode are connected with the second end of the first resistor, drain electrode as USB-C control chips the
One interface, grid connect threshold voltage, wherein when the drain voltage of first NMOS transistor is more than the threshold voltage
When, the source electrode of first NMOS transistor is separated with drain electrode；And
Second NMOS transistor, source electrode are connected with the second end of the second resistance, and drain electrode controls chip as the USB-C
Second interface, grid connects the threshold voltage, wherein when the drain voltage of second NMOS transistor is more than the threshold
When threshold voltage, the source electrode of second NMOS transistor is separated with drain electrode；
Wherein, the USB-C controls chip further includes：
First PMOS transistor, source electrode are connected with the drain electrode of first NMOS transistor, and grid connects the threshold voltage；
3rd resistor, first end are connected with the drain electrode of first PMOS transistor, second end ground connection, wherein the third
The resistance value of resistance is identical as the resistance value of the first resistor；
Second PMOS transistor, source electrode are connected with the drain electrode of second NMOS transistor, and grid connects the threshold voltage；
And
4th resistance, first end are connected with the drain electrode of second PMOS transistor, second end ground connection, wherein the described 4th
The resistance value of resistance is identical as the resistance value of the second resistance.
2. a kind of USB-C systems, which is characterized in that including：
USB-C controls chip, including：
First resistor, first end ground connection；Second resistance, first end ground connection；First NMOS transistor, source electrode and the first resistor
Second end be connected, first interface of the drain electrode as USB-C control chips, grid connection threshold voltage, wherein when described the
When the drain voltage of one NMOS transistor is more than the threshold voltage, the interruption of the source electrode and drain electrode of first NMOS transistor
It opens；And second NMOS transistor, source electrode are connected with the second end of the second resistance, drain electrode is controlled as the USB-C
The second interface of chip, grid connect the threshold voltage, wherein when the drain voltage of second NMOS transistor is more than institute
When stating threshold voltage, the source electrode of second NMOS transistor is separated with drain electrode；And
USB-C connectors, the first interface that first interface and the USB-C control chip are connected, second interface with it is described
The second interface of USB-C control chips is connected；
Wherein, the USB-C controls chip further includes：
First PMOS transistor, source electrode are connected with the drain electrode of first NMOS transistor, and grid connects the threshold voltage；
3rd resistor, first end are connected with the drain electrode of first PMOS transistor, second end ground connection, wherein the third
The resistance value of resistance is identical as the resistance value of the first resistor；
Second PMOS transistor, source electrode are connected with the drain electrode of second NMOS transistor, and grid connects the threshold voltage；
And
4th resistance, first end are connected with the drain electrode of second PMOS transistor, second end ground connection, wherein the described 4th
The resistance value of resistance is identical as the resistance value of the second resistance.
3. system according to claim 2, which is characterized in that the system also includes：
Power supply control chip, voltage output interface control chip with the first interface of USB-C control chips and the USB-C
Second interface be connected.
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| CN106059553B (en) * | 2016-07-29 | 2024-05-03 | 珠海智融科技股份有限公司 | Device for realizing Ra resistance in USB Type-C EMCA cable |
| CN106410525B (en) * | 2016-10-26 | 2019-08-20 | 维沃移动通信有限公司 | A kind of interface circuit, electronic equipment and its control method |
| CN106802875A (en) * | 2017-01-13 | 2017-06-06 | 珠海市魅族科技有限公司 | Electronic equipment |
| CN107145456B (en) * | 2017-04-10 | 2021-05-04 | 硅谷数模半导体（北京）有限公司 | Method, device and system for identifying self-connection of equipment |
| FR3070797A1 (en) * | 2017-09-01 | 2019-03-08 | Stmicroelectronics (Rousset) Sas | HIGH VOLTAGE PROTECTION CIRCUIT FOR USB TYPE C RECEIVER |
| US10381787B1 (en) * | 2018-05-21 | 2019-08-13 | Cypress Semiconductor Corporation | Voltage protection for universal serial bus type-C (USB-C) connector systems |
| CN110990320B (en) * | 2019-12-09 | 2021-03-12 | 无锡睿勤科技有限公司 | Identification system of Type-C interface |
| CN113472340B (en) * | 2021-06-11 | 2023-11-21 | 上海南芯半导体科技股份有限公司 | Interface circuit for USB Type-C/PD communication and control method thereof |
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| JP2003068870A (en) * | 2001-08-29 | 2003-03-07 | Yamaha Corp | Esd protection circuit |
| TWI306251B (en) * | 2004-06-18 | 2009-02-11 | Tian Holdings Llc | System of sampleing interface for pick-up head |
| US7236002B2 (en) * | 2005-09-15 | 2007-06-26 | Dialog Semiconductor Gmbh | Digital CMOS-input with N-channel extended drain transistor for high-voltage protection |
| CN101895195B (en) * | 2010-07-01 | 2012-10-03 | 中国航天科技集团公司第九研究院第七七一研究所 | Ultrahigh pressure signal interface circuit |
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