CN101894843A - Ferroelectric dynamic random access memory based on lead zirconate titanate memory medium and preparation method thereof - Google Patents
Ferroelectric dynamic random access memory based on lead zirconate titanate memory medium and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 73
- 229910052451 lead zirconate titanate Inorganic materials 0.000 title claims abstract description 32
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 title claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 224
- 238000000034 method Methods 0.000 claims abstract description 136
- 238000001259 photo etching Methods 0.000 claims abstract description 103
- 229910052751 metal Inorganic materials 0.000 claims abstract description 78
- 239000002184 metal Substances 0.000 claims abstract description 78
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 77
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 77
- 239000010703 silicon Substances 0.000 claims abstract description 77
- 229910018516 Al—O Inorganic materials 0.000 claims abstract description 12
- 238000005275 alloying Methods 0.000 claims abstract description 12
- 238000004140 cleaning Methods 0.000 claims abstract description 5
- 238000012360 testing method Methods 0.000 claims abstract description 4
- 239000010408 film Substances 0.000 claims description 93
- 239000010409 thin film Substances 0.000 claims description 83
- 238000005530 etching Methods 0.000 claims description 63
- 238000001039 wet etching Methods 0.000 claims description 41
- 239000003292 glue Substances 0.000 claims description 37
- 239000000853 adhesive Substances 0.000 claims description 36
- 230000001070 adhesive effect Effects 0.000 claims description 36
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 33
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 31
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 27
- 230000003647 oxidation Effects 0.000 claims description 26
- 238000007254 oxidation reaction Methods 0.000 claims description 26
- 238000006243 chemical reaction Methods 0.000 claims description 25
- 238000005516 engineering process Methods 0.000 claims description 24
- 238000003860 storage Methods 0.000 claims description 24
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 20
- 229910052796 boron Inorganic materials 0.000 claims description 20
- 238000000231 atomic layer deposition Methods 0.000 claims description 18
- 238000002347 injection Methods 0.000 claims description 18
- 239000007924 injection Substances 0.000 claims description 18
- 238000010884 ion-beam technique Methods 0.000 claims description 18
- 238000012546 transfer Methods 0.000 claims description 18
- 229910052698 phosphorus Inorganic materials 0.000 claims description 17
- 239000011574 phosphorus Substances 0.000 claims description 17
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 16
- 239000011248 coating agent Substances 0.000 claims description 15
- 238000000576 coating method Methods 0.000 claims description 15
- 229910052782 aluminium Inorganic materials 0.000 claims description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 13
- 229910052757 nitrogen Inorganic materials 0.000 claims description 12
- 229910044991 metal oxide Inorganic materials 0.000 claims description 11
- 229910052697 platinum Inorganic materials 0.000 claims description 11
- 238000012545 processing Methods 0.000 claims description 11
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 10
- 238000000137 annealing Methods 0.000 claims description 10
- 238000005229 chemical vapour deposition Methods 0.000 claims description 10
- 238000000280 densification Methods 0.000 claims description 9
- 239000007788 liquid Substances 0.000 claims description 9
- 238000001459 lithography Methods 0.000 claims description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 238000001312 dry etching Methods 0.000 claims description 4
- 150000004706 metal oxides Chemical class 0.000 claims description 4
- 239000007769 metal material Substances 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 abstract description 11
- 238000004377 microelectronic Methods 0.000 abstract description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 abstract 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract 1
- 229910052593 corundum Inorganic materials 0.000 abstract 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 abstract 1
- 230000001590 oxidative effect Effects 0.000 abstract 1
- 229910001845 yogo sapphire Inorganic materials 0.000 abstract 1
- WYURNTSHIVDZCO-UHFFFAOYSA-N Tetrahydrofuran Chemical compound C1CCOC1 WYURNTSHIVDZCO-UHFFFAOYSA-N 0.000 description 12
- 239000002243 precursor Substances 0.000 description 12
- 230000010287 polarization Effects 0.000 description 9
- 239000010931 gold Substances 0.000 description 8
- 238000005352 clarification Methods 0.000 description 6
- 239000007772 electrode material Substances 0.000 description 6
- 230000014759 maintenance of location Effects 0.000 description 6
- 239000012046 mixed solvent Substances 0.000 description 6
- 239000000243 solution Substances 0.000 description 6
- 238000003756 stirring Methods 0.000 description 6
- 239000004411 aluminium Substances 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- VNSWULZVUKFJHK-UHFFFAOYSA-N [Sr].[Bi] Chemical compound [Sr].[Bi] VNSWULZVUKFJHK-UHFFFAOYSA-N 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000002269 spontaneous effect Effects 0.000 description 3
- 238000010276 construction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000007921 spray Substances 0.000 description 2
- 238000002207 thermal evaporation Methods 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910018557 Si O Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910002115 bismuth titanate Inorganic materials 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000003467 diminishing effect Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000005527 interface trap Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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Abstract
The invention relates to a preparation method of a ferroelectric dynamic random access memory based on lead zirconate titanate memory medium, which belongs to the technical field of micro-electronic new materials and devices. The ferroelectric dynamic random access memory comprises a silicon substrate, a source region, a drain region, an isolating layer medium film, a ferroelectric film layer, a gate electrode, a source electrode, a drain electrode, a substrate contact region and a substrate contact electrode, wherein the substrate contact region and the substrate contact electrode are used for testing the memory; the isolating layer medium is any one of HfO2, Hf-Al-O, TiO2 or Al2O3; and the ferroelectric film layer is Pb(Zr1-xTix)O3. The method comprises the following steps: cleaning and oxidizing the silicon substrate; photoetching for the first time to form the source region and the drain region; photoetching for the second time to form the substrate contact region; growing an oxide layer; photoetching for the third time to form the gate region; photoetching for the fourth time and the fifth time to form the gate electrode and the contact hole; preparing the source electrode, the drain electrode and the substrate contact metal layer; and alloying. The ferroelectric dynamic random access memory (FEDRAM) has the advantages of smaller electric leakage and higher retentivity.
Description
Technical field
The invention belongs to microelectronics new material and device technology field, particularly a kind of based on lead zirconate titanate (PZT) and high dielectric constant film (abbreviation: the technology of preparing of ferroelectric dynamic random access memory (FEDRAM) high K dielectric film).
Background technology
Ferroelectric material has spontaneous polarization and spontaneous polarization can be orientated with extra electric field, remove external electric field after, the polarization of ferroelectric material can be in equal and opposite in direction, two residual polarization (± P that direction is opposite
r) state, these two kinds of stable polarized states realize the conversion between " 1 " and " 0 " state outside under the effect of electric field, thereby can be used as the binary code of memory.Owing to do not need to rely on external electric field to keep memory, therefore, as far back as nineteen fifty-two, Anderson just utilizes this principle to propose the notion of non-volatility ferroelectric random asccess memory (Nonvolatile Ferroelectric Random AccessMemory-NVFRAM) first.
The non-volatility ferroelectric memory mainly contains two kinds of versions: a kind of is ferroelectric RAM (FeRAM), and a kind of is ferro-electric field effect transistor (FeFET).The memory cell of FeRAM mainly is to rely on ferroelectric capacitor to carry out the storage of data, and ferroelectric capacitor is its core.Characteristics such as that FeRAM has is non-volatile, write fast, low in energy consumption, often erasable and capability of resistance to radiation is strong have become a class with fastest developing speed in the non-volatile ferroelectric memory.But the shortcoming that exists is: reading of data had destructiveness, must take the write-back mode; Simultaneously, owing to adopt capacitance structure also to limit the further raising of memory capacity.
FeFET is the grid region that ferroelectric thin film directly is deposited on field effect transistor (FET), the control of electric current realized the access to data between the spontaneous polarization that utilizes ferroelectric material was leaked the source, because this structure does not contain ferroelectric electric capacity, thereby size is less, can obtain the storage density higher than FeRAM; The storage principle of FeFET has determined its nondestructive data to read simultaneously.In theory, FeFET more can embody the advantage of ferroelectric memory than FeRAM.Therefore, as far back as nineteen fifty-five, Bell Laboratory has just proposed the idea about FeFET first, but up to 1974, talent's reported first such as S.Y.Wu based on bismuth titanates (Bi
4Ti
3O
12) the FET device of ferroelectric thin film.But, make the retention time of FeFET fall short of because the interface between ferroelectric thin film and the Si (F-S) exists the problems such as defective of iunjected charge, interface trap and film itself.In order effectively to utilize some advantages of FeFET structure itself, overcome the difficulty that FeFET runs into again in realization, 2000, the T.P.Ma of electronic engineering of Yale professor's ferroelectric memory research group thinks that this limited retention time is always much longer than the refresh time of dynamic random access memory (DRAM), therefore, the notion that has proposed ferroelectric dynamic random access memory (FEDRAM) first (is seen T.P.Ma, J.P.Han, A ferroelectric dynamicrandom access memory, U.S.Patent 6067244 (2000)).FEDRAM is with the gate medium of ferroelectric thin film as MOSFET, and between ferroelectric thin film and Si, add separator, thereby form metal-ferroelectric thin film-separator-Si (MFIS-FET) field-effect transistor structure, as shown in Figure 1, comprising: silicon substrate 11, source region 12, drain region 13, separator deielectric-coating 14, ferroelectric thin film layer 15, gate electrode 16, source electrode 17, drain electrode 18.In silicon substrate 11, form source region 12 and drain region 13, above silicon substrate 11, form separator deielectric-coating 14, above separator deielectric-coating 14, form ferroelectric thin film layer 15, on ferroelectric thin film layer 15, form gate electrode 16.Source electrode 17 and drain electrode 18 both sides at gate electrode 16.
In said structure, form source region 12 and drain region 13 in the silicon substrate 11, its end contacts with a part in the separator deielectric-coating 14 respectively.Separator deielectric-coating 14 is nitride (Si
3N
4).Ferroelectric thin film layer 15 is strontium bismuth tantalate (SrBi
2Ta
2O
9: SBT).Gate electrode 16 is gold (Au) or a platinum (Pt).Source electrode 17 and drain electrode 18 are aluminium (Al).
The preparation technology of above-mentioned device architecture comprises:
(1) to cleaning earlier and oxidation on the p type Si substrate,
P type Si substrate resistance rate is: 6-9 Ω cm or 21-24 Ω cm, and oxidated layer thickness is 1000nm;
(2) utilize phosphorus (P
2O
5) inject the formation source-drain area;
(3) preparation separator dielectric film:
Utilize and spray vapour deposition (JVD) method grown silicon nitride (Si
3N
4) the separator dielectric film, film thickness is about 5～6nm; AN 30 minutes, temperature was 800 ℃ afterwards;
(4) preparation ferroelectric thin film:
Utilize metal oxide deposition (MOD) method growth strontium bismuth tantalate (SrBi
2Ta
2O
9, be abbreviated as SBT) and ferroelectric thin film, thickness is 200～260nm; And in oxygen, annealed 1 hour, temperature is 800～900 ℃;
(5) preparation gate electrode:
Utilize electron beam evaporation platinum electrode (Pt), perhaps thermal evaporation gold (Au) forms gate electrode;
(6) thermal evaporation aluminium electrode (Al) forms source electrode and drain metal layer;
(7) Alloying Treatment
At 400 ℃ of nitrogen and hydrogen (N
2: H
2=5%: carried out the alloying annealing in process 95%) 30 minutes.
On structure, this is a kind of novel single tube DRAM (common DRAM unit is the 1T1C structure).It is compared with traditional DRAM, has following advantage: (1) retention time than traditional DRAM (＜1s) much longer;
(2) owing to need not storage capacitance, thereby cell size reduces, and helps the raising of storage density; (3) the very big shortening that need not storage capacitance and refreshing frequency makes power consumption reduce; (4) need not storage capacitance and make it easier to be integrated, realize the Embedded Application of FEDRAM with logical device.
The operation principle of FEDRAM is: applied on grid after the positive pulse, ferroelectric material is in positive residual polarization state.The positive polarization electric charge of ferroelectric layer bottom will just have been formed a conducting channel that connects source region and drain region like this by the compensation of the inversion layer charge in the semiconductor in the Semiconductor substrate.Add certain voltage between leaking in the source, just can produce source-drain current,, just so-called ON state, corresponding storage one state.If applied a negative pulse on grid, ferroelectric layer is in negative polarized state, and Semiconductor substrate is in accumulation area, does not have conducting channel, and FET is in " shutoff " state, promptly corresponding " 0 " attitude.Compare with FeFET, FEDRAM need refresh when work, so that canned data is maintained, compares with DRAM, and FEDRAM has the long retention time, thereby can reduce refreshing frequency.And be nonvolatile as the FeFET of another type of ferroelectric memory, do not need in theory to refresh.Therefore, compare with FeFET, FEDRAM is more feasible in realization, thereby makes FeFET obtain new development space.
Adopt strontium bismuth tantalate (SrBi in the disclosed said structure of Yale University
2Ta
2O
9: SBT) as gate dielectric material.But the remanent polarization of SBT film is less, and film-forming temperature is higher, is unfavorable for the compatibility of ferroelectric capacitor and standard CMOS integrated technique.On the technology of preparing of film, the method for manufacturing thin film of use is to spray vapour deposition (JVD) method, is unfavorable for the realization of large area uniform film.Adopt nitride as the separator medium,, make operating voltage higher, be unfavorable for the reduction of device power consumption because its dielectric constant is less.
High K dielectric film is meant the metal-oxide film with high dielectric constant, for example: HfO
2, ZrO
2, Pr
2O
3, Gd
2O
3, La
2O
3, Y
2O
3Hf-Al-O and Hf-Si-O etc., these materials have electric property preferably, thermodynamic stability, good interface effect and with the compatible of silicon technology and reliability preferably, therefore, under the diminishing trend of integrated circuit technology live width, can replace traditional gate medium (for example: SiO
2, Si
3N
4), to satisfy when not reducing transistor gate thickness, increase the purpose of its electric capacity.
Summary of the invention
The objective of the invention is for overcoming the weak point of prior art, propose a kind of ferroelectric dynamic random access memory based on lead zirconate titanate (PZT) storage medium and preparation method thereof.The present invention adopts novel storage medium and separator dielectric film and new preparation method, obtained large tracts of land, even compact, well behaved storage medium film and insolated layer materials, its change in film thickness scope is bigger, FEDRAM device with its preparation has littler electric leakage, higher retention performance.
A kind of ferroelectric dynamic random access memory based on the lead zirconate titanate storage medium that the present invention proposes comprises: silicon substrate, source region, drain region, the separator deielectric-coating, ferroelectric thin film layer, gate electrode, source electrode, drain electrode, and the substrate contact region and the substrate contact electrode that are used to test this memory; Wherein, form source region, drain region and substrate contact region in silicon substrate, formation separator deielectric-coating forms ferroelectric thin film layer on the separator deielectric-coating on silicon substrate, forms gate electrode on ferroelectric thin film layer; Source electrode and drain electrode are in the both sides of gate electrode.It is characterized in that described separator medium is: HfO
2, Hf-Al-O, TiO
2, Al
2O
3In any one; Described ferroelectric thin film layer is: Pb (Zr
1-xTi
x) O
3, the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=(1-x): x, wherein, the x span is 0.1＜x＜1.0.
The preparation method of above-mentioned ferroelectric dynamic random access memory may further comprise the steps:
(1) silicon substrate is cleaned;
(2) oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 650～900nm;
(3) photoetching for the first time forms source-drain area:
Silicon substrate carries out photoetching after adopting positive adhesive process to oxidation, post bake, wet etching, stay glue phosphorus (
31P
+) inject or the boron injection, form source-drain area, inject energy and dosage and be respectively 60～80KeV, 4.0 * 10
15～5.0 * 10
15Cm
-3
(4) photoetching for the second time forms substrate contact region:
Adopt the silicon substrate after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake, wet etching stays glue boron (BF
+) inject or the phosphorus injection, form substrate contact region; Inject energy and dosage and be respectively 70～80KeV, 4.0 * 10
15～5.0 * 10
15Cm
-3
(5) growth oxide layer:
Substrate after utilizing low-pressure chemical vapor deposition to Twi-lithography carries out the oxidation second time, and oxidated layer thickness is 600～700nm, in nitrogen substrate is carried out densification afterwards, and temperature is 850-900 ℃;
(6) photoetching for the third time forms the grid region:
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake, wet etching, stay glue boron (
11B
+) transfer ditch to inject or the injection of phosphorus accent ditch, form the grid region; Transfer ditch injection energy and dosage to be respectively 40～50KeV, 2.0 * 10
12～8.0 * 10
13Cm
-3
(7) growth separator dielectric film:
Utilize on the substrate of technique for atomic layer deposition after step (6) is handled and prepare HfO
2, Hf-Al-O, TiO
2, Al
2O
3In any one separator dielectric film; Reaction temperature is: 100～230 ℃, film thickness is: 5～20nm;
(8) growth ferroelectric thin film:
Utilize liquid state to transport-the metal oxide chemical vapor deposition method, in reaction chamber, on the separator dielectric film that step (7) forms, prepare pzt thin film; Process conditions are: chamber pressure 25～35 torrs, 560～650 ℃ of growth temperatures, 650～720 rev/mins of substrate rotating speeds (rmp), growth time 20～60 minutes, film thickness 100～300nm;
(9) preparation electrode metal layer:
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, metal material is: platinum Pt, perhaps golden Au, thickness is about: 150～200nm;
(10) the 4th photoetching form gate electrode:
Utilize the ion beam etching technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode, etch rate is: 20～60nm/ minute, or adopt positive glue to peel off method formation gate electrode;
(11) the 5th photoetching form contact hole:
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region, drain region and substrate contact region in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 20～100nm/ minute; Etching separator dielectric film speed is: 1.5～3nm/ minute;
(12) preparation metal level:
To carrying out normal temperature sputtered aluminum electrode on the substrate after step (11) processing, thickness is about: 800～1200nm;
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt wet etching Al or dry etching Al, perhaps positive glue is peeled off Al, step (10) is handled the back metal level carry out photoetching and etching, form the source metal, drain metal layer and the substrate contact electrode metal level that contact with source-drain area, substrate contact region respectively;
(14) Alloying Treatment:
Substrate after step (13) processing was carried out annealing in process 20～40 minutes in 420 ℃～450 ℃ nitrogen.
Beneficial effect of the present invention:
In the present invention, adopt high K dielectric film as separator (as: HfO
2, Hf-Al-O, TiO
2, Al
2O
3), utilize technique for atomic layer deposition (ALD) to carry out the isolated layer film preparation, and adopt metal organic chemical vapor deposition (LD-MOCVD) technology to carry out the preparation of PZT ferroelectric thin film.Be with former researcher's difference: adopt different storage medium and insolated layer materials, different method for manufacturing thin film and process conditions, obtained large tracts of land, even compact, well behaved storage medium film and insolated layer materials, its change in film thickness scope is bigger, and uses it in the preparation of FEDRAM.
Its effect will make ferroelectric thin film have bigger remanent polarization, lower operating voltage, film thickness wider range.Among the present invention, utilize the PZT ferroelectric thin film of LD-MOCVD method preparation, have better uniformity and stability, easily compatible mutually with the CMOS integrated technique, make the FEDRAM device of its preparation have littler electric leakage, higher retention performance.
Description of drawings
Fig. 1 is existing FEDRAM device unit construction schematic diagram;
Fig. 2 is a FEDRAM device unit construction schematic diagram of the present invention.
Embodiment
The present invention proposes reaches embodiment in conjunction with the accompanying drawings based on ferroelectric dynamic random access memory (FEDRAM) of lead zirconate titanate (PZT) storage medium and preparation method thereof and is described in detail as follows:
The FEDRAM device architecture that the present invention proposes as shown in Figure 2, comprising: silicon substrate 21, source region 22, drain region 23, separator deielectric-coating 24, ferroelectric thin film layer 25, gate electrode 26, source electrode 27, drain electrode 28, and the substrate contact region 29 and the substrate contact electrode 30 that are used to test this memory; Form source region 22 in the silicon substrate 21, drain region 23 and substrate contact region 29 form separator deielectric-coating 24 above silicon substrate 21, form ferroelectric thin film layer 25 above separator deielectric-coating 24, form gate electrode 26 above ferroelectric thin film layer 25.Source electrode 27 and drain electrode 28 both sides at gate electrode 26.
Structure of the present invention and existing FEDRAM are basic identical, and its difference technical characterictic is to adopt different storage medium and insolated layer materials, and different method for manufacturing thin film and process conditions specify as follows:
Ferroelectric thin film layer 25 of the present invention is: Pb (Zr
1-xTi
x) O
3(PZT), the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=(1-x): x, wherein, the x span is 0.1＜x＜1.0, better span can be 0.2≤x≤0.7; Described film thickness is 100nm～300nm.
The FEDRAM preparation of devices method that the present invention proposes as shown in Figure 2, may further comprise the steps:
(1) silicon substrate is cleaned; Substrate 21 can be p type silicon, also can be n type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation: the oxide layer of on the silicon substrate after the cleaning, growing, (this step is a conventional process) oxidated layer thickness is 650～900nm;
(3) photoetching for the first time forms source-drain area:
If substrate 21 is a p type silicon, the source region is n
+District 22, the drain region is n
+District 23;
If substrate 21 is a n type silicon, the source region is p
+District 22, the drain region is p
+District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake, wet etching stays glue boron (BF
+) inject or the phosphorus injection, form substrate contact region 29; Inject energy and dosage and be respectively 70～80KeV, 4.0 * 10
15～5.0 * 10
15(cm
-3) (adopting common process parameter and condition);
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out the oxidation second time (common process), oxidated layer thickness is 600～700nm, in nitrogen substrate is carried out densification afterwards, and temperature is 850-900 ℃;
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake, wet etching, stay glue boron (
11B
+) transfer ditch to inject or the injection of phosphorus accent ditch, form the grid region; Transfer ditch injection energy and dosage to be respectively 40～50KeV, 2.0 * 10
12～8.0 * 10
13(cm
-3) (adopting common process parameter and condition);
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare HfO
2, Hf-Al-O, TiO
2, Al
2O
3In any one separator dielectric film 24; Reaction temperature is: 100～230 ℃, film thickness is: 5～20nm;
(8) growth ferroelectric thin film
Utilize liquid state to transport-metal oxide chemical vapor deposition (LD-MOCVD) method, in reaction chamber, preparation pzt thin film 25 on the separator dielectric film that step (7) forms; Process conditions are: chamber pressure 25～35 torrs, 560～650 ℃ of growth temperatures, 650～720 rev/mins of substrate rotating speeds (rmp), growth time 20～60 minutes, film thickness 100～300nm;
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, metal material is: platinum Pt, perhaps golden Au, thickness is about: 150～200nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 20～60nm/ minute, or adopt positive glue to peel off method formation gate electrode 26;
(11) the 5th photoetching form contact hole
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region 22, drain region 23 and substrate contact region 29 in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 20～100nm/ minute; Etching separator dielectric film speed is: 1.5～3nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature sputtered aluminum electrode (Al) on the substrate after step (11) processing, thickness is about: 800～1200nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional wet etching Al or dry etching Al, perhaps positive glue is peeled off Al, step (10) is handled the back metal level carry out photoetching and etching, form respectively the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with substrate contact region 29 with source- drain area 22,23;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 420 ℃～450 ℃ nitrogen (N
2) in carried out annealing in process 20～40 minutes.
By the following examples structure of the present invention and preparation method are specifically described, the overall structure of the ferroelectric dynamic random access memory of each embodiment is basic identical with the structure of existing similar device, no longer repeats.
Embodiment 1 present embodiment is a kind of ferroelectric dynamic random access memory based on the PZT storage medium and preparation method thereof
The separator medium of present embodiment is: HfO
2Ferroelectric thin film layer is: Pb (Zr
0.4Ti
0.6) O
3(PZT), the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=0.4: 0.6.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on silicon substrate, growing, oxidated layer thickness is 650nm;
(3) photoetching for the first time forms source-drain area
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF
+) inject, form substrate contact region 29; Inject energy and dosage and be respectively 70KeV, 4.0 * 10
15(cm
-3) (common process);
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out the oxidation second time (common process), oxidated layer thickness is 600nm, in nitrogen substrate is carried out densification 30 minutes afterwards, and temperature is 850 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron (
11B
+) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 40KeV, 2.0 * 10
12(cm
-3)
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare HfO
2 Separator dielectric film 24; Preparation HfO
2The reaction source of film is HfCl
4/ H
2O, reaction temperature is: 230 ℃, film thickness is: 5nm;
(8) growth ferroelectric thin film
Utilize liquid state to transport-metal oxide chemical vapor deposition (LD-MOCVD) method, in reaction chamber, on the separator dielectric film that step (7) forms, prepare pzt thin film; The preparation method specifically comprises: the 1. preparation of precursor: with solute Zr[C
11H
19O
2]
4(1g), Ti[OCH (CH
3)] [C
11H
19O
2] (0.4g), Pb[C
11H
19O
2]
2(0.5g) being dissolved in oxolane (THF) (18ml) and in four-glycol dimethyl ether (gyl) mixed solvent (2ml), is fully to stir 20 minutes under 25 ℃ of conditions in temperature, to form the uniform PZT precursor solution of clarification.2. pzt thin film preparation: process conditions are: chamber pressure 25 torrs, 560 ℃ of growth temperatures, 650 rev/mins of substrate rotating speeds (rmp), growth time 20 minutes, pzt thin film thickness 100nm;
(9) preparation gate electrode metal layer (common process)
Sputter top electrode on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 150nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 60nm/ minute;
(11) the 5th photoetching form contact hole
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake 30 minutes, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region 22, drain region 23 and substrate contact region 29 in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 100nm/ minute; Etching separator dielectric film speed is: 1.5nm/ minute;
(12) preparation metal level (common process)
To carrying out normal temperature sputtered aluminum electrode (Al) on the substrate after step (11) processing, thickness is about: 800nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional wet etching Al, step (10) is handled the back metal level carry out photoetching and etching, form source metal 27, drain metal 28 and substrate contact metal 30;
(14) Alloying Treatment
Substrate after step (13) handled is at 420 ℃ of nitrogen (N
2) in carried out annealing in process 20 minutes.
Embodiment 2 present embodiments are a kind of ferroelectric dynamic random access memory based on the PZT storage medium and preparation method thereof
The separator medium of present embodiment is: HfO
2Ferroelectric thin film layer is: Pb (Zr
0.4Ti
0.6) O
3(PZT), the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=0.4: 0.6.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on silicon substrate, growing, oxidated layer thickness is 900nm;
(3) photoetching for the first time forms source-drain area
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF
+) inject, form substrate contact region 29; Inject energy and dosage and be respectively 80KeV, 5.0 * 10
15(cm
-3) (common process);
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 700nm, in nitrogen substrate is carried out densification 30 minutes afterwards, and temperature is 900 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron (
11B
+) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 50KeV, 8.0 * 10
13(cm
-3);
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare HfO
2 Separator dielectric film 24; Preparation HfO
2The reaction source of film is TEMAH (Hf[N (CH
3) (C
2H
5)]
4), reaction temperature is: 100 ℃, film thickness is: 20nm;
(8) growth ferroelectric thin film
Utilize liquid state to transport-metal oxide chemical vapor deposition (LD-MOCVD) method, in reaction chamber, preparation pzt thin film 25 on the separator dielectric film that step (7) forms; Technology of preparing comprises: the 1. preparation of precursor.With solute Zr[C
11H
19O
2]
4(3g), Ti[OCH (CH
3)] [C
11H
19O
2] (1.5g), Pb[C
11H
19O
2]
2(1.9g) being dissolved in oxolane (THF) (35ml) and in four-glycol dimethyl ether (gyl) mixed solvent (5ml), is fully to stir 40 minutes under 40 ℃ of conditions in temperature, to form the uniform PZT precursor solution of clarification.2. film preparation.Process conditions are: chamber pressure 35 torrs, 650 ℃ of growth temperatures, 720 rev/mins of substrate rotating speeds (rmp), growth time 60 minutes, film thickness 300nm;
(9) preparation gate electrode metal layer (common process)
Sputter top electrode on the ferroelectric thin film that step (8) forms, electrode material is: golden Au, thickness is about: 200nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 60nm/ minute, form gate electrode 26;
(11) the 5th photoetching form contact hole
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake 30 minutes, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region 22, drain region 23 and substrate contact region 29 in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 20nm/ minute; Etching separator dielectric film speed is: 3nm/ minute;
(12) preparation metal level (common process)
To carrying out normal temperature sputtered aluminum electrode (Al) on the substrate after step (11) processing, thickness is about: 1200nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional dry etching Al, perhaps positive glue is peeled off Al, step (10) is handled the back metal level carry out photoetching and etching, forms source metal 27, drain metal 28 and substrate contact metal 30;
(14) Alloying Treatment
Substrate after step (13) handled is at 450 ℃ of nitrogen (N
2) in carried out annealing in process 40 minutes.
Embodiment 3 present embodiments are a kind of ferroelectric dynamic random access memory based on the PZT storage medium and preparation method thereof
The separator medium of present embodiment is: TiO
2Ferroelectric thin film layer is: Pb (Zr
0.4Ti
0.6) O
3(PZT), the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=0.4: 0.6.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on silicon substrate, growing, oxidated layer thickness is 700nm;
(3) photoetching for the first time forms source-drain area
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF
+) inject, form substrate contact region 29; Inject energy and dosage and be respectively 75KeV, 4.3 * 10
15(cm
-3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 650nm, in nitrogen substrate is carried out densification 30 minutes afterwards, and temperature is 880 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron (
11B
+) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 45KeV, 6.0 * 10
12(cm
-3)
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare TiO
2 Separator dielectric film 24; Preparation TiO
2The reaction source of film is TiCl
4/ H
2O, reaction temperature is: 200 ℃, film thickness is: 10nm;
(8) growth ferroelectric thin film
Utilize liquid state to transport-metal oxide chemical vapor deposition (LD-MOCVD) method, in reaction chamber, on the separator dielectric film that step (7) forms, prepare pzt thin film 25; Technology of preparing comprises: the 1. preparation of precursor.With solute Zr[C
11H
19O
2]
4(1.6g), Ti[OCH (CH
3)] [C
11H
19O
2] (0.7g), Pb[C
11H
19O
2]
2(0.9g) being dissolved in oxolane (THF) (25ml) and in four-glycol dimethyl ether (gyl) mixed solvent (3ml), is fully to stir 30 minutes under 35 ℃ of conditions in temperature, to form the uniform PZT precursor solution of clarification.2. film preparation.Process conditions are: chamber pressure 30 torrs, 620 ℃ of growth temperatures, 700 rev/mins of substrate rotating speeds (rmp), growth time 40 minutes, film thickness 180nm;
(9) preparation gate electrode metal layer (common process)
Sputter top electrode on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 180nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 35nm/ minute;
(11) the 5th photoetching form contact hole
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake 30 minutes, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region 22, drain region 23 and substrate contact region 29 in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 60nm/ minute; Etching separator dielectric film speed is: 2nm/ minute;
(12) preparation metal level (common process)
To carrying out normal temperature sputtered aluminum electrode (Al) on the substrate after step (11) processing, thickness is about: 1000nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional positive glue to peel off Al technology, step (10) is handled the back metal level carry out photoetching and etching, form source metal 27, drain metal 28 and substrate contact metal 30;
(14) Alloying Treatment
Substrate after step (13) handled is at 430 ℃ of nitrogen (N
2) in carried out annealing in process 30 minutes.
Embodiment 4 present embodiments are a kind of ferroelectric dynamic random access memory based on the PZT storage medium and preparation method thereof
The separator medium of present embodiment is: Al
2O
3Ferroelectric thin film layer is: Pb (Zr
0.3Ti
0.7) O
3(PZT), the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=0.3: 0.7.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on silicon substrate, growing, oxidated layer thickness is 700nm;
(3) photoetching for the first time forms source-drain area
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF
+) inject, form substrate contact region 29; Inject energy and dosage and be respectively 75KeV, 4.3 * 10
15(cm
-3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 650nm, in nitrogen substrate is carried out densification 30 minutes afterwards, and temperature is 880 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron (
11B
+) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 45KeV, 6.0 * 10
12(cm
-3)
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare Al
2O
3 Separator dielectric film 24; Preparation Al
2O
3The reaction source of film is TMA (Trimethylaluminium C
3H
9Al), reaction temperature is: 150 ℃, film thickness is: 10nm;
(8) growth ferroelectric thin film
Utilize liquid state to transport-metal oxide chemical vapor deposition (LD-MOCVD) method, in reaction chamber, preparation pzt thin film 25 on the separator dielectric film that step (7) forms; Technology of preparing comprises: the 1. preparation of precursor.With solute Zr[C
11H
19O
2]
4(0.726g), Ti[OCH (CH
3)] [C
11H
19O
2] (0.433g), Pb[C
11H
19O
2]
2(0.855g) being dissolved in oxolane (THF) (20ml) and in four-glycol dimethyl ether (gyl) mixed solvent (2ml), is fully to stir 30 minutes under 35 ℃ of conditions in temperature, to form the uniform PZT precursor solution of clarification.2. film preparation.Process conditions are: chamber pressure 30 torrs, 650 ℃ of growth temperatures, 720 rev/mins of substrate rotating speeds (rmp), growth time 30 minutes, film thickness 150nm;
(9) preparation gate electrode metal layer (common process)
Sputter top electrode on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 180nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 35nm/ minute;
(11) the 5th photoetching form contact hole
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake 30 minutes, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region 22, drain region 23 and substrate contact region 29 in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 60nm/ minute; Etching separator dielectric film speed is: 2nm/ minute;
(12) preparation metal level (common process)
To carrying out normal temperature sputtered aluminum electrode (Al) on the substrate after step (11) processing, thickness is about: 1000nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional positive glue to peel off Al technology, step (10) is handled the back metal level carry out photoetching and etching, form source metal 27, drain metal 28 and substrate contact metal 30;
(14) Alloying Treatment
Substrate after step (13) handled is at 430 ℃ of nitrogen (N
2) in carried out annealing in process 30 minutes.
Embodiment 5 present embodiments are a kind of ferroelectric dynamic random access memory based on the PZT storage medium and preparation method thereof
The separator medium of present embodiment is: Hf-Al-O; Ferroelectric thin film layer is: Pb (Zr
0.8Ti
0.2) O
3(PZT), the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=0.8: 0.2.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on silicon substrate, growing, oxidated layer thickness is 650nm;
(3) photoetching for the first time forms source-drain area
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF
+) inject, form substrate contact region 29; Inject energy and dosage and be respectively 70KeV, 4.0 * 10
15(cm
-3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 600nm, in nitrogen substrate is carried out densification 30 minutes afterwards, and temperature is 850 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron (
11B
+) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 40KeV, 2.0 * 10
12(cm
-3)
(7) growth separator dielectric film
Utilize preparation Hf-Al-O separator dielectric film 24 on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled; The reaction source of preparation Hf-Al-O film is HfCl
4/ H
2O and TMA (Trimethylaluminium C
3H
9Al), reaction temperature is: 150 ℃, film thickness is: 5nm;
(8) growth ferroelectric thin film
Utilize liquid state to transport-metal oxide chemical vapor deposition (LD-MOCVD) method, in reaction chamber, on the separator dielectric film that step (7) forms, prepare pzt thin film 25; Technology of preparing comprises: the 1. preparation of precursor.With solute Zr[C
11H
19O
2]
4(1.063g), Ti[OCH (CH
3)] [C
11H
19O
2] (0.371g), Pb[C
11H
19O
2]
2(0.495g) being dissolved in oxolane (THF) (20ml) and in four-glycol dimethyl ether (gyl) mixed solvent (2ml), is fully to stir 30 minutes under 25 ℃ of conditions in temperature, to form the uniform PZT precursor solution of clarification.2. film preparation.Process conditions are: chamber pressure 35 torrs, 650 ℃ of growth temperatures, 720 rev/mins of substrate rotating speeds (rmp), growth time 30 minutes, film thickness 150nm;
(9) preparation gate electrode metal layer (common process)
Sputter top electrode on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 150nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 60nm/ minute;
(11) the 5th photoetching form contact hole
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake 30 minutes, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region 22, drain region 23 and substrate contact region 29 in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 100nm/ minute; Etching separator dielectric film speed is: 1.5nm/ minute;
(12) preparation metal level (common process)
To carrying out normal temperature sputtered aluminum electrode (Al) on the substrate after step (11) processing, thickness is about: 800nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional wet etching Al, step (10) is handled the back metal level carry out photoetching and etching, form source metal 27, drain metal 28 and substrate contact metal 30;
(14) Alloying Treatment
Substrate after step (13) handled is at 420 ℃ of nitrogen (N
2) in carried out annealing in process 20 minutes.
Embodiment 6 present embodiments are a kind of ferroelectric dynamic random access memory based on the PZT storage medium and preparation method thereof
The separator medium of present embodiment is: HfO
2Ferroelectric thin film layer is: Pb (Zr
0.4Ti
0.6) O
3(PZT), the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=0.4: 0.6.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is n type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on silicon substrate, growing, oxidated layer thickness is 700nm;
(3) photoetching for the first time forms source-drain area
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching, stay glue phosphorus (
31P
+) inject, form substrate contact region 29; Inject energy and dosage and be respectively 75KeV, 4.3 * 10
15(cm
-3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 650nm, in nitrogen substrate is carried out densification 30 minutes afterwards, and temperature is 880 ℃;
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue phosphorus (
31P
+) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 45KeV, 6.0 * 10
12(cm
-3);
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare HfO
2 Separator dielectric film 24; Preparation HfO
2The reaction source of film is HfCl
4/ H
2O, reaction temperature is: 230 ℃, film thickness is: 5nm;
(8) growth ferroelectric thin film
Utilize liquid state to transport-metal oxide chemical vapor deposition (LD-MOCVD) method, in reaction chamber, preparation pzt thin film 25 on the separator dielectric film that step (7) forms; Technology of preparing comprises: the 1. preparation of precursor.With solute Zr[C
11H
19O
2]
4(1.6g), Ti[OCH (CH
3)] [C
11H
19O
2] (0.7g), Pb[C
11H
19O
2]
2(0.9g) being dissolved in oxolane (THF) (25ml) and in four-glycol dimethyl ether (gyl) mixed solvent (3ml), is fully to stir 30 minutes under 35 ℃ of conditions in temperature, to form the uniform PZT precursor solution of clarification.2. film preparation.Process conditions are: chamber pressure 30 torrs, 620 ℃ of growth temperatures, 700 rev/mins of substrate rotating speeds (rmp), growth time 40 minutes, film thickness 180nm;
(9) preparation gate electrode metal layer (common process)
Sputter top electrode on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 180nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 35nm/ minute;
(11) the 5th photoetching form contact hole
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake 30 minutes, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region 22, drain region 23 and substrate contact region 29 in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 60nm/ minute; Etching separator dielectric film speed is: 1.5nm/ minute;
(12) preparation metal level (common process)
To carrying out normal temperature sputtered aluminum electrode (Al) on the substrate after step (11) processing, thickness is about: 1000nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional positive glue to peel off Al technology, step (10) is handled the back metal level carry out photoetching and etching, form source metal 27, drain metal 28 and substrate contact metal 30;
(14) Alloying Treatment
Substrate after step (13) handled is at 430 ℃ of nitrogen (N
2) in carried out annealing in process 30 minutes.
Claims (3)
1. the ferroelectric dynamic random access memory based on the lead zirconate titanate storage medium comprises: silicon substrate, source region, drain region, the separator deielectric-coating, ferroelectric thin film layer, gate electrode, source electrode, drain electrode, and the substrate contact region and the substrate contact electrode that are used to test this memory; Wherein, in silicon substrate, form source region, drain region and substrate contact region, above silicon substrate, form the separator deielectric-coating, above the separator deielectric-coating, form ferroelectric thin film layer, above ferroelectric thin film layer, form gate electrode; Source electrode and drain electrode are in the both sides of gate electrode; It is characterized in that described separator medium is: HfO
2, Hf-Al-O, TiO
2, Al
2O
3In any one; Described ferroelectric thin film layer is: Pb (Zr
1-xTi
x) O
3, the molar ratio of each component is: Pb: (Zr+Ti): O=1: 1: 3, and Zr: Ti=(1-x): x, wherein, the x span is 0.1＜x＜1.0.
2. ferroelectric dynamic random access memory according to claim 1 is characterized in that described ferroelectric thin film thickness is 100nm～300nm.
3. one kind prepares the method for ferroelectric dynamic random access memory according to claim 1, may further comprise the steps:
(1) silicon substrate is cleaned;
(2) oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 650～900nm;
(3) photoetching for the first time forms source-drain area:
Silicon substrate carries out photoetching after adopting positive adhesive process to oxidation, post bake, wet etching, stay glue phosphorus (
31P
+) inject or the boron injection, form source-drain area, inject energy and dosage and be respectively 60～80KeV, 4.0 * 10
15～5.0 * 10
15Cm
-3
(4) photoetching for the second time forms substrate contact region:
Adopt the silicon substrate after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake, wet etching stays glue boron (BF
+) inject or the phosphorus injection, form substrate contact region; Inject energy and dosage and be respectively 70～80KeV, 4.0 * 10
15～5.0 * 10
15Cm
-3
(5) growth oxide layer:
Substrate after utilizing low-pressure chemical vapor deposition to Twi-lithography carries out the oxidation second time, and oxidated layer thickness is 600～700nm, in nitrogen substrate is carried out densification afterwards, and temperature is 850-900 ℃;
(6) photoetching for the third time forms the grid region:
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake, wet etching, stay glue boron (
11B
+) transfer ditch to inject or the injection of phosphorus accent ditch, form the grid region; Transfer ditch injection energy and dosage to be respectively 40～50KeV, 2.0 * 10
12～8.0 * 10
13Cm
-3
(7) growth separator dielectric film:
Utilize on the substrate of technique for atomic layer deposition after step (6) is handled and prepare HfO
2, Hf-Al-O, TiO
2, Al
2O
3In any one separator dielectric film; Reaction temperature is: 100～230 ℃, film thickness is: 5～20nm;
(8) growth ferroelectric thin film:
Utilize liquid state to transport-the metal oxide chemical vapor deposition method, in reaction chamber, on the separator dielectric film that step (7) forms, prepare pzt thin film; Process conditions are: chamber pressure 25～35 torrs, 560～650 ℃ of growth temperatures, 650～720 rev/mins of substrate rotating speeds (rmp), growth time 20～60 minutes, film thickness 100～300nm;
(9) preparation electrode metal layer:
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, metal material is: platinum Pt, perhaps golden Au, thickness is about: 150～200nm;
(10) the 4th photoetching form gate electrode:
Utilize the ion beam etching technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode, etch rate is: 20～60nm/ minute, or adopt positive glue to peel off method formation gate electrode;
(11) the 5th photoetching form contact hole:
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, forms the hole that contacts with source region, drain region and substrate contact region in the substrate respectively; Wherein, etching ferroelectric thin film speed is: 20～100nm/ minute; Etching separator dielectric film speed is: 1.5～3nm/ minute;
(12) preparation metal level:
To carrying out normal temperature sputtered aluminum electrode on the substrate after step (11) processing, thickness is about: 800～1200nm;
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt wet etching Al or dry etching Al, perhaps positive glue is peeled off Al, step (10) is handled the back metal level carry out photoetching and etching, form the source metal, drain metal layer and the substrate contact electrode metal level that contact with source region, drain region, substrate contact region respectively;
(14) Alloying Treatment:
Substrate after step (13) processing was carried out annealing in process 20～40 minutes in 420 ℃～450 ℃ nitrogen.
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