JPH09312381A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH09312381A JPH09312381A JP8128571A JP12857196A JPH09312381A JP H09312381 A JPH09312381 A JP H09312381A JP 8128571 A JP8128571 A JP 8128571A JP 12857196 A JP12857196 A JP 12857196A JP H09312381 A JPH09312381 A JP H09312381A
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor device
- electrode
- dielectric film
- heat treatment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 34
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 239000003990 capacitor Substances 0.000 claims abstract description 45
- 238000010438 heat treatment Methods 0.000 claims abstract description 45
- 239000012298 atmosphere Substances 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000004544 sputter deposition Methods 0.000 claims abstract description 10
- 230000004907 flux Effects 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 35
- 229910052451 lead zirconate titanate Inorganic materials 0.000 claims description 18
- 230000001590 oxidative effect Effects 0.000 claims description 17
- 239000010936 titanium Substances 0.000 claims description 15
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 13
- 229910052719 titanium Inorganic materials 0.000 claims description 11
- 239000002994 raw material Substances 0.000 claims description 10
- 229910052726 zirconium Inorganic materials 0.000 claims description 10
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 9
- 230000005621 ferroelectricity Effects 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 6
- 239000000470 constituent Substances 0.000 claims description 6
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims description 5
- NKZSPGSOXYXWQA-UHFFFAOYSA-N dioxido(oxo)titanium;lead(2+) Chemical compound [Pb+2].[O-][Ti]([O-])=O NKZSPGSOXYXWQA-UHFFFAOYSA-N 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- 239000011261 inert gas Substances 0.000 claims description 3
- 229910052746 lanthanum Inorganic materials 0.000 claims description 3
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims description 3
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 229940046892 lead acetate Drugs 0.000 claims description 2
- VHWYCFISAQVCCP-UHFFFAOYSA-N methoxymethanol Chemical compound COCO VHWYCFISAQVCCP-UHFFFAOYSA-N 0.000 claims description 2
- 229910052990 silicon hydride Inorganic materials 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract description 16
- 238000003980 solgel method Methods 0.000 abstract description 5
- 239000002904 solvent Substances 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 115
- 230000010287 polarization Effects 0.000 description 24
- 239000010410 layer Substances 0.000 description 20
- 239000011229 interlayer Substances 0.000 description 10
- 230000000694 effects Effects 0.000 description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 8
- 239000001301 oxygen Substances 0.000 description 8
- 229910052760 oxygen Inorganic materials 0.000 description 8
- 230000008569 process Effects 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 239000001257 hydrogen Substances 0.000 description 6
- 229910052739 hydrogen Inorganic materials 0.000 description 6
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 6
- 230000009467 reduction Effects 0.000 description 6
- 125000004429 atom Chemical group 0.000 description 5
- 230000008859 change Effects 0.000 description 5
- 238000005259 measurement Methods 0.000 description 5
- 230000001603 reducing effect Effects 0.000 description 5
- 230000002829 reductive effect Effects 0.000 description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 230000036961 partial effect Effects 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
- 239000006227 byproduct Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- -1 lead titanate Chemical class 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 3
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 229910010413 TiO 2 Inorganic materials 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 229910052454 barium strontium titanate Inorganic materials 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 230000008034 disappearance Effects 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 2
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体装置および
その製造方法に関し、詳しくは、DRAMなどの半導体
記憶装置に特に好適な、小型大容量のコンデンサおよび
このようなコンデンサを容易に作成することができる半
導体装置およびその方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a small-sized and large-capacity capacitor particularly suitable for a semiconductor memory device such as a DRAM and a capacitor such as this can be easily manufactured. The invention relates to a semiconductor device and a method thereof.
【0002】[0002]
【従来の技術】周知のように、DRAM(再書き込みが
必要な随時書き込み読み出し可能な半導体記憶装置)
は、通常、基板上に形成されたコンデンサの蓄積電荷に
よって、情報の記憶を行なっている。このコンデンサ
は、DRAMを小型化するためには面積を縮小する必要
があるが、一方では、情報信号強度を保持して誤動作を
防止するために、静電容量をほぼ一定値以上に保つこと
が要求される。このため、コンデンサの単位面積当たり
容量は、DRAMの小型化に反比例して増大させる必要
があり、そのため、従来から電極構造の3次元化および
誘電体膜の高誘電率化が行なわれてきた。2. Description of the Related Art As is well known, a DRAM (semiconductor memory device capable of writing / reading at any time which requires rewriting)
Usually stores information by the accumulated charge of a capacitor formed on the substrate. This capacitor needs to reduce its area in order to miniaturize the DRAM, but on the other hand, in order to maintain the information signal strength and prevent malfunction, it is necessary to keep the electrostatic capacitance above a certain value. Required. For this reason, it is necessary to increase the capacitance per unit area of the capacitor in inverse proportion to the miniaturization of the DRAM. Therefore, conventionally, the electrode structure has been made three-dimensional and the dielectric film has a high dielectric constant.
【0003】このうち、誘電体膜の高誘電率化に関して
は、高誘電率材料として5酸化タンタル、チタン酸バリ
ウムストロンチウムおよびチタン酸ストロンチウムなど
が主に検討されている。また、チタン酸鉛、ジルコニウ
ム酸チタン酸鉛(PZT)、ジルコニウム酸チタン酸ラ
ンタン鉛(PLZT)など、鉛を含むペロブスカイト型
化合物も、高誘電率材料として知られており、これら鉛
を含むペロブスカイト型化合物を用いたコンデンサも、
コンデンサの小型化のために開発が行なわれている。Among them, tantalum pentoxide, barium strontium titanate, strontium titanate, and the like have been mainly studied as materials for increasing the dielectric constant of the dielectric film. Further, lead-containing perovskite type compounds such as lead titanate, lead zirconate titanate (PZT), lead lanthanum zirconate titanate (PLZT), etc. are also known as high dielectric constant materials. Capacitors using compounds also
Development is underway to reduce the size of capacitors.
【0004】これら鉛を含むペロブスカイト型酸化物
は、上記5酸化タンタル、チタン酸ストロンチウムなど
よりも比誘電率が大きいものが多く、より小型のDRA
Mの作製に適していると考えられる。Many of these lead-containing perovskite type oxides have a larger relative dielectric constant than tantalum pentoxide, strontium titanate, etc.
It is considered to be suitable for producing M.
【0005】しかし、鉛を含むペロブスカイト型化合物
は、DRAM動作の温度範囲では強誘電相にあるものが
多く、このため通常の動作条件では強誘電性を示す。す
なわち、誘電体材料の分極−電界特性が履歴特性を示
す。この履歴特性は、強誘電性の分極(残留分極)の向
きが反転することに起因している。残留分極は、不揮発
性メモリの情報保持原理として使用されてはいるが、D
RAMの動作にとっては、(1)く分極反転の繰り返し
による分極−電界特性の変動に起因する情報電荷量の変
動および(2)秒単位の時定数を持つ分極による、有効
情報電荷量のリフト(もしくはリーク)という好ましな
い作用をもたらすことが知られており、好ましくない。However, many perovskite type compounds containing lead are in a ferroelectric phase in the temperature range of DRAM operation, and therefore exhibit ferroelectricity under normal operating conditions. That is, the polarization-electric field characteristics of the dielectric material show hysteresis characteristics. This hysteresis characteristic is due to the reversal of the direction of the ferroelectric polarization (residual polarization). Although remanent polarization is used as a data retention principle of non-volatile memory,
For the operation of the RAM, (1) a change in the amount of information charge caused by a change in polarization-electric field characteristics due to repeated polarization reversal and (2) a lift of the effective information charge amount due to polarization having a time constant in seconds ( Or, it is known to bring about an unfavorable action of (leak), which is not preferable.
【0006】これらの障害を回避するための技術は、動
作方式と材料選の両面から検討されている。動作方式に
ついては、例えば、アイ・イー・イー・イー・トランザ
クションズ・オン・エレクトロン・デバイセズ、199
2年39巻9号、2044頁〜2049頁(IEEE Trans
actions on Electron Devices、 Vol. 39、 No. 9、pp.
2044-2049(1992))には、代表的な強誘電体であるPZ
Tを用いて、PZTに印加される電界の向きを単一方向
に限って分極反転を抑止し、上記分極反転にともなう変
動を回避することが提案されている。Techniques for avoiding these obstacles have been studied from both aspects of operation method and material selection. The operation method is, for example, IEE Transactions on Electron Devices, 199.
Vol. 39, No. 2, pp. 2044 to 2049 (IEEE Trans
actions on Electron Devices, Vol. 39, No. 9, pp.
2044-2049 (1992)) is a typical ferroelectric substance such as PZ.
It has been proposed to use T to suppress the polarization reversal by limiting the direction of the electric field applied to the PZT to a single direction, and to avoid the fluctuation associated with the polarization reversal.
【0007】また、材料選択の面では、例えば、199
1年固体素子材料国際会議予稿集、204頁から206
頁(Extended Abstracts of the 1991 International C
onference onSolid State Devices and Materials、 p
p.204-206(1991))には、PZTにLaを加えて特性改
善を行なうことが提案されており、リーク電流低減効果
が得らた旨報告されている。In terms of material selection, for example, 199
Proceedings of the 1st International Conference on Solid State Materials, pp. 204-206
Page (Extended Abstracts of the 1991 International C
onference onSolid State Devices and Materials, p
p.204-206 (1991)), it is proposed to add La to PZT to improve the characteristics, and it is reported that the leakage current reducing effect was obtained.
【0008】[0008]
【発明が解決しようとする課題】しかし、上記従来の方
法をDRAMの製造に適用しようとすると、いくつかの
問題が発生する。すなわち、PZTに印加される電圧の
方向を単一方向に限ると、両方向に電圧を加えた場合と
比較して、同一の電荷量を保存するために必要な電界強
度が2倍になる。そのため、コンデンサの絶縁耐圧の点
で好ましくないばかりでなく、長期信頼性の面からも望
ましくないことは明らかである。さらに本発明者の検討
によれば、印加される電圧の方向が単一方向に限られる
上記方法では、残留分極値の変動による不安定性を、一
部しか回避できないことがわかった。これは、分極反転
の起きない条件でコンデンサを駆動しても、残留分極の
大きさが時間的に変化するためであり、換言すれば、残
留分極の緩和現象が避けられないためである。このた
め、この方法では、残留分極値の変動に起因する不安定
性を回避するのは困難である。However, when the above-mentioned conventional method is applied to the manufacture of DRAM, some problems occur. That is, when the direction of the voltage applied to the PZT is limited to a single direction, the electric field strength required to store the same amount of charge is doubled as compared with the case where the voltage is applied in both directions. Therefore, it is obvious that not only is it not desirable in terms of withstand voltage of the capacitor, but it is also undesirable in terms of long-term reliability. Further, according to the study by the present inventor, it has been found that the above method in which the direction of the applied voltage is limited to a single direction can only partially avoid the instability due to the fluctuation of the remanent polarization value. This is because the magnitude of the residual polarization changes with time even if the capacitor is driven under the condition that the polarization inversion does not occur, in other words, the relaxation phenomenon of the residual polarization cannot be avoided. Therefore, with this method, it is difficult to avoid instability due to fluctuations in the residual polarization value.
【0009】また、誘電体材料にLaなど添加元素を加
える上記方法は、量産性の面から課題があることが判明
した。例えばPZTにLaを添加する場合、Laの添加
量によって誘電特性など主要な特性が大きく変動するた
め、Laの添加量を厳密に制御する必要があり、工程管
理が難しい。また、使える成膜方法が制約され、ゾルゲ
ル法のような組成再現性に優れた方法しか使用できな
い。そのため、CVD法のような、段差被覆性がすぐ
れ、膜の高純度化にも適した方法を使用できず、大規模
DRAMへの適用の上で重大な制約となる。Further, the above method of adding an additive element such as La to the dielectric material has been found to be problematic in terms of mass productivity. For example, when La is added to PZT, the main characteristics such as dielectric characteristics greatly change depending on the amount of La added, and therefore the amount of La added must be strictly controlled, and process control is difficult. In addition, the usable film forming method is limited, and only the method having excellent composition reproducibility such as the sol-gel method can be used. Therefore, a method such as the CVD method, which has excellent step coverage and is suitable for high-purity films cannot be used, which is a serious limitation in application to large-scale DRAM.
【0010】二酸化シリコンやチタン酸ストロンチウム
のように、DRAM駆動温度では原理的に残留分極を持
たない材料では、これらの問題は存在しないが、これら
材料の比誘電率は、チタン酸バリウムストロンチウムで
も数百程度と低く(薄膜の場合)、これらの膜を用いた
のでは、DRAM小型化という目的を達成できない。Materials such as silicon dioxide and strontium titanate which do not theoretically have remanent polarization at the driving temperature of DRAM do not have these problems, but the relative permittivity of these materials is several even for barium strontium titanate. As low as about 100 (in the case of a thin film), using these films cannot achieve the purpose of DRAM miniaturization.
【0011】本発明の目的は、上記従来の問題を解決
し、動作が安定で高い信頼性を有し、DRAMの小型化
に有効なコンデンサ、およびこのようなコンデンサを、
容易かつ高い生産性で製造することができるコンデンサ
の製造方法を提供することである。An object of the present invention is to solve the above-mentioned problems of the prior art, to provide a stable operation, high reliability, and a capacitor effective for downsizing a DRAM, and a capacitor such as this,
An object of the present invention is to provide a method of manufacturing a capacitor that can be manufactured easily and with high productivity.
【0012】[0012]
【課題を解決するための手段】上記目的を達成するため
の本発明の半導体装置は、互いに対向して配置された導
電性膜からなる第1の電極および第2の電極と、当該第
1の電極と第2の電極の間に形成された誘電体膜を有
し、当該誘電体膜は常温において電束密度−電界強度特
性が履歴特性を示す誘電体膜を非酸化性雰囲気中で熱処
理して形成された上記履歴特性を持たない改質膜を含む
膜であるコンデンサを具備することを特徴とする。A semiconductor device of the present invention for achieving the above object comprises a first electrode and a second electrode made of conductive films, which are arranged to face each other, and the first electrode. There is a dielectric film formed between the electrode and the second electrode, and the dielectric film is heat-treated in a non-oxidizing atmosphere in a dielectric film that exhibits hysteresis characteristics in electric flux density-electric field strength characteristics at room temperature. It is characterized in that it comprises a capacitor which is a film including a modified film formed without the above hysteresis characteristic.
【0013】すなわち、本発明においては、コンデンサ
の有する誘電体膜が、常温において電束密度−電界強度
特性が履歴特性を示す誘電体膜を、非酸化性雰囲気中で
熱処理して形成された上記履歴特性を持たない改質膜を
含んでいる。このような極めて特異な構造を有す本発明
におけるる誘電体膜は、例えばPZT膜の場合を例示す
れば、分極−電圧特性が従来のPZTの分極−電圧特性
とは、図1に示したように、著しく異なっていることが
確認された。That is, in the present invention, the dielectric film of the capacitor is formed by heat-treating a dielectric film having a history of electric flux density-electric field strength characteristics at room temperature in a non-oxidizing atmosphere. It contains a modified film that does not have hysteresis characteristics. The dielectric film of the present invention having such an extremely peculiar structure has a polarization-voltage characteristic as shown in FIG. 1, for example, in the case of a PZT film. Thus, it was confirmed that they are significantly different.
【0014】すなわち、図1から明らかなように、強誘
電体性を有する従来の誘電体膜の分極−電圧特性が履歴
特性を有しているにもかかわらず、この誘電体膜を非酸
化性雰囲気中で熱処理して改質された、本発明のコンデ
ンサの誘電体膜(改質膜)の分極−電圧特性は線形に近
く、履歴特性が消滅している。しかも、比誘電率は改質
処理を行う前の強誘電体膜の値を保持しており、DRA
M用の誘電体膜として極めて有効な誘電体膜であること
が確認された。That is, as is apparent from FIG. 1, even though the conventional dielectric film having ferroelectricity has a hysteresis characteristic in polarization-voltage characteristics, this dielectric film is non-oxidizing. The polarization-voltage characteristics of the dielectric film (modified film) of the capacitor of the present invention, which has been modified by heat treatment in an atmosphere, are almost linear, and the hysteresis characteristics disappear. Moreover, the relative permittivity retains the value of the ferroelectric film before the modification treatment.
It was confirmed that the dielectric film was extremely effective as a dielectric film for M.
【0015】さらに、本発明における誘電体膜の、深さ
方向の分析を行ったところ、図2に示したように、履歴
特性を持つ誘電体層202と履歴特性を持たない誘電体
層203の積層構造が、下部電極201と上部電極20
4の間に形成されていることがわかった。上記履歴特性
を持つ誘電体層202は、上記履歴特性を持たない誘電
体層203を形成するために行われる熱処理の温度が高
いほど膜厚が薄くなった。特にこの熱処理温度が550
℃以上になると、上記履歴特性を持つ誘電体層202の
膜厚は10nm以下になり、実質的に上記履歴特性を持
たない誘電体層203のみによってコンデンサの誘電体
膜が構成されていると見做すことができる。Further, when the dielectric film according to the present invention is analyzed in the depth direction, as shown in FIG. 2, the dielectric layer 202 having hysteresis characteristics and the dielectric layer 203 having no hysteresis characteristics are shown. The laminated structure has a lower electrode 201 and an upper electrode 20.
It was found that it was formed during the period 4. The thickness of the dielectric layer 202 having the hysteresis characteristic becomes thinner as the temperature of the heat treatment performed to form the dielectric layer 203 having no hysteresis characteristic becomes higher. Especially this heat treatment temperature is 550
When the temperature is higher than or equal to ° C, the film thickness of the dielectric layer 202 having the hysteresis characteristic becomes 10 nm or less, and it is considered that the dielectric layer of the capacitor is constituted only by the dielectric layer 203 having substantially no hysteresis characteristic. It can be changed.
【0016】このような構造を有する本発明におけるP
ZT膜の電流−電圧特性と、従来のPZT膜の電流−電
圧特性を、電圧掃引速度を0.1V/秒として比較した
結果を図3に示した。図3から明らかなように、本発明
によれば、低電圧領域におけるリーク電流低減効果が特
に顕著である。しかし、この効果は本質的にはリーク電
流の低減効果ではなく、時定数が1秒以上であるよう
な、ゆっくりと反転する分極成分が消滅しているために
生じた効果であり、DRAMの信号量の安定化が実現さ
れた。The P in the present invention having such a structure
The current-voltage characteristics of the ZT film and the current-voltage characteristics of the conventional PZT film were compared at a voltage sweep rate of 0.1 V / sec. As is apparent from FIG. 3, according to the present invention, the effect of reducing the leak current in the low voltage region is particularly remarkable. However, this effect is not essentially the effect of reducing the leak current, but is the effect caused by the disappearance of the slowly inverting polarization component such that the time constant is 1 second or more. Quantity stabilization has been achieved.
【0017】PZT膜を用いた誘電体膜を形成した後
に、パッシベーション膜(保護膜)として二酸化シリコ
ン膜をCVD法により形成した場合の形状変化を図4に
示した。シリコン基板301上に形成された下部電極3
02上に、上記積層構造を有する誘電体膜303を形成
し、さらにその上に上記二酸化シリコン膜(図示せず)
を形成した後、上部電極304を形成したが、本発明に
おいては、図4(1)に示したように、上部電極304
の剥離は生ぜず、正常なパッシベーションを行なうこと
ができた。しかし、従来の場合は、図4(2)に示した
ように、上部電極304に部分的な剥離305が発生し
てしまい、高い信頼性を得ることは困難であった。FIG. 4 shows a change in shape when a silicon dioxide film is formed as a passivation film (protective film) by the CVD method after forming a dielectric film using a PZT film. Lower electrode 3 formed on silicon substrate 301
02, the dielectric film 303 having the above-mentioned laminated structure is formed, and the silicon dioxide film (not shown) is further formed thereon.
The upper electrode 304 was formed after the formation of the upper electrode. However, in the present invention, as shown in FIG.
No peeling occurred, and normal passivation could be performed. However, in the conventional case, as shown in FIG. 4B, partial peeling 305 occurs on the upper electrode 304, and it is difficult to obtain high reliability.
【0018】上記改質膜は上記第2の電極に接して形成
され、上記改質膜と上記第1の電極の間には、常温にお
いて電束密度−電界強度特性が履歴特性を示す誘電体膜
が上記第1の電極に接して形成される。第2の熱処理の
温度が高くなるにともなって、上記改質膜の厚さは厚く
なり、第1の電極上に形成された上記電束密度−電界強
度特性が履歴特性を示す誘電体膜の膜厚は薄くなる。The modified film is formed in contact with the second electrode, and between the modified film and the first electrode, a dielectric having a history of electric flux density-electric field strength characteristics at room temperature. A film is formed in contact with the first electrode. As the temperature of the second heat treatment becomes higher, the thickness of the modified film becomes thicker, and the electric flux density-electric field strength characteristic of the dielectric film formed on the first electrode shows a hysteresis characteristic. The film thickness becomes thin.
【0019】上記誘電体膜としては、例えばペロブスカ
イト型酸化物を用いるがき、チタンまたは鉛を主要構成
元素として含むことによって好ましい結果が得られる。As the dielectric film, for example, a perovskite type oxide is used, and preferable results can be obtained by containing titanium or lead as a main constituent element.
【0020】さらに、上記ペロブスカイト型酸化物とし
ては、チタン酸鉛、ジルコニウム酸チタン酸鉛若しくは
ジルコニウム酸チタン酸ランタン鉛を使用できる。Further, as the perovskite type oxide, lead titanate, lead zirconate titanate or lead lanthanum zirconate titanate can be used.
【0021】チタンおよび鉛とともにジルコニウムを主
要構成元素の一つとしてさらに含み、上記鉛、チタンお
よびジルコニウムの組成比が、それぞれ45原子%〜5
5原子%、10原子%〜30原子%おぴょび10原子%
〜30原子%とすれば、好ましい結果を得ることができ
る。Zirconium is further contained as one of the main constituent elements together with titanium and lead, and the composition ratio of the lead, titanium and zirconium is 45 atom% to 5 respectively.
5 atom%, 10 atom% to 30 atom% Opobi 10 atom%
A preferable result can be obtained when the content is -30 atomic%.
【0022】上記コンデンサは、多くの用途に供するこ
とができるが、DRAMの情報記録用コンデンサとして
特に好ましい。Although the above-mentioned capacitor can be used for many purposes, it is particularly preferable as an information recording capacitor for DRAM.
【0023】上記本発明の半導体装置は、半導体基板上
に所定の形状を有する第1の電極を形成する工程と、当
該第1の電極を覆う強誘電体組成を有する誘電体膜を形
成する工程と、酸化性雰囲気中における第1の熱処理を
行って上記誘電体膜を結晶化させる工程と、上記誘電体
膜を覆う第2の電極を形成する工程と、非酸化性雰囲気
中における第2の熱処理を行って、上記誘電体膜のうち
少なくとも上記第2の電極との界面近傍の部分を改質し
て強誘電性を失わせる工程を、少なくとも含む製造方法
によって形成される。In the semiconductor device of the present invention, the step of forming a first electrode having a predetermined shape on a semiconductor substrate and the step of forming a dielectric film having a ferroelectric composition to cover the first electrode. A step of crystallizing the dielectric film by performing a first heat treatment in an oxidizing atmosphere, a step of forming a second electrode covering the dielectric film, and a second step in a non-oxidizing atmosphere. It is formed by a manufacturing method including at least a step of performing heat treatment to modify at least a portion of the dielectric film near the interface with the second electrode to lose the ferroelectricity.
【0024】すなわち、周知の塗布法などによって非晶
質の強誘電体膜を第1の電極上に形成した後、酸化性雰
囲気中における第1の熱処理を行って結晶化させる。こ
の際の熱処理温度は、強誘電体材料に固有の結晶化温度
以上の温度とされる。また、第1の熱処理を行う代わり
に、第1の電極をあらかじめ所定の高温度に保ち、その
上に上記強誘電体材料を塗布してもよい。That is, after forming an amorphous ferroelectric film on the first electrode by a well-known coating method or the like, a first heat treatment is performed in an oxidizing atmosphere to crystallize. The heat treatment temperature at this time is a temperature equal to or higher than the crystallization temperature peculiar to the ferroelectric material. Further, instead of performing the first heat treatment, the first electrode may be previously maintained at a predetermined high temperature, and the ferroelectric material may be applied thereon.
【0025】第2の電極をその上に形成した後、非酸化
性雰囲気中における第2の熱処理を行うと、結晶化され
た上記強誘電体膜のうち、上記第2の電極との界面近傍
が改質されて強誘電体性を失い、上記履歴特性を示さな
くなる。その結果、コンデンサの特性も、残留分極がな
くなり、リーク電流が著しく低下する。この際、強誘電
体性膜の改質された部分の厚さは、上記のように、第2
の熱処理の温度が高いほど厚くなり、550℃以上にな
ると、改質されずに残った部分の厚さが10nm以下に
なって、コンデンサの誘電体膜が、実際上すべて改質膜
のみによって構成されたと見做すことができるようにな
る。After the second electrode is formed thereon, a second heat treatment is performed in a non-oxidizing atmosphere. In the crystallized ferroelectric film, near the interface with the second electrode. Is modified and loses its ferroelectricity, and the above hysteresis characteristics are not exhibited. As a result, the characteristics of the capacitor also have no residual polarization and the leak current is significantly reduced. At this time, the thickness of the modified portion of the ferroelectric film is set to the second value as described above.
The higher the temperature of heat treatment is, the thicker it becomes, and when it becomes 550 ° C or higher, the thickness of the part that is left unmodified becomes 10 nm or less, and the dielectric film of the capacitor is practically composed entirely of the modified film. You will be able to consider that it was done.
【0026】強誘電体組成を有する誘電体膜を、非酸化
性雰囲気中で熱処理すると、強誘電体としての性質が失
われる理由は明確ではないが、上記熱処理によって組成
中の酸素の一部が失われたためと推定される。このよう
に、強誘電体組成を有する誘電体膜を、非酸化性雰囲気
中で熱処理することによって改質され、上記電束密度−
電界強度特性の履歴性を失った誘電体膜を、本明細書で
は改質膜と称する。It is not clear why a dielectric film having a ferroelectric composition loses its properties as a ferroelectric when it is heat-treated in a non-oxidizing atmosphere, but a part of oxygen in the composition is lost by the heat treatment. It is presumed that it was lost. In this way, the dielectric film having the ferroelectric composition is modified by heat treatment in a non-oxidizing atmosphere, and the electric flux density-
The dielectric film that has lost the history of electric field strength characteristics is referred to as a modified film in this specification.
【0027】さらに、上記第2の熱処理を行って形成さ
れた本発明における改質膜は、電荷量、すなわち、スイ
ッチングしない場合の充放電電荷量が、熱処理を行わな
い従来の場合とほぼ同一あるいは従来の場合より大きく
いという大きな特長を有している。従来は、例えば常誘
電体としてTiO2を用いた積層構造を有する誘電体膜
をコンデンサに使用した場合は、本発明と同様に履歴特
性の消去はできるが、TiO2の誘電率が低いため、コ
ンデンサの容量は低下してしまう。Further, in the modified film of the present invention formed by performing the second heat treatment, the charge amount, that is, the charge / discharge charge amount when not switching is almost the same as that in the conventional case where the heat treatment is not performed, or It has a big feature that it is larger than the conventional case. Conventionally, for example, when a dielectric film having a laminated structure using TiO 2 as a paraelectric material is used for a capacitor, the hysteresis characteristic can be erased as in the present invention, but since the dielectric constant of TiO 2 is low, The capacity of the capacitor will decrease.
【0028】電流−電圧特性の熱処理温度による変化の
一例を図6に示した。測定方法としては、まず、測定範
囲の最大電圧を印加し、残留分極を測定する電圧掃引方
向に揃えた後、0Vから最大電圧まで電圧を掃引して、
電流値を計測した。これにより、原理的には分極反転に
ともなう変位電流を含まない、洩れ電流の測定を行なう
ことができる。FIG. 6 shows an example of changes in current-voltage characteristics depending on the heat treatment temperature. As the measurement method, first, the maximum voltage in the measurement range is applied, and the residual polarization is aligned in the voltage sweep direction for measurement, and then the voltage is swept from 0 V to the maximum voltage,
The current value was measured. As a result, in principle, it is possible to measure the leakage current that does not include the displacement current due to the polarization reversal.
【0029】図6から明らかなように、熱処理温度が上
昇すると、525℃まではリーク電流が減少した。リー
ク電流の減少のうち、比較的低電圧部分のリーク電流減
少分は、残留分極の緩和成分がなくなったことに対応し
ていると考えられる。すなわち、本発明によらない通常
の強誘電体特性を示す誘電体の場合は、電流計測に先立
って加えた電圧によって発生した残留分極が、電流計測
時に一度0Vまで電圧を下げることにより緩和し、失わ
れる。この後に電流計測を行なうために、失われた残留
分極が再度発生することに起因する変位電流が流れる。
強誘電性を抑制した本発明では、この残留分極緩和に基
づく電流成分を取り除けるために、低電圧部分のリーク
電流を抑制できた。As is apparent from FIG. 6, when the heat treatment temperature increased, the leak current decreased up to 525 ° C. It is considered that, of the decrease in the leak current, the decrease in the leak current in the relatively low voltage portion corresponds to the disappearance of the relaxation component of the remanent polarization. That is, in the case of a dielectric material having a normal ferroelectric property not according to the present invention, the remanent polarization generated by the voltage applied prior to the current measurement is mitigated by lowering the voltage once to 0 V during the current measurement, Lost. Since the current measurement is performed after this, a displacement current flows due to the lost remanent polarization being generated again.
In the present invention in which the ferroelectricity is suppressed, the leakage current in the low voltage portion can be suppressed because the current component based on the remnant polarization relaxation can be removed.
【0030】電流値が急激に立ち上がる部分でも、本発
明ではリーク電流が低減された。図3に示したように、
従来の強誘電性を有する誘電体の場合と比較して、立上
り部の電圧は正電圧側および負電圧側ともに1V強の改
善が見られた。ただし、熱処理温度が550℃以上にな
ると、若干のリーク電流増大が見られた。このため、熱
処理温度は550℃以下とすることが望ましいことがわ
かった。In the present invention, the leak current is reduced even in the portion where the current value sharply rises. As shown in FIG.
As compared with the case of the conventional dielectric having ferroelectricity, the voltage at the rising portion was improved by more than 1 V on both the positive voltage side and the negative voltage side. However, when the heat treatment temperature was 550 ° C. or higher, a slight increase in leak current was observed. Therefore, it has been found that the heat treatment temperature is preferably 550 ° C. or lower.
【0031】上記強誘電体組成を有する誘電体膜を形成
する工程は、塗布法によって行うことができ、この際に
用いられる塗布液としては、例えば、酢酸鉛、ジルコニ
ウム・インプロポキサイドおよびチタン・インプロポキサ
イドのメトキシメタノール溶液を用いることができる。The step of forming the dielectric film having the above ferroelectric composition can be carried out by a coating method, and the coating solution used at this time is, for example, lead acetate, zirconium impropoxide and titanium. A solution of impropoxide in methoxymethanol can be used.
【0032】塗布を行った後に行われる酸化性雰囲気中
における上記第1の熱処理は、600℃〜750℃の温
度で行わうことができる。この第1の熱処理によって、
非晶質膜は結晶化して多結晶膜になる。The first heat treatment in the oxidizing atmosphere after the coating can be performed at a temperature of 600 ° C to 750 ° C. By this first heat treatment,
The amorphous film is crystallized into a polycrystalline film.
【0033】上記第2の電極を形成した後に、非酸化性
雰囲気中で行われる上記第2の熱処理は、窒素または不
活性ガスなど非酸化性雰囲気中、上記誘電体膜が主要構
成元素の一つとして鉛を含んでいない場合は、450℃
〜750℃の温度で行うことができるが、上記誘電体膜
が主要構成元素の一つとして鉛を含んでいる場合は、上
記第2の熱処理温度を450℃〜550℃とすれば、好
ましい結果が得られる。In the second heat treatment performed in the non-oxidizing atmosphere after forming the second electrode, the dielectric film is one of the main constituent elements in the non-oxidizing atmosphere such as nitrogen or inert gas. 450 ° C when it does not contain lead
It can be performed at a temperature of ˜750 ° C., but when the dielectric film contains lead as one of the main constituent elements, the second heat treatment temperature is preferably 450 ° C. to 550 ° C. Is obtained.
【0034】上記第2の熱処理の後に、上記第2の電極
を覆う第2の誘電体膜が層間絶縁膜として形成される
が、プラズマCVDによってこの第2の誘電体膜を形成
すれば、好ましい結果が得られ、上記プラズマCVDは
シリコンの水素化物またはアルコレート化合物を原料ガ
スとして行なうことができる。従来の上記強誘電体組成
を有する誘電体膜を形成した後に、これらの原料ガスを
用いてプラズマCVDを行うと、誘電体膜が水素によっ
て還元されてしまって好ましくなかったが、本発明で
は、このような障害は起こらない。After the second heat treatment, a second dielectric film covering the second electrode is formed as an interlayer insulating film, but it is preferable to form this second dielectric film by plasma CVD. Results are obtained, and the plasma CVD can be performed using a silicon hydride or an alcoholate compound as a source gas. When plasma CVD is performed using these raw material gases after forming the conventional dielectric film having the above ferroelectric composition, the dielectric film is reduced by hydrogen, which is not preferable, but in the present invention, This kind of obstacle does not occur.
【0035】[0035]
【発明の実施の形態】本発明において、コンデンサの断
面構造は図2に示したプレーナ型のみではなく、トレン
チ型あるいはスタック型など、各種構造のコンデンサに
適用できる。また、このコンデンサを用いたDRAM
も、図7に9示した構造のみではなく、各種構造のDR
AMや他の半導体記憶装置に適用できる。BEST MODE FOR CARRYING OUT THE INVENTION In the present invention, the sectional structure of the capacitor can be applied not only to the planar type shown in FIG. 2 but also to various types of capacitors such as a trench type or a stack type. Also, a DRAM using this capacitor
Not only the structure shown in FIG. 7 but also DR of various structures
It can be applied to AM and other semiconductor memory devices.
【0036】本発明において、コンデンサの誘電体膜の
全膜厚は20nm〜200nmの範囲内から選択され
る。全膜厚が200nmより大きければ上記強誘電体膜
を使用した意味が失われる。コンデンサの容量を大きく
するためには、全膜厚が小さいほど好ましいことはいう
までもないが、現在の技術では、厚さが20nmより小
さい強誘電体膜を、支障なく製造するのは困難である。
上記強誘電体膜としては上記化合物の他に、いくつかの
化合物の膜を用いることができ、また、上記第1および
第2の電極としては、プラチナ膜を用いることができ
る。In the present invention, the total thickness of the dielectric film of the capacitor is selected within the range of 20 nm to 200 nm. If the total film thickness is larger than 200 nm, the meaning of using the ferroelectric film is lost. It is needless to say that the smaller the total film thickness is, the more preferable in order to increase the capacitance of the capacitor. However, it is difficult to manufacture a ferroelectric film having a thickness of less than 20 nm without any trouble in the present technology. is there.
In addition to the above compounds, films of some compounds can be used as the ferroelectric film, and platinum films can be used as the first and second electrodes.
【0037】上記のように、上記強誘電体組成を有する
誘電体膜は、ゾルゲル方のみではなく、スパッタ法やC
VD法によって形成することができる。As described above, the dielectric film having the above ferroelectric composition is not limited to the sol-gel type, but may be formed by the sputtering method or the C method.
It can be formed by the VD method.
【0038】すなわち、鉛、ジルコニウムおよびチタン
の酸化物を焼結して形成されたターゲットを用いた、酸
素囲気中におけるスパッタ法を用いることができる。こ
の場合、基板温度を600℃°〜750℃に保ってスパ
ッタを行なえば、膜形成後の上記第1の熱処理は不要で
あり、600℃より低い温度でスパッタを行なったとき
は、上記第1の熱処理を行なう必要がある。That is, it is possible to use a sputtering method in an oxygen atmosphere using a target formed by sintering an oxide of lead, zirconium and titanium. In this case, if the substrate temperature is kept at 600 ° C. to 750 ° C. and the sputtering is performed, the first heat treatment after the film formation is unnecessary, and if the sputtering is performed at a temperature lower than 600 ° C., the first heat treatment is performed. It is necessary to perform the heat treatment of.
【0039】また、上記強誘電体組成を有する誘電体膜
の形成に、CVD法を用いることもできる。例えば、P
b(DPM)2、Zr(DPM)4およびTi(i−OC
3H7)4を原料として用い、これらの原料を酸素雰囲気
中で分解するCVD法を用いることができる。この場
合、基板温度500℃以上で膜を堆積した場合は、上記
第1の熱処理は不要である。Further, the CVD method may be used for forming the dielectric film having the above ferroelectric composition. For example, P
b (DPM) 2 , Zr (DPM) 4 and Ti (i-OC)
A CVD method in which 3 H 7 ) 4 is used as a raw material and these raw materials are decomposed in an oxygen atmosphere can be used. In this case, if the film is deposited at a substrate temperature of 500 ° C. or higher, the first heat treatment is unnecessary.
【0040】[0040]
〈実施例1〉図5(1)に示したように、シリコン基板
302上に、周知のDCスパッタ法を用いて厚さ200
nmの白金膜を形成した後、ホトレジスト膜をマスクと
して用いた周知のスパッタエッチングによって不要部分
を除去して、所定の形状を有する下部電極302を形成
した。<Embodiment 1> As shown in FIG. 5A, a silicon substrate 302 having a thickness of 200 is formed by a known DC sputtering method.
After forming a platinum film having a thickness of nm, unnecessary portions were removed by well-known sputter etching using a photoresist film as a mask to form a lower electrode 302 having a predetermined shape.
【0041】次に、図5(2)に示したように、周知の
ゾルゲル法を用いて原料溶液を全面にスピンコートし
て、強誘電組成を有する非晶質膜401を形成した。こ
の際シリコン基板301の露出された部分には、SiO
2と上記非晶質膜401との反応によって反応層402
が形成された。Next, as shown in FIG. 5B, a raw material solution was spin-coated on the entire surface by using a well-known sol-gel method to form an amorphous film 401 having a ferroelectric composition. At this time, the exposed portion of the silicon substrate 301 is covered with SiO 2.
2 reacts with the amorphous film 401 to form a reaction layer 402.
Was formed.
【0042】乾燥処理を行って上記非晶質膜401に含
まれる溶剤を除去し、さらに急速加熱法によって650
℃、15秒の結晶化熱処理を行って上記非晶質膜401
を結晶化し、図5(3)に示したように、PZT膜40
3を形成した。得られたPZT膜403のZrとTiの
組成比は、Zr/Ti=50/50であった。Drying treatment is performed to remove the solvent contained in the amorphous film 401, and 650 is further applied by a rapid heating method.
The amorphous film 401 is subjected to crystallization heat treatment at 15 ° C. for 15 seconds.
Is crystallized, and as shown in FIG. 5C, the PZT film 40
3 was formed. The composition ratio of Zr and Ti of the obtained PZT film 403 was Zr / Ti = 50/50.
【0043】厚さ100nmの白金膜を周知のDCスパ
ッタ法を用いて形成した後、ホトレジスト膜をマスクと
して用いた周知のスパッタエッチングによって不要部分
を除去し、図5(4)に示したように、所定の形状を有
する上部電極501を形成した。さらに、窒素雰囲気
中、500℃の第2の熱処理を行った。この熱処理によ
って、上記PZT膜403は改質されて、改質PZT膜
601が形成された。After a platinum film having a thickness of 100 nm is formed by the well-known DC sputtering method, unnecessary portions are removed by well-known sputter etching using the photoresist film as a mask, and as shown in FIG. 5 (4). The upper electrode 501 having a predetermined shape was formed. Further, a second heat treatment at 500 ° C. was performed in a nitrogen atmosphere. By this heat treatment, the PZT film 403 was modified and the modified PZT film 601 was formed.
【0044】上記窒素雰囲気中での第2の熱処理の温度
と分極特性の関係を測定した結果を図6に示す。図6か
ら明らかなように、熱処理の温度が450℃以上になる
と、履歴特性に起因する電荷は減少し、熱処理温度は4
50℃以上とすることが有効であることが認められた。
しかし、550℃以上になるとリーク電流が若干増加す
るので、熱処理温度は450℃〜550℃の範囲内とす
ることが好ましい。FIG. 6 shows the result of measuring the relationship between the temperature and the polarization characteristic of the second heat treatment in the nitrogen atmosphere. As is clear from FIG. 6, when the heat treatment temperature is 450 ° C. or higher, the charges due to the hysteresis characteristic decrease and the heat treatment temperature is 4
It has been confirmed that it is effective to set the temperature to 50 ° C or higher.
However, since the leakage current slightly increases at 550 ° C. or higher, the heat treatment temperature is preferably in the range of 450 ° C. to 550 ° C.
【0045】なお、本実施例では、誘電体材料として、
Zr/Ti=50のPZTを用いたが、元素組成が変動
しても同様の効果を得ることができる。しかし、大容量
を得るためには、組成変動をある範囲内に抑えた方が好
ましく、鉛45原子%〜55原子%、ジルコニウム10
原子%〜30原子%、チタン10原子%〜30原子%の
範囲内とすれば、高い誘電率が得られ、従って本発明の
効果も高いことが確認された。また、PbTiO3やB
aTiO3を原形とする強誘電体材料であって、いくつ
かの元素を10原子%未満添加した材料や、Pb、Ba
の一部または全部をSrやCaに置き換えた強誘電体材
料についても、同様に本発明の効果が認められた。In this embodiment, as the dielectric material,
Although PZT with Zr / Ti = 50 is used, the same effect can be obtained even if the element composition changes. However, in order to obtain a large capacity, it is preferable to suppress the compositional variation within a certain range, such as 45 to 55 atomic% of lead and 10% of zirconium.
It was confirmed that a high dielectric constant was obtained within the ranges of atomic% to 30 atomic% and titanium 10 atomic% to 30 atomic%, and therefore the effect of the present invention was also high. In addition, PbTiO 3 and B
The ATiO 3 A ferroelectric material with original materials and that several elements were added in less than 10 atomic%, Pb, Ba
The effect of the present invention was similarly confirmed for a ferroelectric material in which a part or all of the above was replaced with Sr or Ca.
【0046】〈実施例2〉上記のように、本発明によれ
ば、リーク電流低減と、残留分極に起因する不安定性の
両者を解決できるが、配線工程におけるプロセス自由度
を向上させる効果もあり、本実施例ではこの効果を示
す。<Embodiment 2> As described above, according to the present invention, both the leakage current reduction and the instability caused by remanent polarization can be solved, but it also has the effect of improving the process flexibility in the wiring process. This example shows this effect.
【0047】上部電極形成後には、各メモリセルと周辺
回路とを接続する配線層が設けられるが、この配線層と
上部電極層との間には、絶縁を確保するために、通常S
iO2を主成分とする絶縁膜が形成される。この絶縁膜
の形成には、スループットや段差被覆性の面からCVD
法が適しており、シランまたはTEOSなどを原料とす
るCVD法が用いられる。この原料分解には300℃か
ら400℃の温度が必要である。また、シランなどシリ
コンの水素化合物を用いる場合には、副生成物として水
素が発生する。TEOSの場合でも、プラズマアシスト
法を用いて成膜すると、やはり水素関連の副生成物が生
じる。これらの水素または水素関連の副生成物は、30
0℃から400℃という比較的低温であっても、PZT
など高誘電率膜を還元して特性を劣化させる。また、還
元が顕著な場合には、高誘電率膜と両電極の界面におい
て剥離が生じ、プロセスの続行ができなくなる。After the formation of the upper electrode, a wiring layer for connecting each memory cell and the peripheral circuit is provided. Usually, in order to secure insulation between the wiring layer and the upper electrode layer, an S layer is usually formed.
An insulating film containing iO 2 as a main component is formed. This insulating film is formed by CVD from the viewpoint of throughput and step coverage.
A suitable method is a CVD method using silane or TEOS as a raw material. This decomposition of the raw material requires a temperature of 300 to 400 ° C. When a silicon hydrogen compound such as silane is used, hydrogen is generated as a by-product. Even in the case of TEOS, when a film is formed by using the plasma assist method, hydrogen-related by-products are also generated. These hydrogen or hydrogen-related byproducts are 30
Even at relatively low temperatures of 0 ° C to 400 ° C, PZT
The high dielectric constant film is reduced to deteriorate the characteristics. When the reduction is remarkable, peeling occurs at the interface between the high dielectric constant film and both electrodes, making it impossible to continue the process.
【0048】[0048]
【表1】 [Table 1]
【0049】表1は、各種層間絶縁膜形成法に対する、
本発明と従来技術のキャパシタ適用可能性を比較したも
のである。スパッタ法、ゾルゲル法の両者は、原理的に
還元性雰囲気に晒されないので、従来技術においても剥
離を生じない。しかし、スパッタ法では、プラズマにさ
らされたことによる電気特性劣化が生じ、段差被覆性も
劣るため、微細加工されたキャパシタには適用できな
い。ゾルゲル法は、キャパシタの耐熱性が600℃程度
であるため、高温での高密度化処理を行なうことはでき
ない。そのため、例えば、緩衝フッ化水素酸に対するエ
ッチング速度が通常の高密度のSiO2と比較して数倍
になり、層間絶縁膜形成後に行われる、電極と配線層の
電気的接続のためのスルーホールのドライエッチングに
よる形成工程が、その際に生じる下地電極のダメージの
除去ができないため実行できない。Table 1 shows various interlayer insulating film forming methods.
It is a comparison of the applicability of the present invention and the prior art capacitor. Both the sputter method and the sol-gel method are not exposed to a reducing atmosphere in principle, so that peeling does not occur even in the conventional technique. However, the sputtering method cannot be applied to a microfabricated capacitor because the electrical characteristics are deteriorated due to exposure to plasma and the step coverage is poor. Since the sol-gel method has a heat resistance of the capacitor of about 600 ° C., it cannot be densified at high temperature. Therefore, for example, the etching rate for buffered hydrofluoric acid is several times that of ordinary high-density SiO 2, and a through hole for electrical connection between the electrode and the wiring layer, which is performed after the interlayer insulating film is formed. The formation step by dry etching cannot be performed because damage to the underlying electrode that occurs at that time cannot be removed.
【0050】シラン系の原料を用いるCVD法では、常
圧熱CVDあるいはプラズマアシストCVDを用いて
も、いずれの場合も従来技術のキャパシタでは電極−高
誘電率膜界面での剥離が生じ、実際の製造工程に適用す
るのは不可能であった。高い酸素分圧下で作成した常圧
熱CVDや圧力を0.1Torr以下で行なうプラズマ
アシストCVDでは、剥離は生じなかったが、誘電率の
低下を中心とする誘電体自身の劣化が起こって適用でき
なかった。In the CVD method using a silane-based material, even if atmospheric pressure thermal CVD or plasma assisted CVD is used, peeling occurs at the electrode-high dielectric constant film interface in the capacitor of the prior art, and the actual capacitor is used. It was impossible to apply to the manufacturing process. In atmospheric pressure thermal CVD created under high oxygen partial pressure and in plasma assisted CVD performed at a pressure of 0.1 Torr or less, peeling did not occur, but deterioration of the dielectric itself centered on reduction of dielectric constant occurred and it was applicable. There wasn't.
【0051】一方、本発明によれば、表1から明らかな
ように、すべての絶縁膜形成法において剥離などの問題
は生じなかった。また、常圧熱CVD法、高温のプラズ
マアシストCVD法を除き、誘電率の劣化も見られなか
った。これは、層間絶縁膜形成上、極めて有利な特長で
あり、スループットの向上、工程数削減および製造設備
の共通化などにより、製造コストの大幅な低減が可能に
なった。On the other hand, according to the present invention, as is clear from Table 1, problems such as peeling did not occur in all insulating film forming methods. Further, no deterioration of the dielectric constant was observed except for the atmospheric pressure thermal CVD method and the high temperature plasma assisted CVD method. This is an extremely advantageous feature in forming an interlayer insulating film, and the improvement of throughput, reduction of the number of steps, and common use of manufacturing equipment have enabled a significant reduction in manufacturing cost.
【0052】なお、高酸素分圧化したCVD法のうち、
特に、酸素分圧を高めた条件で行なうと、本技術で行な
ったのと同様な安定化、高耐圧化を図れる場合がある。
例えば、酸素流量を原料シラン流量の10倍程度とし、
基板温度を350℃程度に低下させることで、誘電率低
下を押えた状態での層間絶縁膜形成が可能である。しか
し、この方法によるCVDでは、強誘電体膜のプロセス
条件によって対応する酸素流量、基板温度条件が変動す
るので、製造への適用が難しい。本発明を用いることに
よって、層間絶縁膜の形成プロセスを一定にすることが
でき、プロセスの標準化が可能になった。Among the high oxygen partial pressure CVD methods,
In particular, if the oxygen partial pressure is increased, it may be possible to achieve the same stabilization and high breakdown voltage as in the present technique.
For example, the oxygen flow rate is set to about 10 times the raw material silane flow rate,
By lowering the substrate temperature to about 350 ° C., it is possible to form an interlayer insulating film while suppressing a decrease in dielectric constant. However, in the CVD by this method, the corresponding oxygen flow rate and substrate temperature conditions vary depending on the process conditions of the ferroelectric film, so that it is difficult to apply it to manufacturing. By using the present invention, the process of forming the interlayer insulating film can be made constant and the process can be standardized.
【0053】〈実施例3〉本発明によるリーク電流の低
減は、DRAMに応用した場合におけるリフレッシュ間
隔改善のなど、基本的な性能向上に有効である。本発明
のコンデンサを用いたDRAMの例を図7に示した。<Embodiment 3> The reduction of the leak current according to the present invention is effective for the basic performance improvement such as the improvement of the refresh interval when applied to the DRAM. An example of a DRAM using the capacitor of the present invention is shown in FIG.
【0054】図7において、符号901はシリコン基
板、902は素子層間分離酸化膜、903は導電性プラ
グ層、904は層間分離膜、905は下部電極、906
は改質された強誘電体膜、907は上部電極、908は
層間分離膜と強誘電組成膜との相互反応によって生じた
反応層をそれぞれ表す。In FIG. 7, reference numeral 901 is a silicon substrate, 902 is an element interlayer isolation oxide film, 903 is a conductive plug layer, 904 is an interlayer isolation film, 905 is a lower electrode, and 906.
Is a modified ferroelectric film, 907 is an upper electrode, and 908 is a reaction layer formed by the mutual reaction between the interlayer isolation film and the ferroelectric composition film.
【0055】このコンデンサの容量は100fF/μm
2であり、0.1μA/cm2で見た絶縁耐圧は3Vであ
り、実用に供し得ることが確認された。The capacitance of this capacitor is 100 fF / μm
2 , and the withstand voltage at 0.1 μA / cm 2 was 3 V, which was confirmed to be suitable for practical use.
【0056】[0056]
【発明の効果】上記説明から明らかなように、本発明に
よれば、強誘電性に起因するコンデンサの動作不安定性
の除去およびリーク電流の低減が実現され、同時にパッ
シベーションにおける制限が小さくなるので、半導体記
憶装置の消費電力低下、信頼性の向上および低価格化に
極めて有用である。As is apparent from the above description, according to the present invention, it is possible to eliminate the operational instability of the capacitor due to the ferroelectricity and reduce the leakage current, and at the same time, the limitation on the passivation is reduced. It is extremely useful for reducing power consumption, improving reliability, and lowering the cost of semiconductor memory devices.
【図1】本発明と従来のコンデンサの分極−電圧特性を
比較した図、FIG. 1 is a diagram comparing polarization-voltage characteristics of the present invention and a conventional capacitor,
【図2】本発明のコンデンサの深さ方向の構造を説明す
るための断面図、FIG. 2 is a cross-sectional view for explaining the structure in the depth direction of the capacitor of the present invention,
【図3】本発明と従来のコンデンサの電流電圧特性を比
較した図、FIG. 3 is a diagram comparing current-voltage characteristics of the present invention and a conventional capacitor,
【図4】本発明と従来のコンデンサのパッシベーション
後の電極形状を比較した図、FIG. 4 is a diagram comparing the electrode shapes of the present invention and a conventional capacitor after passivation,
【図5】本発明の第1の実施例を説明するための工程
図、FIG. 5 is a process drawing for explaining the first embodiment of the present invention,
【図6】本発明による分極値変化の処理温度依存性を示
す図、FIG. 6 is a graph showing processing temperature dependence of polarization value change according to the present invention;
【図7】本発明の半導体記憶装置の一例を示す断面図。FIG. 7 is a sectional view showing an example of a semiconductor memory device of the present invention.
201…下部電極、202…履歴特性を持つ誘電体層、
203…履歴特性を持たない誘電体層、204…上部電
極、301…シリコン基板、302…下部電極、303
…誘電体膜、304…上部電極、305…剥離、401
…アモルファス膜、402…反応層、403…結晶質
膜、501…上部電極、601…改質されたPZT膜、
901…シリコン基板、902…素子分離酸化膜、90
3…導電性プラグ層、904…層間分離膜、905…下
部電極、906…改質された強誘電体膜、907…上部
電極、908…相互反応層。201 ... Lower electrode, 202 ... Dielectric layer having hysteresis characteristics,
203 ... Dielectric layer having no hysteresis characteristic, 204 ... Upper electrode, 301 ... Silicon substrate, 302 ... Lower electrode, 303
... dielectric film, 304 ... upper electrode, 305 ... peeling, 401
... amorphous film, 402 ... reactive layer, 403 ... crystalline film, 501 ... upper electrode, 601 ... reformed PZT film,
901 ... Silicon substrate, 902 ... Element isolation oxide film, 90
3 ... Conductive plug layer, 904 ... Interlayer separation film, 905 ... Lower electrode, 906 ... Modified ferroelectric film, 907 ... Upper electrode, 908 ... Mutual reaction layer.
Claims (21)
る第1の電極および第2の電極と、当該第1の電極と第
2の電極の間に形成された誘電体膜を有し、当該誘電体
膜は常温において電束密度−電界強度特性が履歴特性を
示す誘電体膜を非酸化性雰囲気中で熱処理して形成され
た上記履歴特性を持たない改質膜を含む膜であるコンデ
ンサを具備することを特徴とする半導体装置。1. A first electrode and a second electrode made of conductive films, which are arranged to face each other, and a dielectric film formed between the first electrode and the second electrode. The dielectric film is a film including a modified film having no hysteresis characteristic formed by heat-treating the dielectric film having a hysteresis characteristic of electric flux density-electric field strength characteristic at room temperature in a non-oxidizing atmosphere. A semiconductor device comprising a capacitor.
され、上記改質膜と上記第1の電極の間には、常温にお
いて電束密度−電界強度特性が履歴特性を示す誘電体膜
が上記第1の電極に接して形成されていることを特徴と
する請求項1に記載の半導体装置。2. The modified film is formed in contact with the second electrode, and between the modified film and the first electrode, the electric flux density-electric field strength characteristic shows a hysteresis characteristic at room temperature. The semiconductor device according to claim 1, wherein a dielectric film is formed in contact with the first electrode.
ぞれコンデンサの下部電極および上部電極であることを
特徴とする請求項1若しくは2に記載の半導体装置。3. The semiconductor device according to claim 1, wherein the first electrode and the second electrode are a lower electrode and an upper electrode of a capacitor, respectively.
示す誘電体膜の膜厚が10nm以下であることを特徴と
する請求項1から3のいずれか一に記載の半導体装置。4. The semiconductor device according to claim 1, wherein the film thickness of the dielectric film having the hysteresis characteristic of the electric flux density-electric field strength characteristic is 10 nm or less.
あることを特徴とする請求項1から4のいずれか一に記
載の半導体装置。5. The semiconductor device according to claim 1, wherein the dielectric film is a perovskite type oxide.
元素として含むことを特徴とする請求項5に記載の半導
体装置。6. The semiconductor device according to claim 5, wherein the dielectric film contains titanium or lead as a main constituent element.
鉛、ジルコニウム酸チタン酸鉛、ジルコニウム酸チタン
酸ランタン鉛からなる群から選ばれることを特徴とする
請求項5若しくは6に記載の半導体装置。7. The semiconductor device according to claim 5, wherein the perovskite oxide is selected from the group consisting of lead titanate, lead zirconate titanate, and lead lanthanum zirconate titanate.
さらに含み、上記鉛、チタンおよびジルコニウムの組成
比が、それぞれ45原子%〜55原子%、10原子%〜
30原子%および10原子%〜30原子%であることを
特徴とする請求項6に記載の半導体装置。8. Zirconium is further contained as one of the main constituent elements, and the composition ratio of lead, titanium and zirconium is 45 atom% to 55 atom% and 10 atom% to, respectively.
The semiconductor device according to claim 6, wherein the content is 30 atom% and 10 atom% to 30 atom%.
ンデンサであることを特徴とする請求項1から7のいず
れか一に記載の半導体装置。9. The semiconductor device according to claim 1, wherein the capacitor is a DRAM information recording capacitor.
の電極を形成する工程と、当該第1の電極を覆う強誘電
体組成を有する誘電体膜を形成する工程と、酸化性雰囲
気中における第1の熱処理を行って上記誘電体膜を結晶
化させる工程と、上記誘電体膜を覆う第2の電極を形成
する工程と、非酸化性雰囲気中における第2の熱処理を
行って、上記誘電体膜のうち少なくとも上記第2の電極
との界面近傍の部分を改質して強誘電性を失わせる工程
を、少なくとも含むことを特徴とする半導体装置の製造
方法。10. A first semiconductor device having a predetermined shape on a semiconductor substrate.
The step of forming the electrode, the step of forming the dielectric film having the ferroelectric composition covering the first electrode, and the first heat treatment in an oxidizing atmosphere to crystallize the dielectric film. A step of forming a second electrode covering the dielectric film, and performing a second heat treatment in a non-oxidizing atmosphere to remove at least a portion of the dielectric film near an interface with the second electrode. A method of manufacturing a semiconductor device, comprising at least a step of modifying a portion to lose ferroelectricity.
成する工程は、酢酸鉛、ジルコニウム・インプロポキサ
イドおよびチタン・インプロポキサイドのメトキシメタ
ノール溶液を全面に塗布することによって行われること
を特徴とする請求項10に記載の半導体装置の製造方
法。11. The step of forming a dielectric film having a ferroelectric composition is performed by applying a methoxymethanol solution of lead acetate, zirconium impropoxide and titanium impropoxide to the entire surface. The method of manufacturing a semiconductor device according to claim 10, wherein
℃の温度で行われることを特徴とする請求項10若しく
は11に記載の半導体装置の製造方法。12. The first heat treatment comprises 600 ° C. to 750 ° C.
The method of manufacturing a semiconductor device according to claim 10 or 11, wherein the method is performed at a temperature of ° C.
ガス雰囲気中、450℃〜750℃の温度で行われるこ
とを特徴とする請求項10に記載の半導体装置の製造方
法。13. The method of manufacturing a semiconductor device according to claim 10, wherein the second heat treatment is performed at a temperature of 450 ° C. to 750 ° C. in a nitrogen or inert gas atmosphere.
ガス雰囲気中、450℃〜550℃の温度で行われるこ
とを特徴とする請求項10から12のいずれか一に記載
の半導体装置の製造方法。14. The semiconductor device according to claim 10, wherein the second heat treatment is performed at a temperature of 450 ° C. to 550 ° C. in a nitrogen or inert gas atmosphere. Production method.
極を覆う第2の誘電体膜をプラズマCVDによって形成
される工程が、付加されることを特徴とする請求項10
から14のいずれか一に記載の半導体装置の製造方法。15. The step of forming a second dielectric film, which covers the second electrode, by plasma CVD after the second heat treatment is added.
15. The method for manufacturing a semiconductor device according to any one of 1 to 14.
化物またはアルコレート化合物を原料ガスとして行なわ
れることを特徴とする請求項15に記載の半導体装置の
製造方法。16. The method for manufacturing a semiconductor device according to claim 15, wherein the plasma CVD is performed using a silicon hydride or an alcoholate compound as a source gas.
成する工程は、鉛、ジルコニウム及びチタンの酸化物を
ターゲットとして用いた酸化性雰囲気中におけるスパッ
タ法によって行なわれることを特徴とする請求項10に
記載の半導体装置の製造方法。17. The step of forming a dielectric film having the ferroelectric composition is performed by a sputtering method in an oxidizing atmosphere using an oxide of lead, zirconium and titanium as a target. Item 11. A method for manufacturing a semiconductor device according to item 10.
00℃〜750℃に保って行なわれ、上記第1の熱処理
は省略されることを特徴とする請求項17に記載の半導
体装置の製造方法。18. The sputtering method uses a substrate having a temperature of 6
18. The method of manufacturing a semiconductor device according to claim 17, wherein the first heat treatment is omitted while the temperature is maintained at 00 [deg.] C. to 750 [deg.] C.
成する工程は、酸化性雰囲気中において原料を分解する
CVD法って行なわれることを特徴とする請求項10に
記載の半導体装置の製造方法。19. The semiconductor device according to claim 10, wherein the step of forming the dielectric film having the ferroelectric composition is performed by a CVD method of decomposing the raw material in an oxidizing atmosphere. Production method.
M)およびTi(−Oc3H7)4を原料として用いるこ
とを特徴とする請求項19に記載の半導体装置の製造方
法。20. The raw materials are Pb (DPM) and Zr (DP).
M) and Ti (method of manufacturing a semiconductor device according to claim 19 which comprises using a -Oc 3 H 7) 4 as a raw material.
0℃であり、上記第1の熱処理は省略されることを特徴
とする請求項19もしくは20に記載の半導体装置の製
造方法。21. In the CVD method, the temperature of the substrate is set to 60.
21. The method for manufacturing a semiconductor device according to claim 19, wherein the temperature is 0 ° C., and the first heat treatment is omitted.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8128571A JPH09312381A (en) | 1996-05-23 | 1996-05-23 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8128571A JPH09312381A (en) | 1996-05-23 | 1996-05-23 | Semiconductor device and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09312381A true JPH09312381A (en) | 1997-12-02 |
Family
ID=14988054
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8128571A Pending JPH09312381A (en) | 1996-05-23 | 1996-05-23 | Semiconductor device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH09312381A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999005712A1 (en) * | 1997-07-25 | 1999-02-04 | Symetrix Corporation | Process for fabricating layered superlattice materials and abo3, type metal oxides and making electronic devices including same without exposure to oxygen |
US6709991B1 (en) | 1997-05-23 | 2004-03-23 | Nec Corporation | Method of fabricating semiconductor device with capacitor |
KR100468708B1 (en) * | 1998-03-23 | 2005-03-16 | 삼성전자주식회사 | Method for forming ferroelectric capacitor and ferroelectric capacitor thereof |
KR100753574B1 (en) * | 2000-12-20 | 2007-08-30 | 후지쯔 가부시끼가이샤 | Process for producing high quality pzt films for ferroelectric memory integrated circuits |
-
1996
- 1996-05-23 JP JP8128571A patent/JPH09312381A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6709991B1 (en) | 1997-05-23 | 2004-03-23 | Nec Corporation | Method of fabricating semiconductor device with capacitor |
WO1999005712A1 (en) * | 1997-07-25 | 1999-02-04 | Symetrix Corporation | Process for fabricating layered superlattice materials and abo3, type metal oxides and making electronic devices including same without exposure to oxygen |
US5962069A (en) * | 1997-07-25 | 1999-10-05 | Symetrix Corporation | Process for fabricating layered superlattice materials and AB03 type metal oxides without exposure to oxygen at high temperatures |
KR100468708B1 (en) * | 1998-03-23 | 2005-03-16 | 삼성전자주식회사 | Method for forming ferroelectric capacitor and ferroelectric capacitor thereof |
KR100753574B1 (en) * | 2000-12-20 | 2007-08-30 | 후지쯔 가부시끼가이샤 | Process for producing high quality pzt films for ferroelectric memory integrated circuits |
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