CN101872769B - Ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method - Google Patents

Ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method Download PDF

Info

Publication number
CN101872769B
CN101872769B CN2010102025772A CN201010202577A CN101872769B CN 101872769 B CN101872769 B CN 101872769B CN 2010102025772 A CN2010102025772 A CN 2010102025772A CN 201010202577 A CN201010202577 A CN 201010202577A CN 101872769 B CN101872769 B CN 101872769B
Authority
CN
China
Prior art keywords
substrate
photoetching
layer
thin film
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2010102025772A
Other languages
Chinese (zh)
Other versions
CN101872769A (en
Inventor
谢丹
罗亚烽
冯婷婷
韩学光
任天令
刘理天
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tsinghua University
Original Assignee
Tsinghua University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tsinghua University filed Critical Tsinghua University
Priority to CN2010102025772A priority Critical patent/CN101872769B/en
Publication of CN101872769A publication Critical patent/CN101872769A/en
Application granted granted Critical
Publication of CN101872769B publication Critical patent/CN101872769B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Semiconductor Memories (AREA)

Abstract

The invention relates to a ferroelectric dynamic random access memory based on an atomic layer deposited isolating layer and a preparation method thereof, belonging to the technical field of microelectronic new materials and devices. The distinction characteristics of the device are as follows: the isolating layer medium is any one of HfO2, Hf-Al-O, TiO2 and Al2O3; and the ferroelectric film layer is any one of BXT or BXFY, wherein X is the doped rare-earth elements; and Y is the doped transition metal elements. The method comprises the following steps: washing and oxidizing the silicon substrate; growing an oxidation layer after forming a source/drain region and a substrate contact region by photoetching; growing an isolating layer medium film and a ferroelectric film after forming a grid region by photoetching; sputtering an electrode metal layer on the ferroelectric film; then forming a grid electrode and a contact hole by photoetching and etching; forming a source electrode, a drain electrode, a substrate contact metal layer and an electrode metal layer by photoetching; and then carrying out alloying. The invention can obtain uniform and compact memory medium films and isolating layer materials with large areas and good performance, and the FEDRAM devices prepared by the memory medium films and the isolating layer materials have smaller leakage and higher retention characteristics.

Description

Ferroelectric dynamic random access memory and preparation method based on atomic layer deposited isolating layer
Technical field
The invention belongs to microelectronics new material and device technology field, particularly a kind of based on high dielectric constant film (abbreviation: the technology of preparing of ferroelectric dynamic random access memory (FEDRAM) high K dielectric film).
Background technology
Ferroelectric material has spontaneous polarization and spontaneous polarization can be orientated with extra electric field, remove external electric field after, the polarization of ferroelectric material can be in equal and opposite in direction, two residual polarization (± P in the opposite direction r) state, these two kinds of stable polarized states realize the conversion between " 1 " and " 0 " state under the effect of electric field outside, thereby can be used as the binary code of memory.Owing to need not rely on external electric field to keep memory; Therefore; As far back as nineteen fifty-two, Anderson just utilizes this principle to propose the notion of non-volatility ferroelectric random asccess memory (Nonvolatile Ferroelectric Random Access Memory-NVFRAM) first.
The non-volatility ferroelectric memory mainly contains two kinds of versions: a kind of is ferroelectric RAM (FeRAM), and a kind of is ferro-electric field effect transistor (FeFET).The memory cell of FeRAM mainly is to rely on ferroelectric capacitor to carry out the storage of data, and ferroelectric capacitor is its core.Characteristics such as that FeRAM has is non-volatile, write fast, low in energy consumption, often erasable and capability of resistance to radiation is strong have become one type with fastest developing speed in the non-volatile ferroelectric memory.But the shortcoming that exists is: reading of data had destructiveness, must take the write-back mode; Simultaneously, owing to adopt capacitance structure also to limit the further raising of memory capacity.
FeFET is the grid region that ferroelectric thin film directly is deposited on FET (FET); The control of electric current realized the access to data between the spontaneous polarization that utilizes ferroelectric material was leaked the source, because this structure does not contain ferroelectric electric capacity, thereby; Size is less, can obtain the storage density higher than FeRAM; The storage principle of FeFET has determined nondestructive data to read simultaneously.In theory, FeFET more can embody the advantage of ferroelectric memory than FeRAM.Therefore, as far back as nineteen fifty-five, the AT&T Labs has just proposed the idea about FeFET first, but up to 1974, talent's reported first such as S.Y.Wu based on bismuth titanates (Bi 4Ti 3O 12) the FET device of ferroelectric thin film.But, make the retention time of FeFET fall short of because the interface between ferroelectric thin film and the Si (F-S) exists the problems such as defective of iunjected charge, interface trap and film itself.In order effectively to utilize some advantages of FeFET structure itself; Overcome the difficulty that FeFET runs into again in realization; 2000, the T.P.Ma of electronic engineering of Yale professor's ferroelectric memory research group thought that the retention time of this limited number of time is always much longer than the refresh time of dynamic random access memory (DRAM), therefore; The notion that has proposed ferroelectric dynamic random access memory (FEDRAM) first (is seen T.P.Ma; J.P.Han, A ferroelectric dynamic random access memory, U.S.Patent 6067244 (2000)).FEDRAM is with the gate medium of ferroelectric thin film as MOSFET, and between ferroelectric thin film and Si, adds separator, thereby forms metal-ferroelectric thin film-separator-Si (MFIS-FET) field-effect transistor structure; As shown in Figure 1, comprising: silicon substrate 11, source region 12, drain region 13; Separator deielectric-coating 14, ferroelectric thin film layer 15, gate electrode 16; Source electrode 17, drain electrode 18.In silicon substrate 11, form source region 12 and drain region 13, formation separator deielectric-coating 14 on silicon substrate 11 forms ferroelectric thin film layer 15 on separator deielectric-coating 14, on ferroelectric thin film layer 15, form gate electrode 16.Source electrode 17 and drain electrode 18 both sides at gate electrode 16.
In said structure, form source region 12 and drain region 13 in the silicon substrate 11, its end respectively with separator deielectric-coating 14 in a part contact.Separator deielectric-coating 14 is nitride (Si 3N 4).Ferroelectric thin film layer 15 is strontium bismuth tantalate (SrBi 2Ta 2O 9: SBT).Gate electrode 16 is gold (Au) or a platinum (Pt).Source electrode 17 is aluminium (Al) with drain electrode 18
The preparation technology of above-mentioned device architecture comprises:
(1) p type Si substrate is cleaned earlier and oxidation
P type Si substrate resistance rate is: 6-9 Ω cm or 21-24 Ω cm, and oxidated layer thickness is 1000nm;
(2) utilize phosphorus (P 2O 5) inject the formation source-drain area;
(3) preparation separator dielectric film
Utilize and spray vapour deposition (JVD) method grown silicon nitride (Si 3N 4) the separator dielectric film, film thickness is about 5~6nm; AN 30 minutes, temperature was 800 ℃ afterwards;
(4) preparation ferroelectric thin film
Utilize metal oxide deposition (MOD) method growth strontium bismuth tantalate (SrBi 2Ta 2O 9, be abbreviated as SBT) and ferroelectric thin film, thickness is 200~260nm; And in oxygen, annealed 1 hour, temperature is 800~900 ℃;
(5) preparation gate electrode
Utilize electron beam evaporation platinum electrode (Pt), perhaps thermal evaporation gold (Au) forms gate electrode;
(6) thermal evaporation aluminium electrode (Al) forms source electrode and drain metal layer;
(7) Alloying Treatment
At 400 ℃ of nitrogen and hydrogen (N 2: H 2=5%: carried out the alloying annealing in process 95%) 30 minutes.
See that from structure this is a kind of novel single tube DRAM (common DRAM unit is the 1T1C structure).It is compared with traditional DRAM, has following advantage: (1) retention time than traditional DRAM (<1s) much longer; (2) owing to need not storage capacitance, thereby cell size reduces, and helps the raising of storage density; (3) the very big shortening that need not storage capacitance and refreshing frequency makes power consumption reduce; (4) need not storage capacitance and make it easier to be integrated, realize the Embedded Application of FEDRAM with logical device.
The operation principle of FEDRAM is: on grid, applied after the positive pulse, ferroelectric material is in positive residual polarization state.The positive polarization electric charge of ferroelectric layer bottom will just have been formed a conducting channel that connects source region and drain region like this by the compensation of the inversion layer charge in the semiconductor in the Semiconductor substrate.Add certain voltage between leaking in the source, just can produce source-drain current,, just so-called ON state, corresponding storage one state.If on grid, applied a negative pulse, ferroelectric layer is in negative polarized state, and Semiconductor substrate is in accumulation area, does not have conducting channel, and FET is in " shutoff " state, promptly corresponding " 0 " attitude.Compare with FeFET, FEDRAM need refresh when work, so that canned data is maintained, compares with DRAM, and FEDRAM has the long retention time, thereby can reduce refreshing frequency.And be nonvolatile as the FeFET of another type of ferroelectric memory, need not refresh in theory.Therefore, compare with FeFET, FEDRAM is more feasible in realization, thereby makes FeFET obtain new development space.
Adopt strontium bismuth tantalate (SrBi in the disclosed said structure of Yale University 2Ta 2O 9: SBT) as gate dielectric material.But the remanent polarization of SBT film is less, and film-forming temperature is higher, is unfavorable for the compatibility of ferroelectric capacitor and standard CMOS integrated technique.On the technology of preparing of film, the method for manufacturing thin film of use is to spray vapour deposition (JVD) method, is unfavorable for the realization of large area uniform film.Adopt nitride as the separator medium,, make operating voltage higher, be unfavorable for the reduction of device power consumption because its dielectric constant is less.
High K dielectric film is meant the metal-oxide film with high dielectric constant, for example: HfO 2, ZrO 2, Pr 2O 3, Gd 2O 3, La 2O 3, Y 2O 3Hf-Al-O and Hf-Si-O etc.; These materials have electric property preferably, thermodynamic stability, good interface effect and with the compatible of silicon technology and reliability preferably; Therefore, under the diminishing trend of integrated circuit technology live width, can replace traditional gate medium (for example: SiO 2, Si 3N 4), thereby satisfy when not reducing transistor gate thickness, increase the purpose of its electric capacity.
Summary of the invention
The objective of the invention is for overcoming the weak point of prior art; A kind of ferroelectric dynamic random access memory and preparation method based on atomic layer deposited isolating layer proposed; The present invention adopts novel storage medium and separator dielectric film and new preparation method, can obtain large tracts of land, even compact, well behaved storage medium film and insolated layer materials, its change in film thickness scope is bigger; FEDRAM device with its preparation has littler electric leakage, higher retention performance.
The ferroelectric dynamic random access memory based on atomic layer deposited isolating layer that the present invention proposes comprises: silicon substrate, source region, drain region; The separator deielectric-coating, ferroelectric thin film layer, gate electrode; Source electrode, drain electrode, and be used for substrate contact region and the substrate contact electrode that device is measured; In silicon substrate, form the source region, drain region and substrate contact region, formation separator deielectric-coating forms ferroelectric thin film layer on the separator deielectric-coating on silicon substrate, on ferroelectric thin film layer, forms gate electrode; Source electrode and the both sides of drain electrode at gate electrode 26; It is characterized in that said separator medium is: HfO 2, Hf-Al-O, TiO 2, Al 2O 3In any one; Said ferroelectric thin film layer 25 is any one among BXT or the BXFY: wherein, and Bi 4-xX xTi 3O 12(BXT) X in is Doped Rare Earth element La,, Nd; Sm, Pr, any one among the Gd; The molar ratio of each component is: Bi: X: Ti: O=(4-x): x: 3: 12, the x value was in the scope of 0.1<x<1.0, and better span is 0.25≤x≤0.85; Bi among the said BXT is with respect to said composition formula: Bi 4-xX xTi 3O 12The mole percent scope that excessive interpolation, the superfluous content of this Bi element account for Bi, X and Ti element total amount is 5%≤Bi≤20%;
(Bi 1-xX x) (Fe 1-yY y) X among the O3 (BXFY) is Doped Rare Earth element La, Nd, Sm, Pr, any one among the Gd, Y are transition metal Mn, Nb, Co, any one among the Ni; The molar ratio of each component is: (Bi+X): (Fe+Y): O=:1: 1: 3, and Bi: X=(1-x): x, Fe: Y=(1-y): y; Wherein, 0.01<x<0.2, better span is 0.05≤x≤0.15; 0.01<y<0.2, better span are 0.05≤y≤0.15.
Said BXT film thickness can be 100nm~400nm; Said BXFY film thickness can be 100nm~400nm.
The method of the above-mentioned ferroelectric dynamic random access memory of preparation that the present invention proposes is characterized in that, may further comprise the steps:
(1) silicon substrate is cleaned;
(2) oxide layer of on the silicon substrate after the cleaning, growing:
(3) photoetching for the first time forms source-drain area;
Silicon substrate carries out photoetching after adopting positive adhesive process to oxidation, post bake, wet etching, stay glue phosphorus ( 31P +) inject or the boron injection, form source-drain area, inject energy and dosage and be respectively 60~80KeV, 4.0 * 10 15~5.0 * 10 15(cm -3);
(4) photoetching for the second time forms substrate contact region:
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake, wet etching stays glue boron (BF +) inject or the phosphorus injection, form substrate contact region; Inject energy and dosage and be respectively 70~80KeV, 4.0 * 10 15~5.0 * 10 15(cm -3);
(5) growth oxide layer:
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out the oxidation second time, oxidated layer thickness is 600~700nm, in nitrogen, substrate is carried out densification afterwards, and temperature is 850-900 ℃;
(6) photoetching for the third time forms the grid region:
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake, wet etching, stay glue boron ( 11B +) transfer ditch to inject or the injection of phosphorus accent ditch, form the grid region; Transfer ditch injection energy and dosage to be respectively 40~50KeV, 2.0 * 10 12~8.0 * 10 13(cm -3);
(7) growth separator dielectric film:
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare HfO 2, Hf-Al-O, TiO 2, Al 2O 3In any one separator dielectric film 24; Reaction temperature is: 100~230 ℃, film thickness is: 5~20nm;
(8) growth ferroelectric thin film
Utilize metal oxide deposition (MOD) method many iron thin films of preparation BXT on the separator dielectric film that step (7) forms;
Or utilize metal oxide deposition (MOD) method to prepare the many iron thin films 26 of BXFY;
(9) sputtering electrode metal level on the ferroelectric thin film that step (8) forms;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode, etch rate is: 20~60nm/ minute, or adopt positive glue to peel off method formation gate electrode 26;
(11) the 5th photoetching form contact hole:
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake, the wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, form respectively with substrate in the hole that contacts of source region, drain region and substrate contact region; Wherein, etching ferroelectric thin film speed is: 20~100nm/ minute; Etching separator dielectric film speed is: 1.5~3nm/ minute;
(12) preparation metal level:
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 800~1200nm;
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional wet etching Al or dry etching Al; Perhaps positive glue is peeled off Al; Step (12) is handled the back metal level carry out photoetching and etching, form the source metal, drain metal layer and the substrate contact electrode metal level that contact with source region, drain region and substrate contact region respectively;
(14) Alloying Treatment:
Substrate after step (13) handled is at 420 ℃~450 ℃ nitrogen (N 2) in carried out annealing in process 20~40 minutes.
Beneficial effect of the present invention:
In the present invention, adopt new storage medium film (as: BXT and BXFY), adopt high K dielectric film as separator (as: HfO 2, Hf-Al-O, TiO 2, Al 2O 3); And adopt technique for atomic layer deposition (ALD) to carry out the isolated layer film preparation; Be with former researcher's difference: adopt different storage medium and insolated layer materials, different method for manufacturing thin film and process conditions, obtained large tracts of land, even compact, well behaved storage medium film and insolated layer materials; Its change in film thickness scope is bigger, and uses it in the preparation of FEDRAM.
Its effect will make ferroelectric thin film have bigger remanent polarization, lower operating voltage, film thickness wider range.Among the present invention, utilize the high K separator dielectric film of ALD method preparation, have better uniformity and stability, easy to be compatible mutually with the CMOS integrated technique, make the FEDRAM device of its preparation have littler electric leakage, higher retention performance.
Description of drawings
Fig. 1 is the structural representation of existing FEDRAM device cell;
Fig. 2 is a FEDRAM device unit construction sketch map of the present invention.
Embodiment
Ferroelectric dynamic random access memory and preparation method based on atomic layer deposited isolating layer that the present invention proposes specify as follows in conjunction with accompanying drawing and embodiment:
The FEDRAM device architecture that the present invention proposes, as shown in Figure 2, comprising: silicon substrate 21, source region 22, drain region 23; Separator deielectric-coating 24, ferroelectric thin film layer 25, gate electrode 26; Source electrode 27, drain electrode 28, and be used for the substrate contact region 29 and substrate contact electrode 30 that device is measured; In silicon substrate 21, form source region 22, drain region 23 and substrate contact region 29, formation separator deielectric-coating 24 on silicon substrate 21 forms ferroelectric thin film layer 25 on separator deielectric-coating 24, on ferroelectric thin film layer 25, form gate electrode 26.Source electrode 27 and drain electrode 28 both sides at gate electrode 26; As shown in Figure 2.
In said structure,
Wherein, substrate 21 is a p type silicon, and the source region is n +The district, the drain region is n +The district.Perhaps substrate 21 is a n type silicon, and the source region is p +The district, the drain region is p +The district.
Source region 22 and drain region 23, its end contacts with the part zone of the separator deielectric-coating 24 of its top.
Structure of the present invention and existing FEDRAM are basic identical, and its difference technical characterictic is to adopt different storage medium and insolated layer materials, and different method for manufacturing thin film and process conditions specify as follows:
Separator medium 24 of the present invention is: HfO 2, Hf-Al-O, TiO 2, Al 2O 3In any one.
Ferroelectric thin film layer 25 of the present invention is any one among BXT or the BXFY:
Wherein, Bi 4-xX xTi 3O 12(BXT) X in is Doped Rare Earth element La,, Nd; Sm, Pr, any one among the Gd; The molar ratio of each component is: Bi: X: Ti: O=(4-x): x: 3: 12, the x value was in the scope of 0.1<x<1.0, and better span is 0.25≤x≤0.85; Bi among the said BXT is with respect to said component formula: Bi 4-xX xTi 3O 12Want excessive interpolation, the scope that the superfluous content of this Bi element accounts for the mole percent of Bi, X and Ti element total amount is 5%≤Bi≤20%; The BXT film thickness is 100nm~400nm;
(Bi 1-xX x) (Fe 1-yY y) X among the O3 (BXFY) is Doped Rare Earth element La, Nd, Sm, Pr, any one among the Gd, Y are containing transition metal element M n, Nb, Co, any one among the Ni; The molar ratio of each component is: (Bi+X): (Fe+Y): O=:1: 1: 3, and Bi: X=(1-x): x, Fe: Y=(1-y): y; Wherein, 0.01<x<0.2, better span is 0.05≤x≤0.15; 0.01<y<0.2, better span are 0.05≤y≤0.15.The BXFY film thickness is 100nm~400nm.
Gate electrode 26 of the present invention is platinum Pt, any one among the perhaps golden Au; Source electrode 27, drain electrode 28 is aluminium (Al) with substrate contact electrode 30, and is all identical with prior art.
The FEDRAM preparation of devices method that the present invention proposes, as shown in Figure 2, may further comprise the steps:
(1) silicon substrate is cleaned; Substrate 21 can be p type silicon, also can be n type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, (this step is a conventional process) oxidated layer thickness is 650~900nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake, wet etching, stay glue phosphorus ( 31P +) inject or the boron injection, form source-drain area, inject energy and dosage and be respectively 60~80KeV, 4.0 * 10 15~5.0 * 10 15(cm -3) (adopting common process parameter and condition);
If substrate 21 is a p type silicon, the source region is n +District 22, the drain region is n +District 23;
If substrate 21 is a n type silicon, the source region is p +District 22, the drain region is p +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake, wet etching stays glue boron (BF +) inject or the phosphorus injection, form substrate contact region 29; Inject energy and dosage and be respectively 70~80KeV, 4.0 * 10 15~5.0 * 10 15(cm -3) (adopting common process parameter and condition);
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out the oxidation second time (common process), oxidated layer thickness is 600~700nm, in nitrogen, substrate is carried out densification afterwards, and temperature is 850-900 ℃;
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake, wet etching, stay glue boron ( 11B +) transfer ditch to inject or the injection of phosphorus accent ditch, form the grid region; Transfer ditch injection energy and dosage to be respectively 40~50KeV, 2.0 * 10 12~8.0 * 10 13(cm -3) (adopting common process parameter and condition);
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare HfO 2, Hf-Al-O, TiO 2, Al 2O 3In any one separator dielectric film 24; Reaction temperature is: 100~230 ℃, film thickness is: 5~20nm;
(8) growth ferroelectric thin film
(the concrete technology of preparing of this step adopts the applicant to obtain the patent patent of power, and name is called: ferrous acid bismuth/bismuth titanate laminated construction electric capacity and preparation method thereof to utilize metal oxide deposition (MOD) method on the separator dielectric film that step (7) forms, to prepare the many iron thin films 25 of BXT; The patent No. is: ZL 200710175793.0), specifically may further comprise the steps:
8-11) the preparation of BXT precursor colloidal sol;
11-1) (0.3~5g) is dissolved in acetate (commercially available prod) or the monoethanolamine (commercially available prod), makes it be dissolved into the acetate solution of rare earth element fully with the acetate (commercially available prod) of rare earth element;
11-2) (3~20g) are dissolved in caproic acid (commercially available prod) or acetate (commercially available prod), make it be dissolved into caproic acid bismuth solution or bismuth acetate solution fully with caproic acid bismuth (commercially available prod) or bismuth acetate (commercially available prod) or bismuth nitrate (commercially available prod);
11-3) the acetate solution with rare earth element adds in caproic acid bismuth solution or the bismuth acetate solution, under 25~100 ℃ of conditions, fully stirs 10~30 minutes, to form the clarification even mixed solution;
11-4) measure isopropyl titanate (commercially available prod) (1~10g), add slowly in the said mixed solution, under 25~100 ℃ of conditions, fully stirred 15~30 minutes, to form the uniform BXT solution of clarification;
11-5) with propyl alcohol or ethanol (commercially available prod; Both can be used as solvent and also can be used as diluent) add in the above-mentioned BXT solution and dilute; The concentration range of BXT solution is 0.01~0.5mol/l, under 25~100 ℃ of conditions, stirs 20~60 minutes, until forming uniform BXT solution;
11-6) using the aperture is that the filter of 0.2~0.3 μ m is filtered solution into drop bottle, obtains the BXT precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill and can obtain the BXT precursor sol in about 5~10 days.
8-12) the preparation of BXT ferroelectric thin film.
12-1) utilize the method for spin coating to apply one deck BXT precursor colloidal sol after, the high speed centrifugation rotation forms skim BXT ferroelectric thin film, even glue rotating speed is: 3000~4000 rev/mins; Time is: 30~100 seconds;
12-2) said film is placed on carries out preceding baking on the hot plate, pre-bake temperature is: 200~300 ℃, the time is: 5~10 minutes;
12-3) again the film after the preceding baking is carried out pyrolysis, pyrolysis temperature is: 300~400 ℃, the time is: 5~15 minutes;
12-4) repeating step 12-1)-and step 12-3), till the BXT film reaches preset thickness;
12-5) then with this film at 600~650 ℃, carry out subsequent annealing in oxygen or the nitrogen atmosphere, crystallization time is 10~30 minutes, obtains BXT ferroelectric thin film 26; Thickness is 100~400nm.
Or utilize metal oxide deposition (MOD) method to prepare the many iron thin films 26 of BXFY; The preparation method specifically may further comprise the steps:
8-21) the preparation of BXFY precursor colloidal sol.
21-1) (0.01~3g) is dissolved in acetate (commercially available prod) or the monoethanolamine (commercially available prod), makes it be dissolved into the acetate solution of rare earth element fully with the acetate (commercially available prod) of rare earth element;
21-2) (0.3~10g) is dissolved in caproic acid (commercially available prod) or acetate (commercially available prod), makes it be dissolved into caproic acid bismuth solution or bismuth acetate solution fully with caproic acid bismuth (commercially available prod) or bismuth acetate (commercially available prod) or bismuth nitrate (commercially available prod);
21-3) the acetate solution with rare earth element adds in caproic acid bismuth solution or the bismuth acetate solution, under 25~100 ℃ of conditions, fully stirs 10~30 minutes, to form the mixed solution A that clarification contains rare earth element and bismuth uniformly;
21-4) (0.01~3g) is dissolved in acetate (commercially available prod) or the monoethanolamine (commercially available prod), makes it be dissolved into the acetate solution of transition metal fully with the acetate (commercially available prod) of transition metal;
21-5) (0.1~5g) is dissolved in EGME (commercially available prod) or the acetate (commercially available prod), makes it be dissolved into iron-containing liquor fully with ethanol iron or ferric nitrate (commercially available prod);
21-6) the acetate solution with transition metal adds in the iron-containing liquor, under 25~100 ℃ of conditions, fully stirs 15~30 minutes, to form the mixed solution B that clarification contains transition metal and iron uniformly;
21-7) mixed solution A and mixed solution B are mixed, under 30~100 ℃ of conditions, fully stirred 20~60 minutes, to form the clarification even mixed solution;
21-8) with diluting in the above-mentioned mixed solution of acetate (commercially available prod) adding; With EGME or caproic acid (commercially available prod; Both can be used as solvent and also can be used as thickener) add in the above-mentioned mixed solution and regulate viscosity, reach required viscosity of filming technology and concentration, the concentration range of BFO is 0.05~0.5mol/l; Under 25~100 ℃ of conditions, stirred 30~60 minutes, until forming uniform, the moderate BXFY solution of viscosity;
21-9) using the aperture is that the filter of 0.2~0.3 μ m is filtered solution into drop bottle, obtains the BXFY precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill and can obtain BXFY colloidal sol in about 5~10 days.
8-22) the preparation of BXFY ferroelectric thin film.
22-1) utilize the method for spin coating to apply one deck BXFY precursor colloidal sol after, the high speed centrifugation rotation forms skim BXFY ferroelectric thin film, even glue rotating speed is: 3000~4500 rev/mins; Time is: 20~100 seconds;
22-2) said film is placed on carries out preceding baking on the hot plate, pre-bake temperature is: 150~300 ℃, the time is: 5~10 minutes;
22-3) again the film after the preceding baking is carried out pyrolysis, pyrolysis temperature is: 300~400 ℃, the time is: 5~15 minutes;
22-4) repeating step 22-1)-and step 22-3), till the BXFY film reaches preset thickness;
22-5) then with this film at 500~650 ℃, carry out subsequent annealing in nitrogen or the oxygen atmosphere, crystallization time is 15~30 minutes, obtains BXFY ferroelectric thin film 26, thickness is 100~400nm.
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, metal material is: platinum Pt, perhaps golden Au, thickness is about: 150~200nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 20~60nm/ minute, or adopt positive glue to peel off method formation gate electrode 26;
(11) the 5th photoetching form contact hole
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching; Post bake; The wet etching ferroelectric thin film also utilizes ion beam etching (IBE) etching separator dielectric film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching ferroelectric thin film speed is: 20~100nm/ minute; Etching separator dielectric film speed is: 1.5~3nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 800~1200nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional wet etching Al or dry etching Al; Perhaps positive glue is peeled off Al; Step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 420 ℃~450 ℃ nitrogen (N 2) in carried out annealing in process 20~40 minutes.
Below through embodiment structure of the present invention and preparation method are specified, the overall structure of the ferroelectric dynamic random access memory of each embodiment is basic identical with the structure of existing similar device, no longer repeats.
Embodiment 1 present embodiment is a kind of ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method thereof
The separator medium of present embodiment is: HfO 2Ferroelectric thin film layer is: neodymium-doped metatitanic acid Bi 3.15Nd 0.85Ti 3O 12(being BNdT), the molar ratio of each component is: Bi: Nd: Ti: O=3.15: 0.85: 3: 12.Bi in the said Nd-doped Bi 4 Ti 3 O 12 is with respect to said component formula Bi 3.15Nd 0.85Ti 3O 12Content want excessive interpolation, the excessive percentage of this Bi element accounts for 20% of Bi, X and Ti element total amount.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 650nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) inject, form source-drain area, inject energy and dosage and be respectively 60KeV, 4.0 * 10 15(cm -3) (adopting common process parameter and condition);
Substrate 21 is a p type silicon, and the source region is n +District 22, the drain region is n +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF +) inject, form substrate contact region 29; Inject energy and dosage and be respectively 70KeV, 4.0 * 10 15(cm -3) (common process);
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out the oxidation second time (common process), oxidated layer thickness is 600nm, in nitrogen, substrate is carried out densification 30 minutes afterwards, and temperature is 850 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron ( 11B +) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 40KeV, 2.0 * 10 12(cm -3);
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare HfO 2 Separator dielectric film 24; Preparation HfO 2The reaction source of film is HfCl 4/ H 2O, reaction temperature is: 230 ℃, film thickness is: 5nm;
(8) growth ferroelectric thin film
Utilize metal oxide deposition (MOD) method on the separator dielectric film that step (7) forms, to prepare Bi 3.15Nd 0.85Ti 3O 12Ferroelectric thin film 25, technology of preparing adopt the applicant to obtain the patented technology of power, and (patent name is: ferrous acid bismuth/bismuth titanate laminated construction electric capacity and preparation method thereof; The patent No. is: ZL 200710175793.0), concrete steps are following:
8-11) the said BNdT precursor sol of preparation:
11-1) 1.366g acetic acid neodymium (commercially available prod) is dissolved in 10ml monoethanolamine (commercially available prod) and is mixed with consoluet acetic acid neodymium solution;
11-2) 15.422g caproic acid bismuth (commercially available prod) is dissolved in 25ml caproic acid (commercially available prod) and is made into consoluet caproic acid bismuth solution;
11-3) acetic acid neodymium solution is added in the caproic acid bismuth solution, under 25 ℃ of conditions, fully stirred 30 minutes, form the uniform neodymium bismuth mixed solution of clarification
11-4) measure isopropyl titanate 4.351g, add slowly in the above-mentioned neodymium bismuth mixed solution, under 25 ℃ of conditions, fully stirred 30 minutes, form the uniform BNdT dope of clarification;
11-5) in the BNdT dope, add propyl alcohol and be diluted to 100ml, its concentration is 0.01mol/l, under 25 ℃ of conditions, stirs 60 minutes, until the clarification of BNdT solution evenly;
11-6) using the aperture is that the filter of 0.2 μ m is filtered solution into drop bottle, obtains the BNdT precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill the BNdT precursor sol that can obtain being used to get rid of film in about 5 days.
8-12) the said BNdT ferroelectric thin film of preparation:
12-1) on the separator dielectric film that step (7) forms, utilize the method for spin coating to apply one deck BNdT precursor colloidal sol, the high speed centrifugation rotation forms skim BNdT ferroelectric thin film, and even glue rotating speed is: 3000 rev/mins, the time is: 100 seconds
12-2) place it in and carry out preceding baking on the hot plate, pre-bake temperature is: 200 ℃, the time is: 10 minutes
12-3) again with its pyrolysis, pyrolysis temperature is: 300 ℃, the time is: 15 minutes
12-4) repeat above process, obtaining thickness is the BNdT film of 100nm
12-5) in 600 ℃ of oxygen atmospheres, carry out subsequent annealing afterwards, crystallization time is 30 minutes, obtains BNdT ferroelectric thin film 25
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 150nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 60nm/ minute;
(11) the 5th photoetching form contact hole
Utilize the substrate etching separator dielectric film after ion beam etching (IBE) is handled step (10) also to utilize the wet etching ferroelectric thin film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching separator dielectric film speed is: 1.5nm/ minute; Etching ferroelectric thin film speed is: 100nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 800nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional wet etching Al, step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 420 ℃ of nitrogen (N 2) in carried out annealing in process 20 minutes.
Embodiment 2 present embodiments are a kind of ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method thereof
The separator medium of present embodiment is: Hf-Al-O; Ferroelectric thin film layer is: neodymium-doped metatitanic acid Bi 3.75Nd 0.25Ti 3O 12(being BNdT), the molar ratio of each component is: Bi: Nd: Ti: O=3.75: 0.25: 3: 12.Bi in the said Nd-doped Bi 4 Ti 3 O 12 is with respect to said component formula Bi 3.75Nd 0.25Ti 3O 12Content want excessive interpolation, the excessive percentage of this Bi element accounts for 20% of Bi, X and Ti element total amount.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 900nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) inject, form source-drain area, inject energy and dosage and be respectively 80KeV, 5.0 * 10 15(cm -3) (common process);
Substrate 21 is a p type silicon, and the source region is n +District 22, the drain region is n +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF +) inject, form substrate contact region 29; Inject energy and dosage and be respectively 80KeV, 5.0 * 10 15(c M-3) (common process);
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 700nm, in nitrogen, substrate is carried out densification 30 minutes afterwards, and temperature is 900 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron ( 11B +) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 50KeV, 8.0 * 10 13(cm -3);
(7) growth separator dielectric film
Utilize preparation Hf-Al-O separator dielectric film 24 on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled; The reaction source of preparation Hf-Al-O film is HfCl 4/ H 2O and TMA (Trimethylaluminium C 3H 9Al), reaction temperature is: 150 ℃, film thickness is: 5nm;
(8) growth ferroelectric thin film
Utilize metal oxide deposition (MOD) method on the separator dielectric film that step (7) forms, to prepare Bi 3.75Nd 0.25Ti 3O 12Ferroelectric thin film 25, technology of preparing adopt the applicant to obtain the patented technology of power, and (patent name is: ferrous acid bismuth/bismuth titanate laminated construction electric capacity and preparation method thereof; The patent No. is: ZL200710175793.0), concrete steps are following:
8-11) the said BNdT precursor sol of preparation:
11-1) 0.402g acetic acid neodymium (commercially available prod) is dissolved in 10ml monoethanolamine (commercially available prod) and is mixed with consoluet acetic acid neodymium solution;
11-2) 13.942g bismuth nitrate (commercially available prod) is dissolved in 50ml acetate (commercially available prod), and adds the 10ml monoethanolamine, under 100 ℃ of conditions, fully stirred 20 minutes, it is dissolved fully form bismuth acetate solution;
11-3) acetic acid neodymium solution is added in the bismuth acetate solution, under 100 ℃ of conditions, fully stirred 10 minutes, form the uniform neodymium bismuth mixed solution of clarification;
11-4) measure isopropyl titanate 4.351g, add above-mentioned neodymium bismuth mixed solution slowly, under 100 ℃ of conditions, fully stirred 15 minutes, form the uniform BNdT dope of clarification;
11-5) in the BNdT dope, adding ethanol, to be diluted to 200ml concentration be 0.4mol/l, under 100 ℃ of conditions, stirred 20 minutes, until the clarification of BNdT solution evenly;
11-6) using the aperture is that the filter of 0.3 μ m is filtered solution into drop bottle, obtains the BNdT precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill the BNdT colloidal sol that can obtain being used to get rid of film in about 10 days
8-12) the said BNdT ferroelectric thin film of preparation:
12-1) on the separator dielectric film that step (7) forms, utilize the method for spin coating to apply one deck BNdT precursor colloidal sol, the high speed centrifugation rotation forms skim BNdT ferroelectric thin film, and even glue rotating speed is: 4000 rev/mins, the time is: 30 seconds
12-2) place it in and carry out preceding baking on the hot plate, pre-bake temperature is: 300 ℃, the time is: 10 minutes
12-3) again with its pyrolysis, pyrolysis temperature is: 300 ℃, the time is: 5 minutes
12-4) repeat above process, obtaining thickness is the BNdT film about 400nm
12-5) in 650 ℃ of oxygen atmospheres, carry out subsequent annealing afterwards, crystallization time is 10 minutes, obtains BNdT ferroelectric thin film 25
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, electrode material is: golden Au, thickness is about: 200nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 60nm/ minute, form gate electrode 26;
(11) the 5th photoetching form contact hole
Utilize the substrate etching separator dielectric film after ion beam etching (IBE) is handled step (10) also to utilize the wet etching ferroelectric thin film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching separator dielectric film speed is: 3nm/ minute; Etching ferroelectric thin film speed is: 20nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 1200nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional dry etching Al; Perhaps positive glue is peeled off Al; Step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 450 ℃ of nitrogen (N 2) in carried out annealing in process 40 minutes.
Embodiment 3 present embodiments are a kind of ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method thereof
The separator medium of present embodiment is: TiO 2Ferroelectric thin film layer is: neodymium-doped metatitanic acid Bi 3.15Nd 0.85Ti 3O 12(being BNdT), the molar ratio of each component is: Bi: Nd: Ti: O=3.15: 0.85: 3: 12.Bi in the said Nd-doped Bi 4 Ti 3 O 12 is with respect to said component formula Bi 3.15Nd 0.85Ti 3O 12Content want excessive interpolation, the excessive percentage of this Bi element accounts for 5% of Bi, X and Ti element total amount.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 700nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) inject, form source-drain area, inject energy and dosage and be respectively 70KeV, 4.2 * 10 15(cm -3) (common process);
Substrate 21 is a p type silicon, and the source region is n +District 22, the drain region is n +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF +) inject, form substrate contact region 29; Inject energy and dosage and be respectively 75KeV, 4.3 * 10 15(cm -3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 650nm, in nitrogen, substrate is carried out densification 30 minutes afterwards, and temperature is 880 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron ( 11B +) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 45KeV, 6.0 * 10 12(cm -3)
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare TiO 2 Separator dielectric film 24; Preparation TiO 2The reaction source of film is TiCl 4/ H 2O, reaction temperature is: 200 ℃, film thickness is: 10nm;
(8) growth ferroelectric thin film
Utilize metal oxide deposition (MOD) method on the separator dielectric film that step (7) forms, to prepare Bi 3.15Nd 0.85Ti 3O 12Ferroelectric thin film 25, technology of preparing adopt the applicant to obtain the patented technology of power, and (patent name is: ferrous acid bismuth/bismuth titanate laminated construction electric capacity and preparation method thereof; The patent No. is: ZL 200710175793.0), concrete steps are following:
8-11) the said BNdT precursor sol of preparation:
11-1) 1.366g acetic acid neodymium (commercially available prod) is dissolved in 10ml monoethanolamine (commercially available prod) and is mixed with consoluet acetic acid neodymium solution;
11-2) 9.394 bismuth acetates (commercially available prod) are dissolved in 40ml glacial acetic acid (commercially available prod), under 80 ℃ of conditions, fully stirred 10 minutes, bismuth acetate is dissolved fully form bismuth acetate solution;
11-3) acetic acid neodymium solution is added in the bismuth acetate solution, under 80 ℃ of conditions, fully stirred 15 minutes, form the uniform neodymium bismuth mixed solution of clarification
11-4) measure isopropyl titanate 4.351g, add slowly in the above-mentioned neodymium bismuth mixed solution, under 80 ℃ of conditions, fully stirred 20 minutes, form the uniform BNdT dope of clarification;
11-5) in the BNdT dope, add propyl alcohol and be diluted to 200ml, its concentration is 0.025mol/l, under 80 ℃ of conditions, stirs 35 minutes, until the clarification of BNdT solution evenly;
11-6) using the aperture is that the filter of 0.25 μ m is filtered solution into drop bottle, obtains the BNdT precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill the BNdT precursor sol that can obtain being used to get rid of film in about 8 days.
8-12) the said BNdT ferroelectric thin film of preparation:
12-1) on the separator dielectric film that step (7) forms, utilize the method for spin coating to apply one deck BNdT precursor colloidal sol, the high speed centrifugation rotation forms skim BNdT ferroelectric thin film, and even glue rotating speed is: 3500 rev/mins, the time is: 60 seconds
12-2) place it in and carry out preceding baking on the hot plate, pre-bake temperature is: 250 ℃, the time is: 7 minutes
12-3) again with its pyrolysis, pyrolysis temperature is: 250 ℃, the time is: 10 minutes
12-4) repeat above process, obtaining thickness is the BNdT film of 200nm
12-5) in 650 ℃ of nitrogen atmospheres, carry out subsequent annealing afterwards, crystallization time is 20 minutes, obtains BNdT ferroelectric thin film 25
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 180nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 35nm/ minute;
(11) the 5th photoetching form contact hole
Utilize the substrate etching separator dielectric film after ion beam etching (IBE) is handled step (10) also to utilize the wet etching ferroelectric thin film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching separator dielectric film speed is: 2nm/ minute; Etching ferroelectric thin film speed is: 60nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 1000nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional positive glue to peel off Al technology, step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 430 ℃ of nitrogen (N 2) in carried out annealing in process 30 minutes.
Embodiment 4 present embodiments are a kind of ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method thereof
The separator medium of present embodiment is: Al 2O 3Ferroelectric thin film layer is: neodymium-doped metatitanic acid Bi 3.75La 0.25Ti 3O 12(being BLT), the molar ratio of each component is: Bi: La: Ti: O=3.75: 0.25: 3: 12, (the also available Sm of the rare-earth elements La in the present embodiment, Pr or Gd replacement).Bi in the said Nd-doped Bi 4 Ti 3 O 12 is with respect to said component formula Bi 3.15Nd 0.85Ti 3O 12Content want excessive interpolation, the excessive percentage of this Bi element accounts for 10% of Bi, X and Ti element total amount.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 700nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) inject, form source-drain area, inject energy and dosage and be respectively 70KeV, 4.2 * 10 15(cm -3) (common process);
Substrate 21 is a p type silicon, and the source region is n +District 22, the drain region is n +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF +) inject, form substrate contact region 29; Inject energy and dosage and be respectively 75KeV, 4.3 * 10 15(cm -3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 650nm, in nitrogen, substrate is carried out densification 30 minutes afterwards, and temperature is 880 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron ( 11B +) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 45KeV, 6.0 * 10 12(cm -3)
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare Al 2O 3 Separator dielectric film 24; Preparation Al 2O 3The reaction source of film is TMA (Trimethylaluminium C 3H 9Al), reaction temperature is: 150 ℃, film thickness is: 10nm;
(8) growth ferroelectric thin film
Utilize metal oxide deposition (MOD) method on the separator dielectric film that step (7) forms, to prepare Bi 3.75La 0.25Ti 3O 12Ferroelectric thin film 25, technology of preparing adopt the applicant to obtain the patented technology of power, and (patent name is: ferrous acid bismuth/bismuth titanate laminated construction electric capacity and preparation method thereof; The patent No. is: ZL200710175793.0), concrete steps are following:
8-11) the said BLT precursor sol of preparation:
11-1) 0.536g lanthanum nitrate (commercially available prod) is dissolved in the organic solution that 20ml EGME (commercially available prod) is mixed with consoluet lanthanum;
11-2) 15.422g caproic acid bismuth (commercially available prod) is dissolved in 25ml caproic acid (commercially available prod) and is made into consoluet caproic acid bismuth solution;
11-3) organic solution with lanthanum adds in the caproic acid bismuth solution, under 60 ℃ of conditions, fully stirs 15 minutes, forms the uniform lanthanum bismuth mixed solution of clarification
11-4) measure isopropyl titanate 4.351g, add slowly in the above-mentioned lanthanum bismuth mixed solution, under 60 ℃ of conditions, fully stirred 20 minutes, form the uniform BLT dope of clarification;
11-5) in the BLT dope, add propyl alcohol and be diluted to 150ml, its concentration is 0.025mol/l, under 60 ℃ of conditions, stirs 40 minutes, until the clarification of BLT solution evenly;
11-6) using the aperture is that the filter of 0.2 μ m is filtered solution into drop bottle, obtains the BLT precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill the BLT precursor sol that can obtain being used to get rid of film in about 6 days.
8-12) the said BLT ferroelectric thin film of preparation:
12-1) on the separator dielectric film that step (7) forms, utilize the method for spin coating to apply one deck BLT precursor colloidal sol, the high speed centrifugation rotation forms skim BLT ferroelectric thin film, and even glue rotating speed is: 3500 rev/mins, the time is: 60 seconds
12-2) place it in and carry out preceding baking on the hot plate, pre-bake temperature is: 250 ℃, the time is: 10 minutes
12-3) again with its pyrolysis, pyrolysis temperature is: 250 ℃, the time is: 10 minutes
12-4) repeat above process, obtaining thickness is the BLT film of 200nm
12-5) in 650 ℃ of oxygen atmospheres, carry out subsequent annealing afterwards, crystallization time is 20 minutes, obtains BLT ferroelectric thin film 25
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 180nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 35nm/ minute;
(11) the 5th photoetching form contact hole
Utilize the substrate etching separator dielectric film after ion beam etching (IBE) is handled step (10) also to utilize the wet etching ferroelectric thin film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching separator dielectric film speed is: 2nm/ minute; Etching ferroelectric thin film speed is: 60nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 1000nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional positive glue to peel off Al technology, step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 430 ℃ of nitrogen (N 2) in carried out annealing in process 30 minutes.
Embodiment 5 present embodiments are a kind of ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method thereof
The separator medium of present embodiment is: Hf-Al-O; Ferroelectric thin film layer is: (Bi 0.9Sm 0.1) (Fe 0.9Mn 0.1) O 3(being BSFM), (Bi+Sm): (Fe+Mn): O=1: 1: 3, Bi: Sm=0.9: 0.1, Fe: Mn=0.9: 0.1.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 650nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) inject, form source-drain area, inject energy and dosage and be respectively 60KeV, 4.0 * 10 15(cm -3) (common process);
Substrate 21 is a p type silicon, and the source region is n +District 22, the drain region is n +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF +) inject, form substrate contact region 29; Inject energy and dosage and be respectively 70KeV, 4.0 * 10 15(cm -3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 600nm, in nitrogen, substrate is carried out densification 30 minutes afterwards, and temperature is 850 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron ( 11B +) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 40KeV, 2.0 * 10 12(cm -3)
(7) growth separator dielectric film
Utilize preparation Hf-Al-O separator dielectric film 24 on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled; The reaction source of preparation Hf-Al-O film is HfCl 4/ H 2O and TMA (Trimethylaluminium C 3H 9Al), reaction temperature is: 150 ℃, film thickness is: 5nm;
(8) growth ferroelectric thin film
Utilize metal oxide deposition (MOD) method preparation BSFM ferroelectric thin film 25 on the separator dielectric film that step (7) forms, concrete steps are following:
8-21) the preparation of BSFM precursor colloidal sol.
21-1) 0.049g acetic acid samarium (commercially available prod) is dissolved in 8ml acetate (commercially available prod) and is mixed with consoluet acetic acid samarium solution;
21-2) 0.633g bismuth acetate (commercially available prod) is dissolved in 12ml glacial acetic acid (commercially available prod), under 40 ℃ of conditions, fully stirred 10 minutes, bismuth acetate is dissolved fully form bismuth acetate solution;
21-3) acetic acid neodymium solution is added in the bismuth acetate solution, under 25 ℃ of conditions, fully stirred 30 minutes, form the uniform neodymium bismuth mixed solution A of clarification;
21-4) 0.04g manganese acetate (commercially available prod) is dissolved in the 7ml glacial acetic acid (commercially available prod), makes it be dissolved into the acetum of manganese fully;
21-5) 0.248g ethanol iron (commercially available prod) is dissolved in the 11ml EGME (commercially available prod), makes it be dissolved into the organic solution of iron fully;
21-6) acetum with manganese adds in the iron-containing liquor, under 25 ℃ of conditions, fully stirs 30 minutes, to form the mixed solution B that clarification contains niobium and iron uniformly;
21-7) mixed solution A and mixed solution B are mixed, under 30 ℃ of conditions, fully stirred 60 minutes, to form the uniform BSFM mixed solution of clarification;
21-8) 15ml acetate (commercially available prod) added in the above-mentioned BSFM mixed solution dilute, and add the 7ml EGME and regulate viscosity, under 25 ℃ of conditions, stirred 60 minutes, until form uniformly, the moderate BSFM solution of viscosity; Its concentration range is 0.05mol/l;
21-9) using the aperture is that the filter of 0.2 μ m is filtered solution into drop bottle, obtains the BSFM precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill and can obtain BSFM colloidal sol in about 5 days.
8-22) the preparation of BSFM ferroelectric thin film.
22-1) utilize the method for spin coating to apply one deck BSFM precursor colloidal sol after, the high speed centrifugation rotation forms skim BSFM ferroelectric thin film, even glue rotating speed is: 3000 rev/mins; Time is: 100 seconds;
22-2) said film is placed on carries out preceding baking on the hot plate, pre-bake temperature is: 150 ℃, the time is: 10 minutes;
22-3) again the film after the preceding baking is carried out pyrolysis, pyrolysis temperature is: 300 ℃, the time is: 15 minutes;
22-4) repeating step 21)-step 23), till the BSFM film reaches preset thickness;
22-5) then with this film at 500 ℃, carry out subsequent annealing in the oxygen atmosphere, crystallization time is 30 minutes, obtains BSFM ferroelectric thin film 26, thickness is 100nm.
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 150nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 60nm/ minute;
(11) the 5th photoetching form contact hole
Utilize the substrate etching separator dielectric film after ion beam etching (IBE) is handled step (10) also to utilize the wet etching ferroelectric thin film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching separator dielectric film speed is: 1.5nm/ minute; Etching ferroelectric thin film speed is: 100nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 800nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional wet etching Al, step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 420 ℃ of nitrogen (N 2) in carried out annealing in process 20 minutes.
Embodiment 6 present embodiments are a kind of ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method thereof
The separator medium of present embodiment is: HfO 2Ferroelectric thin film layer is: (Bi 0.95Nd 0.05) (Fe 0.85Mn 0.15) O 3(being BNFM), the molar ratio of each component is: (Bi+Nd): (Fe+Mn): O=1: 1: 3, Bi: Nd=0.95: 0.05, Fe: Mn=0.85: 0.15.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 650nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) inject, form source-drain area, inject energy and dosage and be respectively 60KeV, 4.0 * 10 15(cm -3) (common process);
Substrate 21 is a p type silicon, and the source region is n +District 22, the drain region is n +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF +) inject, form substrate contact region 29; Inject energy and dosage and be respectively 75KeV, 4.3 * 10 15(cm -3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 650nm, in nitrogen, substrate is carried out densification 30 minutes afterwards, and temperature is 880 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron ( 11B +) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 45KeV, 6.0 * 10 12(cm -3)
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare HfO 2 Separator dielectric film 24; Preparation HfO 2The reaction source of film is TEMAH (Hf [N (CH 3) (C 2H 5)] 4), reaction temperature is: 100 ℃, film thickness is: 6nm;
(8) growth ferroelectric thin film
Utilize metal oxide deposition (MOD) method preparation BNFM ferroelectric thin film 25 on the separator dielectric film that step (7) forms, concrete steps are following:
8-21) the preparation of BNFM precursor colloidal sol.
21-1) 0.024g acetic acid neodymium (commercially available prod) is dissolved in 5ml monoethanolamine (commercially available prod) and is mixed with consoluet acetic acid neodymium solution;
21-2) 0.668g bismuth acetate (commercially available prod) is dissolved in 15ml glacial acetic acid (commercially available prod), under 40 ℃ of conditions, fully stirred 10 minutes, bismuth acetate is dissolved fully form bismuth acetate solution;
21-3) acetic acid neodymium solution is added in the bismuth acetate solution, under 25 ℃ of conditions, fully stirred 30 minutes, form the uniform neodymium bismuth mixed solution A of clarification;
21-4) 0.06g manganese acetate (commercially available prod) is dissolved in the 8ml glacial acetic acid (commercially available prod), makes it be dissolved into the acetum of manganese fully;
21-5) 0.234g ethanol iron (commercially available prod) is dissolved in the 10ml EGME (commercially available prod), makes it be dissolved into the organic solution of iron fully;
21-6) acetum with manganese adds in the iron-containing liquor, under 25 ℃ of conditions, fully stirs 30 minutes, to form the mixed solution B that clarification contains niobium and iron uniformly;
21-7) mixed solution A and mixed solution B are mixed, under 30 ℃ of conditions, fully stirred 60 minutes, to form the uniform BNFM mixed solution of clarification;
21-8) 15ml acetate (commercially available prod) added in the above-mentioned BNFM mixed solution dilute, and add the 7ml EGME and regulate viscosity, under 25 ℃ of conditions, stirred 60 minutes, until form uniformly, the moderate BNFM solution of viscosity; Its concentration range is 0.05mol/l;
21-9) using the aperture is that the filter of 0.2 μ m is filtered solution into drop bottle, obtains the BNFM precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill and can obtain BNFM colloidal sol in about 5 days.
8-22) the preparation of BNFM ferroelectric thin film.
22-1) utilize the method for spin coating to apply one deck BNFM precursor colloidal sol after, the high speed centrifugation rotation forms skim BNFM ferroelectric thin film, even glue rotating speed is: 3000 rev/mins; Time is: 100 seconds;
22-2) said film is placed on carries out preceding baking on the hot plate, pre-bake temperature is: 150 ℃, the time is: 10 minutes;
22-3) again the film after the preceding baking is carried out pyrolysis, pyrolysis temperature is: 300 ℃, the time is: 15 minutes;
22-4) repeating step 21)-step 23), till the BNFM film reaches preset thickness;
22-5) then with this film at 500 ℃, carry out subsequent annealing in the oxygen atmosphere, crystallization time is 30 minutes, obtains BNFM ferroelectric thin film 26, thickness is 100nm.
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 180nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 35nm/ minute;
(11) the 5th photoetching form contact hole
Utilize the substrate etching separator dielectric film after ion beam etching (IBE) is handled step (10) also to utilize the wet etching ferroelectric thin film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching separator dielectric film speed is: 1.5nm/ minute; Etching ferroelectric thin film speed is: 60nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 1000nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional positive glue to peel off Al technology, step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 430 ℃ of nitrogen (N 2) in carried out annealing in process 30 minutes.
Embodiment 7 present embodiments are that the separator medium of a kind of ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method thereof present embodiment is: TiO 2Ferroelectric thin film layer is: (Bi 0.95Nd 0.05) (Fe 0.95Nb 0.05) O 3(being BNFN), the molar ratio of each component is: (Bi+Nd): (Fe+Nb): O=1: 1: 3, Bi: Nd=0.95: 0.05, Fe: Nb=0.95: 0.05.
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is n type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 700nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake 30 minutes, wet etching, stay glue boron phosphorus ( 11B + 31P +) inject, form source-drain area, inject energy and dosage and be respectively 70KeV, 4.2 * 10 15(cm -3) (common process);
Substrate 21 is a n type silicon, and the source region is p +District 22, the drain region is p +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) inject, form substrate contact region 29; Inject energy and dosage and be respectively 75KeV, 4.3 * 10 15(cm -3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 650nm, in nitrogen, substrate is carried out densification 30 minutes afterwards, and temperature is 880 ℃;
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 45KeV, 6.0 * 10 12(cm -3)
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare TiO 2 Separator dielectric film 24; Preparation TiO 2The reaction source of film is TiCl 4/ H 2O, reaction temperature is: 200 ℃, film thickness is: 7nm;
(8) growth ferroelectric thin film
8-21) the preparation of BNFN precursor colloidal sol.
21-1) 0.122g acetic acid neodymium (commercially available prod) is dissolved in 5ml monoethanolamine (commercially available prod) and is mixed with consoluet acetic acid neodymium solution;
21-2) 3.334 bismuth acetates (commercially available prod) are dissolved in 20ml glacial acetic acid (commercially available prod), under 60 ℃ of conditions, fully stirred 10 minutes, bismuth acetate is dissolved fully form bismuth acetate solution;
21-3) acetic acid neodymium solution is added in the bismuth acetate solution, under 60 ℃ of conditions, fully stirred 20 minutes, form the uniform neodymium bismuth mixed solution A of clarification;
21-4) 0.12g ethanol niobium (commercially available prod) is dissolved in the 5ml EGME (commercially available prod), makes it be dissolved into the organic solution of niobium fully;
21-5) 1.306g ethanol iron (commercially available prod) is dissolved in the 10ml EGME (commercially available prod), makes it be dissolved into the organic solution of iron fully;
21-6) organic solution with niobium adds in the iron-containing liquor, under 60 ℃ of conditions, fully stirs 20 minutes, to form the mixed solution B that clarification contains niobium and iron uniformly;
21-7) mixed solution A and mixed solution B are mixed, under 60 ℃ of conditions, fully stirred 40 minutes, to form the uniform BNFN mixed solution of clarification;
21-8) 15ml acetate (commercially available prod) added in the above-mentioned BNFN mixed solution dilute, and add the 5ml EGME and regulate viscosity, under 60 ℃ of conditions, stirred 50 minutes, until form uniformly, the moderate BNFN solution of viscosity; Its concentration range is 0.25mol/l;
21-9) using the aperture is that the filter of 0.2 μ m is filtered solution into drop bottle, obtains the BNFN precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill and can obtain BNFN colloidal sol in about 7 days.
8-22) the preparation of BNFN ferroelectric thin film.
22-1) utilize the method for spin coating to apply one deck BNFN precursor colloidal sol after, the high speed centrifugation rotation forms skim BNFN ferroelectric thin film, even glue rotating speed is: 3500 rev/mins; Time is: 60 seconds;
22-2) said film is placed on carries out preceding baking on the hot plate, pre-bake temperature is: 220 ℃, the time is: 8 minutes;
22-3) again the film after the preceding baking is carried out pyrolysis, pyrolysis temperature is: 350 ℃, the time is: 10 minutes;
22-4) repeating step 21)-step 23), till the BNFN film reaches preset thickness;
22-5) then with this film at 600 ℃, carry out subsequent annealing in the nitrogen atmosphere, crystallization time is 20 minutes, obtains BNFN ferroelectric thin film 26, thickness is 220nm.
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 180nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 35nm/ minute;
(11) the 5th photoetching form contact hole
Utilize the substrate etching separator dielectric film after ion beam etching (IBE) is handled step (10) also to utilize the wet etching ferroelectric thin film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching separator dielectric film speed is: 1.5nm/ minute; Etching ferroelectric thin film speed is: 60nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 1000nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional positive glue to peel off Al technology, step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 430 ℃ of nitrogen (N 2) in carried out annealing in process 30 minutes.
Embodiment 8 present embodiments are a kind of ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method thereof
The separator medium of present embodiment is: Al 2O 3Ferroelectric thin film layer is: (Bi 0.85La 0.15) (Fe 0.95Nb 0.05) O 3(being BLFN), the molar ratio of each component is: (Bi+La): (Fe+Nb): O=1: 1: 3, Bi: La=0.85: 0.15, Fe: Nb=0.95: 0.05.(rare earth element in the present embodiment and also available Pr or Gd replacement, also available Co of transition elements or Ni replacement).
The preparation method of present embodiment may further comprise the steps;
(1) silicon substrate is cleaned; Substrate 21 is p type silicon (this step is a conventional process);
(2) silicon substrate 21 is carried out oxidation, the oxide layer of on the silicon substrate after the cleaning, growing, oxidated layer thickness is 650nm;
(3) photoetching for the first time forms source-drain area
Silicon substrate 21 carries out photoetching after adopting positive adhesive process to oxidation, post bake 30 minutes, wet etching, stay glue phosphorus ( 31P +) inject, form source-drain area, inject energy and dosage and be respectively 60KeV, 4.0 * 10 15(cm -3) (common process);
Substrate 21 is a p type silicon, and the source region is n +District 22, the drain region is n +District 23;
(4) photoetching for the second time forms substrate contact region
Adopt the silicon substrate 21 after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake 30 minutes, wet etching stays glue boron (BF +) inject, form substrate contact region 29; Inject energy and dosage and be respectively 75KeV, 4.3 * 10 15(cm -3) (common process)
(5) growth oxide layer
Utilize low-pressure chemical vapor deposition (LPCVD) that the substrate behind the Twi-lithography is carried out oxidation (common process), oxidated layer thickness is 650nm, in nitrogen, substrate is carried out densification 30 minutes afterwards, and temperature is 880 ℃.
(6) photoetching for the third time forms the grid region
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake 30 minutes, wet etching, stay glue boron ( 11B +) transfer ditch to inject, form the grid region; Transfer ditch injection energy and dosage to be respectively 45KeV, 6.0 * 10 12(cm -3);
(7) growth separator dielectric film
Utilize on the substrate of technique for atomic layer deposition (ALD) after step (6) is handled and prepare Al 2O 3 Separator dielectric film 24; Preparation Al 2O 3The reaction source of film is TMA (Trimethylaluminium C 3H 9Al), reaction temperature is: 150 ℃, film thickness is: 8nm;
(8) growth ferroelectric thin film
Utilize metal oxide deposition (MOD) method preparation BLFN ferroelectric thin film 25 on the separator dielectric film that step (7) forms, technology of preparing can (patent name be: ferrous acid bismuth/bismuth titanate laminated construction electric capacity and preparation method thereof with reference to obtaining the power patent; The patent No. is: ZL200710175793.0), concrete steps are following:
8-21) the preparation of BLFN precursor colloidal sol.
21-1) 0.732g lanthanum acetate (commercially available prod) is dissolved in 5ml monoethanolamine (commercially available prod) and is mixed with consoluet acetic acid neodymium solution;
21-2) 5.961 bismuth acetates (commercially available prod) are dissolved in 25ml glacial acetic acid (commercially available prod), under 40 ℃ of conditions, fully stirred 10 minutes, bismuth acetate is dissolved fully form bismuth acetate solution;
21-3) lanthanum acetate solution is added in the bismuth acetate solution, under 25 ℃ of conditions, fully stirred 30 minutes, form the uniform neodymium bismuth mixed solution A of clarification;
21-4) 0.02g ethanol niobium (commercially available prod) is dissolved in the 5ml glacial acetic acid (commercially available prod), makes it be dissolved into the organic solution of niobium fully;
21-5) 0.262g ethanol iron (commercially available prod) is dissolved in the 10ml EGME (commercially available prod), makes it be dissolved into the organic solution of iron fully;
21-6) organic solution with niobium adds in the iron-containing liquor, under 25 ℃ of conditions, fully stirs 30 minutes, to form the mixed solution B that clarification contains niobium and iron uniformly;
21-7) mixed solution A and mixed solution B are mixed, under 30 ℃ of conditions, fully stirred 60 minutes, to form the uniform BLFN mixed solution of clarification;
21-8) 10ml acetate (commercially available prod) added in the above-mentioned BLFN mixed solution dilute, and add the 5ml EGME and regulate viscosity, under 25 ℃ of conditions, stirred 60 minutes, until form uniformly, the moderate BLFN solution of viscosity; Its concentration range is 0.5mol/l;
21-9) using the aperture is that the filter of 0.3 μ m is filtered solution into drop bottle, obtains the BLFN precursor solution of homogeneous transparent, puts into refrigerator cold-storage and leaves standstill and can obtain BLFN colloidal sol in about 10 days.
8-22) the preparation of BLFN ferroelectric thin film.
22-1) utilize the method for spin coating to apply one deck BLFN precursor colloidal sol after, the high speed centrifugation rotation forms skim BLFN ferroelectric thin film, even glue rotating speed is: 4500 rev/mins; Time is: 20 seconds;
22-2) said film is placed on carries out preceding baking on the hot plate, pre-bake temperature is: 300 ℃, the time is: 5 minutes;
22-3) again the film after the preceding baking is carried out pyrolysis, pyrolysis temperature is: 400 ℃, the time is: 5 minutes;
22-4) repeating step 21)-step 23), till the BLFN film reaches preset thickness;
22-5) then with this film at 650 ℃, carry out subsequent annealing in the nitrogen atmosphere, crystallization time is 15 minutes, obtains BLFN ferroelectric thin film 26, thickness is 400nm.
(9) preparation electrode metal layer (common process step)
Sputtering electrode metal level on the ferroelectric thin film that step (8) forms, electrode material is: platinum Pt, thickness is about: 180nm;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching (IBE) technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode 26, etch rate is: 35nm/ minute;
(11) the 5th photoetching form contact hole
Utilize the substrate etching separator dielectric film after ion beam etching (IBE) is handled step (10) also to utilize the wet etching ferroelectric thin film, form respectively with substrate in the hole that contacts of source region 22, drain region 23 and substrate contact region 29; Wherein, etching separator dielectric film speed is: 1.5nm/ minute; Etching ferroelectric thin film speed is: 60nm/ minute;
(12) preparation metal level (common process step)
To carrying out normal temperature splash-proofing sputtering metal aluminium (Al) on the substrate after step (11) processing, thickness is about: 1000nm.
(13) the 6th photoetching (Al) form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional positive glue to peel off Al technology, step (12) is handled the back metal level carry out photoetching and etching, form the source metal 27, drain metal layer 28 and the substrate contact electrode metal level 30 that contact with source region 22, drain region 23 and substrate contact region 29 respectively;
(14) Alloying Treatment (common process step)
Substrate after step (13) handled is at 430 ℃ of nitrogen (N 2) in carried out annealing in process 30 minutes.

Claims (3)

1. the ferroelectric dynamic random access memory based on atomic layer deposited isolating layer comprises: silicon substrate, source region, drain region, separator deielectric-coating, ferroelectric thin film layer, gate electrode, source electrode, drain electrode, and the substrate contact region and the substrate contact electrode that are used for the device measurement; In silicon substrate, form the source region, drain region and substrate contact region, formation separator deielectric-coating forms ferroelectric thin film layer on the separator deielectric-coating on silicon substrate, on ferroelectric thin film layer, forms gate electrode; Source electrode and the both sides of drain electrode in gate electrode (26); It is characterized in that said separator deielectric-coating is: HfO 2, Hf-Al-O, TiO 2, Al 2O 3In any one; Said ferroelectric thin film layer is any one among BXT or the BXFY: the X among the said BXT is Doped Rare Earth element La, Nd, Sm; Pr; Among the Gd any one, the molar ratio of each component is among the BXT: Bi: X: Ti: O=(4-x): x: 3: 12, the x value was in the scope of 0.1<x<1.0; Bi among the said BXT is with respect to component formula: Bi 4-xX xTi 3O 12The mole percent scope that excessive interpolation, the superfluous content of this Bi element account for Bi, X and Ti element total amount is 5%≤Bi≤20%;
X among the said BXFY is Doped Rare Earth element La, Nd, and Sm, Pr, any one among the Gd, Y are transition metal Mn, Nb, Co, any one among the Ni; The molar ratio of each component is: (Bi+X): (Fe+Y): O=1: 1: 3, and Bi: X=(1-x): x, Fe: Y=(1-y): y, wherein, 0.01<x<0.2,0.01<y<0.2.
2. ferroelectric dynamic random access memory as claimed in claim 1 is characterized in that, said BXT film thickness is 100nm~400nm; Said BXFY film thickness is 100nm~400nm.
3. one kind prepares the method for ferroelectric dynamic random access memory according to claim 1, it is characterized in that, may further comprise the steps:
(1) silicon substrate is cleaned;
(2) oxide layer of on the silicon substrate after the cleaning, growing:
(3) photoetching for the first time forms source-drain area;
Silicon substrate carries out photoetching after adopting positive adhesive process to oxidation, post bake, and wet etching stays glue phosphorus to inject or boron injects, and forms source-drain area, injects energy and dosage and is respectively 60~80KeV, 4.0 * 10 15~5.0 * 10 15Cm -3
(4) photoetching for the second time forms substrate contact region:
Adopt the silicon substrate after positive adhesive process is handled step (3) to carry out the photoetching second time, post bake, wet etching stays glue boron to inject or phosphorus injects, and forms substrate contact region; Inject energy and dosage and be respectively 70~80KeV, 4.0 * 10 15~5.0 * 10 15Cm -3
(5) growth oxide layer:
Substrate after utilizing low-pressure chemical vapor deposition to Twi-lithography carries out the oxidation second time, and oxidated layer thickness is 600~700nm, in nitrogen, substrate is carried out densification afterwards, and temperature is 850-900 ℃;
(6) photoetching for the third time forms the grid region:
Adopt the substrate after positive adhesive process is handled step (5) to carry out photoetching, post bake, wet etching stays glue boron to transfer ditch to inject or phosphorus transfers ditch to inject, and forms the grid region; Transfer ditch injection energy and dosage to be respectively 40~50KeV, 2.0 * 10 12~8.0 * 10 13Cm -3
(7) growth separator dielectric film:
Utilize on the substrate of technique for atomic layer deposition after step (6) is handled and prepare HfO 2, Hf-Al-O, TiO 2, Al 2O 3In any one separator dielectric film; Reaction temperature is: 100~230 ℃, film thickness is: 5~20nm;
(8) growth ferroelectric thin film:
Utilize metal oxide deposition process preparation BXT ferroelectric thin film on the separator dielectric film that step (7) forms, the BXT film thickness is 100nm~400nm;
Or utilizing the metal oxide deposition process to prepare the BXFY ferroelectric thin film, the BXFY film thickness is 100nm~400nm;
(9) sputtering electrode metal level on the ferroelectric thin film that step (8) forms;
(10) the 4th photoetching form gate electrode:
Utilize ion beam etching IBE technology that the electrode metal layer that step (9) prepares is carried out etching, form gate electrode, etch rate is: 20~60nm/ minute, or adopt positive glue to peel off method formation gate electrode;
(11) the 5th photoetching form contact hole:
Adopt the substrate after positive adhesive process is handled step (10) to carry out photoetching, post bake, the wet etching ferroelectric thin film also utilizes ion beam etching etching separator dielectric film, form respectively with substrate in the hole that contacts of source region, drain region and substrate contact region; Wherein, etching ferroelectric thin film speed is: 20~100nm/ minute; Etching separator dielectric film speed is: 1.5~3nm/ minute;
(12) preparation metal level:
To carrying out normal temperature splash-proofing sputtering metal aluminium on the substrate after step (11) processing, thickness is: 800~1200nm;
(13) the 6th photoetching Al form source electrode, drain electrode and substrate contact metal layer:
Adopt conventional wet etching Al or dry etching Al; Perhaps positive glue is peeled off Al; Step (12) is handled the back metal level carry out photoetching and etching, form the source metal, drain metal layer and the substrate contact electrode metal level that contact with source region, drain region and substrate contact region respectively;
(14) Alloying Treatment:
Substrate to after step (13) processing carried out annealing in process 20~40 minutes in 420 ℃~450 ℃ nitrogen.
CN2010102025772A 2010-06-11 2010-06-11 Ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method Expired - Fee Related CN101872769B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010102025772A CN101872769B (en) 2010-06-11 2010-06-11 Ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010102025772A CN101872769B (en) 2010-06-11 2010-06-11 Ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method

Publications (2)

Publication Number Publication Date
CN101872769A CN101872769A (en) 2010-10-27
CN101872769B true CN101872769B (en) 2012-05-23

Family

ID=42997537

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010102025772A Expired - Fee Related CN101872769B (en) 2010-06-11 2010-06-11 Ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method

Country Status (1)

Country Link
CN (1) CN101872769B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI480417B (en) 2012-11-02 2015-04-11 Ind Tech Res Inst Air showr device having air curtain and apparatus for depositing film using the same
CN107240606B (en) * 2017-06-08 2020-10-23 湘潭大学 Ferroelectric field effect transistor and preparation method thereof
CN107170828B (en) * 2017-06-08 2021-05-18 湘潭大学 Ferroelectric field effect transistor and preparation method thereof
CN112234023B (en) * 2020-12-16 2021-03-16 中国电子科技集团公司第九研究所 Method for improving adhesion of metal film circuit on silicon wafer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6366489B1 (en) * 2000-08-31 2002-04-02 Micron Technology, Inc. Bi-state ferroelectric memory devices, uses and operation
US6691251B2 (en) * 2000-11-30 2004-02-10 Palmsource, Inc. On-chip debugging system emulator
CN100466320C (en) * 2007-02-12 2009-03-04 清华大学 Nd-doped Bi4Ti3O12 ferroelectric thin film for the ferroelectric memory and its low temperature preparation method
WO2009054707A2 (en) * 2007-10-26 2009-04-30 University Of Seoul Industry Cooperation Foundation Mfms-fet, ferroelectric memory device, and methods of manufacturing the same

Also Published As

Publication number Publication date
CN101872769A (en) 2010-10-27

Similar Documents

Publication Publication Date Title
CN101894843B (en) Ferroelectric dynamic random access memory based on lead zirconate titanate memory medium and preparation method thereof
CN107134487B (en) Ferroelectric gate structure based on hafnium oxide and preparation process thereof
Lou Polarization fatigue in ferroelectric thin films and related materials
CN100502038C (en) Transistor type ferroelectric memory and method of manufacturing the same
US20150087130A1 (en) DRAM MIM Capacitor Using Non-Noble Electrodes
CN100466320C (en) Nd-doped Bi4Ti3O12 ferroelectric thin film for the ferroelectric memory and its low temperature preparation method
Liu et al. Endurance properties of silicon-doped hafnium oxide ferroelectric and antiferroelectric-like thin films: A comparative study and prediction
CN102222672B (en) Bismuth ferrite base film layer stacked structure capacitor and preparation method thereof
CN107452742B (en) Method for manufacturing semiconductor ferroelectric memory device and semiconductor ferroelectric memory transistor
CN100527420C (en) Bismuth ferric/bismuth titanate laminated construction electric capacity and method for preparing the same
WO2003049172A1 (en) Lanthanide series layered superlattice materials for integrated circuit applications
CN101872769B (en) Ferroelectric dynamic random access memory based on atomic layer deposited isolating layer and preparation method
TWI765812B (en) Ferroelectric capacitor, ferroelectric memory and method for manufacturing same
CN101872768B (en) Ferroelectric dynamic random storage based on bismuth based storage materials and preparation method thereof
Popovici et al. High-endurance ferroelectric (La, Y) and (La, Gd) Co-doped hafnium zirconate grown by atomic layer deposition
Ali et al. Impact of ferroelectric wakeup on reliability of laminate based Si-doped hafnium oxide (HSO) FeFET memory cells
Kim et al. Impact of annealing temperature on the remanent polarization and tunneling electro-resistance of ferroelectric Al-doped HfO x tunnel junction memory
CN101262040A (en) Oxide lanthanon magnetic semiconductor/ferroelectric heterogeneous structure and its making method
CN101894844B (en) Ferroelectric dynamic random memory based on metal oxide vapor phase deposition and preparation method thereof
CN1319256A (en) Ferroelectric thin film of reduced tetragonality
Tan et al. Diode-like rectification characteristics of BiFeO3-based/Zn1-xNixFe2O4 bilayered films for application of ferroelectric field effect transistors
De Araujo et al. The future of ferroelectric memories
JP3924928B2 (en) Ferroelectric material and ferroelectric memory
KR102571133B1 (en) Manufacturing method of ferroelectric device and ferroelectric device
KR102399957B1 (en) Manufacturing method of ferroelectric thin film and the same manufactured thereby

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120523

Termination date: 20180611