Summary of the invention
Amorphous silicon of the present invention/silicon/crystalline silicon heterojunction solar battery preparation method may further comprise the steps:
(1) cleans twin polishing p (n) type monocrystalline silicon piece with the RCA method;
(2) with the SA-6070 aluminium paste as raw material, at the above-mentioned monocrystalline silicon piece back side silk screen printing aluminium paste that cleaned, then under logical oxygen condition, 700 ℃ ± 20 ℃ rapid thermal annealing 1~2min are formed with the metal A l back electrode of ohmic contact;
(3) clean p (n) the type monocrystalline silicon piece that has aluminum back electrode with 1%~2%HF solution, behind a large amount of deionized water rinsings, put into corrosive liquid and carry out the matte preparation, take out monocrystalline silicon piece after corrosion is no less than 25min, and use a large amount of deionized water rinsings;
(4) will put into the PECVD vacuum chamber through the air-dry monocrystalline silicon piece of nitrogen rapidly, vacuum chamber base vacuum degree is 3~6 * 10
-4Pa uses NH
3Handle monocrystalline silicon surface;
(5) being under 200 ℃~220 ℃ conditions at silicon temperature, is reacting gas with silane, above-mentioned through NH
3Deposit thickness is the intrinsic amorphous silicon film of 5~10nm on p (n) the type monocrystalline silicon piece of handling;
(6) be reacting gas with phosphine and silane or borine and silane, on above-mentioned intrinsic amorphous silicon film/p (n) type monocrystalline silicon, deposit thickness is n (p) the type doped amorphous silicon film of 18~25nm;
(7) deposit thickness is 80~100nm on said n (p) type doped amorphous silicon film/intrinsic amorphous silicon film/p (n) type monocrystalline silicon, and transmitance 〉=85%, square resistance are the transparent conductive film of 30~50 Ω;
(8) preparation Ag grid on above-mentioned nesa coating.
Compare with prior art, amorphous silicon/silicon/crystalline silicon heterojunction solar battery of the present invention and preparation method thereof has following characteristics and advantage:
1, the present invention compares with international heterojunction industrialization doped amorphous silicon/intrinsic amorphous silicon/crystal silicon/intrinsic amorphous silicon/doped amorphous silicon solar battery structure, and the battery structure of employing is simple, and process is simple.
2, utilize NH3 to handle monocrystalline silicon surface, reduce the interface gap state density, effectively improve interface quality.
3, battery structure of the present invention is compared with heterojunction industrialization solar battery structure, adopt the silk screen printing rapid thermal annealing to form aluminum back electrode, replaced depositing overleaf highly doped amorphous silicon membrane, avoided different doping types bring in the double-sided deposition process cross pollution and interfacial failure, be easy to realize.
4, the present invention adopts suede structure, can increase light light path in cell body, improves the absorption of battery to light.
5 implementation methods of the present invention are simply unique, are easy to grasp, and are easy to operate, can repeat, with low cost, have clear and definite commercial application prospect.
Embodiment
Below will the present invention will be described in detail by specific embodiment.
Embodiment 1
1, before the cell preparation, adopt standard electric sub level cleaning step to clean twin polishing p type CZ monocrystalline silicon piece, the thickness of monocrystalline silicon piece is 220~250 microns, and resistivity is 1~5 Ω cm;
2, with the SA-6070 aluminium paste as raw material, at the above-mentioned monocrystalline silicon piece back side silk screen printing aluminium paste that cleaned, then under logical oxygen condition, 700 ℃ ± 20 ℃ rapid thermal annealing 1min30s are formed with the metal A l back electrode of ohmic contact;
3, clean p (n) the type monocrystalline silicon piece of existing aluminum back electrode with 1%HF solution, behind a large amount of deionized water rinsings, put into the corrosive liquid that is made into 70gKOH, 190ml isopropyl alcohol and 40ml deionized water and carry out the matte preparation, take out monocrystalline silicon piece behind the corrosion 30min, and use a large amount of deionized water rinsings;
4, will put into the PECVD vacuum chamber through the air-dry monocrystalline silicon piece of nitrogen rapidly, reach 3 * 10 at the vacuum chamber background vacuum pressure
-4During Pa, use NH
3Handle monocrystalline silicon surface;
5, being under 200 ℃ of conditions at silicon temperature, is reacting gas with silane, above-mentioned through NH
3On p (n) the type monocrystalline silicon piece of handling, adopting plasma-reinforced chemical vapor deposition deposition techniques thickness is the intrinsic amorphous silicon film of 8nm;
6, being reacting gas with silane and phosphine, on above-mentioned intrinsic amorphous silicon film/p (n) type monocrystalline silicon, is n (p) the type doped amorphous silicon film of 22nm with plasma reinforced chemical vapour deposition thickness;
7, deposit thickness is 100nm on said n (p) type doped amorphous silicon film/intrinsic amorphous silicon film/p (n) type monocrystalline silicon, and transmitance 〉=85%, square resistance are the transparent conductive film of 40 Ω;
8, adopt vacuum coating technology, preparation thickness is 10 microns Ag grid, and the grid line width is 150 microns, and grating spacing is 2mm.
According to amorphous silicon/silicon/crystalline silicon heterojunction solar battery that the present embodiment method is made, its structure is followed successively by Al back electrode, p (n) type crystal silicon, intrinsic amorphous silicon, n (p) type amorphous silicon, nesa coating and metal gates as shown in Figure 1; Described metal A l back electrode thickness is 80~100 microns; The thickness of described intrinsic amorphous silicon film is 5~10nm; The thickness of described n (p) type doped amorphous silicon film is 18~25nm; The thickness of described Ag grid is 5~10 microns, and the grid line width is 100~150 microns, and spacing is 2~3mm; Described p (n) type crystal silicon thickness is 220~250 microns.
According to above battery structure and technology path, adopting CZ monocrystalline silicon is substrate, under the situation of texture, obtains 18% photoelectric conversion efficiency.
Embodiment 2
1, before the cell preparation, adopt standard electric sub level cleaning step to clean twin polishing p type CZ monocrystalline silicon piece, the thickness of monocrystalline silicon piece is 220~250 microns, and resistivity is 1~5 Ω cm;
2, with the SA-6070 aluminium paste as raw material, at the above-mentioned monocrystalline silicon piece back side silk screen printing aluminium paste that cleaned, then under logical oxygen condition, 700 ℃ ± 20 ℃ rapid thermal annealing 2min are formed with the metal A l back electrode of ohmic contact;
3, clean p (n) the type monocrystalline silicon piece of existing aluminum back electrode with 2%HF solution, behind a large amount of deionized water rinsings, put into the corrosive liquid that is made into 70gKOH, 190ml isopropyl alcohol and 40ml deionized water and carry out the matte preparation, take out monocrystalline silicon piece behind the corrosion 40min, and use a large amount of deionized water rinsings;
4, will put into the PECVD vacuum chamber through the air-dry monocrystalline silicon piece of nitrogen rapidly, reach 6 * 10 at the vacuum chamber background vacuum pressure
-4During Pa, use NH
3Handle monocrystalline silicon surface;
5, being under 220 ℃ of conditions at silicon temperature, is reacting gas with silane, above-mentioned through NH
3On p (n) the type monocrystalline silicon piece of handling, adopting plasma-reinforced chemical vapor deposition deposition techniques thickness is the intrinsic amorphous silicon film of 10nm;
6, being reacting gas with silane and borine, on above-mentioned intrinsic amorphous silicon film/p (n) type monocrystalline silicon, is n (p) the type doped amorphous silicon film of 18nm with plasma reinforced chemical vapour deposition thickness;
7, deposit thickness is 80nm on said n (p) type doped amorphous silicon film/intrinsic amorphous silicon film/p (n) type monocrystalline silicon, and transmitance 〉=85%, square resistance are the transparent conductive film of 50 Ω;
8, adopt vacuum coating technology, preparation thickness is 5 microns Ag grid, and the grid line width is 100 microns, and grating spacing is 3mm.
Each parameter in the foregoing description can be adjusted in this specification scope of disclosure as required, and its concrete scheme can not be exhaustive, and above embodiment is not because of being interpreted as the present invention is openly reached the restriction of execution mode.