CN101847675A - Light-emitting diode chip with vertical structure and manufacturing method thereof - Google Patents
Light-emitting diode chip with vertical structure and manufacturing method thereof Download PDFInfo
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- CN101847675A CN101847675A CN200910272579A CN200910272579A CN101847675A CN 101847675 A CN101847675 A CN 101847675A CN 200910272579 A CN200910272579 A CN 200910272579A CN 200910272579 A CN200910272579 A CN 200910272579A CN 101847675 A CN101847675 A CN 101847675A
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Abstract
The invention relates to a light-emitting diode chip with a vertical structure and a manufacturing method thereof. The manufacturing method of the light-emitting diode chip with the vertical structure comprises the following steps of: bonding a metal supporting layer on an ohmic contact layer of P-GAN; mechanically lapping a sapphire substrate positioned on the back surface of a wafer; grooving by a laser on a sapphire, and corroding a grooving line through a phosphoric acid and sulfuric acid solution to expose an N-GAN layer; depositing N electrode metal; and finally cutting the wafer to obtain the LED chip, therefore the LED chip manufactured by a comprehensive method of metal supporting layer-mechanical lapping-laser grooving-mixed acid corrosion is in the vertical structure. The invention has the advantages of low thermal resistance, high light extraction efficiency, traditional production equipment utilization in the manufacturing process, high production operability and controllability, reduced production cost and enhanced yield of good products.
Description
Technical field
The present invention relates to a kind of light-emitting diode chip with vertical structure and manufacture method thereof, belong to field of manufacturing semiconductor devices.
Background technology
Light-emitting diode (LED:Light Emitting Diode) show, lighting field has a wide range of applications, semiconductor light-emitting-diode is converted into luminous energy with electric energy, is characterized in that energy consumption is low, life-span length, rich color, processing procedure environmental protection.But because at present photoelectric conversion efficiency still has 80% electric energy to be converted into heat energy still less than 20%, cause after the work of LED luminescent device light decay being arranged, directly influence long-term normal use of LED, solving heat radiation is the most urgent problem of LED industry.The GaN base LED chip has two kinds of basic structures, transversary (Lateral) and vertical stratification (Vertical).The P of the led chip of transversary, N electrode be in the same side of led chip, the electric current distance that lateral flow does not wait in N and P class limitations layer.Two electrodes of the P of the led chip of vertical stratification, N are respectively in the both sides of LED epitaxial loayer and since patterned electrodes and whole P class limitations layer as second electrode, make electric current almost all vertical currents cross the LED epitaxial loayer, the electric current of few lateral flow.Make light emitting diode (LED) chip with vertical structure and adopt laser lift-off growth substrates sapphire or mechanical lapping Sapphire Substrate usually.Laser lift-off growth substrates and epitaxial loayer mainly exist equipment investment big, the operation cost height, and the moment high temperature of laser beam has injury to epitaxial loayer simultaneously, causes the product yield low, the chip cost height; Simple use mechanical lapping, because epitaxy layer thickness is 6-10 μ m, the sapphire of growing epitaxial self has evenness scarcely, the precision of mechanical lapping is about 5 μ m, cause like this: the one, the sapphire terminal point of mechanical lapping is uncontrollable, the 2nd, the inhomogeneities of grinding, the subregion has been ground to N-GaN, the still residual Sapphire Substrate in subregion, therefore the product yield is low, removes the method for Sapphire Substrate as the method for mentioning in the patent 200810033972.5 with mechanical lapping and makes light emitting diode (LED) chip with vertical structure.
Summary of the invention
Making the problem that light emitting diode (LED) chip with vertical structure exists in order to overcome laser lift-off substrate and mechanical lapping substrate, the present invention proposes a kind of light-emitting diode chip with vertical structure and manufacture method thereof, it belongs to the integrated approach of supporting layer-mechanical lapping-laser paddle-tumble-nitration mixture corrosion by nation's deposit, make light emitting diode (LED) chip with vertical structure, reduce production cost, improved the product yield.
Technical scheme of the present invention is: the light emitting diode with vertical structure manufacturing method of chip is characterized in that: comprise following process steps:
A. evaporation metal on the P-GaN layer obtains P electrode ohmic contact layer and reflector layer;
B. belong to as metal supporting layer at above-mentioned metal surface nation deposit;
C. with the mechanical lapping of wafer rear Sapphire Substrate;
D. laser paddle-tumble on sapphire according to doing die size, is adjusted the paddle-tumble spacing, according to the sapphire THICKNESS CONTROL paddle-tumble degree of depth and width;
E. use sulfuric acid+phosphoric acid solution, the corrosion Cutting Road in the control time, erodes to the N-GaN layer;
F. make the N electrode on the wafer rear sapphire, a part of N electrode is directly contacted with the N-GaN layer, bottom this part electrode covering paddle-tumble, another part electrode comprises that N electrode pad N-PAD and Sapphire Substrate adhere to;
G. cut into the chip of required size.
Aforesaid light emitting diode with vertical structure manufacturing method of chip is characterized in that: nation's deposit belongs to the thickness of supporting layer at 30-80 μ m.
Aforesaid light emitting diode with vertical structure manufacturing method of chip is characterized in that: the mechanical lapping Sapphire Substrate, making residue sapphire layer thickness is 25-50 μ m.
Aforesaid light emitting diode with vertical structure manufacturing method of chip is characterized in that: the laser paddle-tumble is 27-50 μ m according to sapphire THICKNESS CONTROL paddle-tumble deeply, and width is 30-60 μ m.
Aforesaid light emitting diode with vertical structure manufacturing method of chip is characterized in that: use phosphoric acid+sulfuric acid high temperature to corrode paddle-tumble down at 150-300 ℃.
Aforesaid light emitting diode with vertical structure manufacturing method of chip is characterized in that: metal supporting layer nation decides mode and comprises plating or eutectic.
Light-emitting diode chip with vertical structure comprises P-GaN layer, quantum well layer, N-GaN layer, resilient coating, Sapphire Substrate, and they connect successively, it is characterized in that: also comprise P electrode ohmic contact layer, reflector layer, metal supporting layer, N electrode and paddle-tumble; P electrode ohmic contact layer and reflector layer are arranged on the P-GaN layer, it is 30-80 μ m metal supporting layer that ohmic contact laminar surface nation decides thickness, crisscross paddle-tumble is marked on surface in 25-50 μ m Sapphire Substrate, the degree of depth of these paddle-tumbles is at 27-50 μ m, width 30-60 μ m, the paddle-tumble bottom is the N-GaN layer; Make the N electrode on the wafer rear sapphire, part N electrode metal contacts with the N-GaN layer of paddle-tumble bottom, and most of N electrode directly contacts with Sapphire Substrate.
The invention has the beneficial effects as follows: the present invention can use the existing equipment of general led chip manufacturing works, need not to acquire expensive laser lift-off equipment, and various parameters is adjustable in the production process, are convenient to go out with low-cost production the LED of vertical stratification; Made light emitting diode (LED) chip with vertical structure has the advantage that light-emitting area is big, thermal resistance is low, brightness is high on year-on-year basis.
Description of drawings
Fig. 1 is an embodiment of the invention GaN base wafer schematic cross-section.
Fig. 2 is an embodiment of the invention GaN base chip metal supporting layer schematic cross-section.
Fig. 3 is a schematic cross-section behind the GaN base wafer attenuate.
Fig. 4 is a schematic cross-section behind the GaN base wafer laser paddle-tumble.
Fig. 5 is a GaN base LED chip back side N electrode vertical view.
Embodiment
The present invention is described further below in conjunction with drawings and Examples.
The explanation of mark among Fig. 1: 1-P-GaN layer, 2-quantum well layer, 3-N-GaN layer, 4-resilient coating, 5-Sapphire Substrate.
The explanation of mark among Fig. 2: 6-metal supporting layer.
The explanation of mark among Fig. 4: 7-laser paddle-tumble and N electrode metal.
The explanation of mark among Fig. 5: 8-N electrode, 9-paddle-tumble.
Embodiment of the invention light-emitting diode chip with vertical structure comprises P-GaN layer 1, quantum well layer 2, N-GaN layer 3, resilient coating 4, Sapphire Substrate 5, P electrode ohmic contact layer, reflector layer, metal supporting layer 6, N electrode 8 and paddle-tumble 9; P-GaN layer 1, quantum well layer 2, N-GaN layer 3, resilient coating 4 and Sapphire Substrate 5 are connected successively, P electrode ohmic contact layer and reflector layer are arranged on the P-GaN layer 1, it is 30-80 μ m metal supporting layer 6 that ohmic contact laminar surface nation decides thickness, mark the crisscross paddle-tumble 9 of definite shape on the surface of 25-50 μ m Sapphire Substrate 5, the degree of depth of these paddle-tumbles 9 is at 27-50 μ m, width 30-60 μ m, paddle-tumble 9 bottoms are N-GaN layer 3; Make N electrode 8 on the wafer rear sapphire, part N electrode metal contacts with the N-GaN layer 3 of paddle-tumble bottom, and most of N electrode 8 directly contacts with Sapphire Substrate 5.
Embodiment of the invention light emitting diode with vertical structure manufacturing method of chip shown in Fig. 1-5, comprises following processing step:
1, evaporation metal on P-GaN layer 1 obtains P electrode ohmic contact layer and reflector layer;
2, decide 30-80 μ m metal as metal supporting layer 6, as shown in Figure 2 in above-mentioned metal surface nation;
3, with 5 mechanical lappings of wafer rear Sapphire Substrate, making residue sapphire layer thickness is 25-50 μ m, as shown in Figure 3;
4, laser paddle-tumble on sapphire according to doing die size, is adjusted the paddle-tumble spacing, is 27-50 μ m deeply according to sapphire THICKNESS CONTROL paddle-tumble 9, and width is 30-60 μ m;
5, on the metal of wafer frontside the growth protecting layer as SIO
2(or) SI
3N
4
6, with sulfuric acid+phosphoric acid solution (high temperature 150-300 ℃), the corrosion Cutting Road in the control time, guarantees to erode to N-GaN layer 3;
7, make N electrode 8 on the wafer rear sapphire, a part of N electrode 8 is directly contacted with N-GaN layer 3, this part electrode covers the paddle-tumble bottom; Another part electrode comprises that N-PAD and Sapphire Substrate 5 adhere to, and this part electrode is than the big 10-50 μ of N-PAD m;
8, cut into the chip of required size.
In fact attempt to grind the whole Sapphire Substrate 5 of removal by attenuate, in the existing equipment condition is impossible stablely to implement, and the gross thickness of resilient coating 4 and N-GaN layer 3 generally can not surpass 8 μ m on the conventional epitaxial loayer, remove whole sapphire layers by mechanical lapping, because the restriction of mechanical grinding device machining accuracy, the zone that the zone that can cause whole crystal column surface to have still has sapphire layer, have has been ground to N-GaN layer 3 even whole epitaxial loayers, cause the product yield low, produce uncontrollable situation.
In order to realize above-mentioned process route, the technical process of the embodiment of the invention is: growth reflector layer and ohmic contact layer on epitaxial layer of gallium nitride P-GaN layer 1, and belong to supporting layer 6 at ohmic contact laminar surface nation deposit, this layer metal thickness is at 30-80 μ m, this layer metal can be selected that heat conductivility is good, the material internal stress is low, material is inexpensive and be convenient to the material of follow-up encapsulation, as the copper metal etc.Nation surely can be by modes such as plating or eutectics.By mechanical lapping Sapphire Substrate 5, control its residual sapphire layer thickness about 25-50 μ m; Parameters such as the scribing speed by adjusting the laser machine, laser power, laser frequency mark the crisscross paddle-tumble 9 of definite shape on sapphire surface, the degree of depth of these paddle-tumbles 9 is at 27-50 μ m, width 30-60 μ m, and the paddle-tumble bottom is a N-GaN layer 3; Because N-GaN layer 3 has 3-5 μ m thickness, therefore can guarantee that paddle-tumble 9 is at N-GaN layer 3; Can produce a lot of products during the laser paddle-tumble, and the degree of depth that laser marks has certain difference, re-use sulfuric acid+phosphoric acid solution, under high temperature 150-300 ℃ situation, corrosion laser cutting product, expose N-GaN layer 3 fully, guarantee that so follow-up N electrode 8 can have excellent contact with N-GaN layer 3, the paddle-tumble side also can increase bright dipping simultaneously; Make N electrode 8 at wafer rear, guarantee that the partial electrode metal contacts with the N-GaN layer 3 of paddle-tumble bottom, most of N electrode 8 directly contacts with Sapphire Substrate 5.By cutting equipment wafer is divided into tube core at last.
Use the LED of embodiment of the invention vertical stratification, light-emitting area increases 10-20%, and thermal resistance is less than 1/3 of same size transversary chip, and brightness improves 20-30%.
Embodiment 1:
Step 1: evaporation Ti/Al/Ni/Au on P-GaN layer 1 obtains P electrode ohmic contact layer and reflector layer (accompanying drawing does not identify);
Step 2:,, obtain 35 μ m copper coating metals as metal supporting layer 6 by electroplating in above-mentioned metal surface;
Step 3: with 5 mechanical lappings of wafer rear Sapphire Substrate, making residue sapphire layer thickness is 30 μ m;
Step 4: laser paddle-tumble on sapphire, according to doing die size, adjust and draw track pitch, drawing according to sapphire THICKNESS CONTROL is 35 μ m deeply, width is 40 μ m;
Step 5: growth protecting layer: SIO on the metal supporting layer 6 of wafer frontside
2
Step 6: with sulfuric acid+phosphoric acid solution, the corrosion Cutting Road, control time and corrosion temperature guarantee to erode to the N-GaN layer 3 in the laser paddle-tumble;
Step 7: make N electrode 8 at wafer rear sapphire face, a part of N electrode 8 is directly contacted with N-GaN, another part electrode comprises that N-PAD and Sapphire Substrate 5 adhere to;
Step 8: the chip that cuts into required size.
Embodiment 2:
Step 1: evaporation Ti/Al on P-GaN layer 1 obtains P electrode ohmic contact layer and reflector layer (accompanying drawing does not identify);
Step 2:,, obtain 75 μ m copper coating metals as metal supporting layer 6 by electroplating in above-mentioned metal surface;
Step 3: with 5 mechanical lappings of wafer rear Sapphire Substrate, making residue sapphire layer thickness is 45 μ m;
Step 4: laser paddle-tumble on sapphire, according to doing die size, adjust and draw track pitch, drawing according to sapphire THICKNESS CONTROL is 40 μ m deeply, width is 55 μ m;
Step 5: growth protecting layer on the metal supporting layer 6 of wafer frontside: as SI
3N
4
Step 6: with sulfuric acid+phosphoric acid solution, the corrosion Cutting Road, control time and corrosion temperature guarantee to erode to the N-GaN layer 3 in the laser paddle-tumble;
Step 7: make N electrode 8 at wafer rear sapphire face, a part of N electrode 8 is directly contacted with N-GaN, another part electrode comprises that N-PAD and Sapphire Substrate 5 adhere to;
Step 8: the chip that cuts into required size.
Claims (7)
1. light emitting diode with vertical structure manufacturing method of chip is characterized in that: comprise following process steps:
A. evaporation metal on the P-GaN layer obtains P electrode ohmic contact layer and reflector layer;
B. belong to supporting layer at above-mentioned metal surface nation deposit;
C. with the mechanical lapping of wafer rear Sapphire Substrate;
D. laser paddle-tumble on sapphire according to doing die size, is adjusted the paddle-tumble spacing, according to the sapphire THICKNESS CONTROL paddle-tumble degree of depth and width;
E. use sulfuric acid+phosphoric acid solution, the corrosion Cutting Road in the control time, erodes to the N-GaN layer;
F. make the N electrode on the wafer rear sapphire, a part of N electrode is directly contacted with the N-GaN layer, bottom this part electrode covering paddle-tumble, another part electrode comprises that N electrode pad N-PAD and Sapphire Substrate adhere to;
G. cut into the chip of required size.
2. light emitting diode with vertical structure manufacturing method of chip according to claim 1 is characterized in that: nation's deposit belongs to the thickness of supporting layer at 30-80 μ m.
3. light emitting diode with vertical structure manufacturing method of chip according to claim 1 is characterized in that: the mechanical lapping Sapphire Substrate, making residue sapphire layer thickness is 25-50 μ m.
4. light emitting diode with vertical structure manufacturing method of chip according to claim 1 is characterized in that: the laser paddle-tumble is 27-50 μ m according to sapphire THICKNESS CONTROL paddle-tumble deeply, and width is 30-60 μ m.
5. light emitting diode with vertical structure manufacturing method of chip according to claim 1 is characterized in that: use phosphoric acid+sulfuric acid high temperature to corrode paddle-tumble down at 150-300 ℃.
6. light emitting diode with vertical structure manufacturing method of chip according to claim 1 is characterized in that: metal supporting layer nation decides mode and comprises plating or eutectic.
7. light-emitting diode chip with vertical structure, comprise P-GaN layer, quantum well layer, N-GaN layer, resilient coating, Sapphire Substrate, they connect successively, it is characterized in that: also comprise P electrode ohmic contact layer, reflector layer, metal supporting layer, N electrode and paddle-tumble; P electrode ohmic contact layer and reflector layer are arranged on the P-GaN layer, it is 30-80 μ m metal supporting layer that ohmic contact laminar surface nation decides thickness, crisscross paddle-tumble is marked on surface in 25-50 μ m Sapphire Substrate, the degree of depth of these paddle-tumbles is at 27-50 μ m, width 30-60 μ m, the paddle-tumble bottom is the N-GaN layer; Make the N electrode on the wafer rear sapphire, part N electrode metal contacts with the N-GaN layer of paddle-tumble bottom, and most of N electrode directly contacts with Sapphire Substrate.
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| CN102162598A (en) * | 2010-12-29 | 2011-08-24 | 映瑞光电科技(上海)有限公司 | White light LED lighting device |
| CN102768950A (en) * | 2012-07-12 | 2012-11-07 | 江苏扬景光电有限公司 | Method for forming holes in substrate of nitride device by mixing type etching |
| CN102769079A (en) * | 2012-07-16 | 2012-11-07 | 江苏扬景光电有限公司 | Method for manufacturing p-type and n-type semiconductor light extraction vertical conduction LED (light-emitting diode) |
| CN102769079B (en) * | 2012-07-16 | 2015-02-25 | 南通玺运贸易有限公司 | Method for manufacturing p-type and n-type semiconductor light extraction vertical conduction LED (light-emitting diode) |
| CN102969418A (en) * | 2012-11-30 | 2013-03-13 | 中国科学院半导体研究所 | Structure of gallium nitride based light-emitting diode with 3D (Three-Dimensional) vertical structure |
| CN102969418B (en) * | 2012-11-30 | 2015-02-18 | 中国科学院半导体研究所 | Structure of gallium nitride based light-emitting diode with 3D (Three-Dimensional) vertical structure |
| WO2014107955A1 (en) * | 2013-01-14 | 2014-07-17 | 上海蓝光科技有限公司 | Light-emitting diode and manufacturing method therefor |
| CN110518106A (en) * | 2019-08-02 | 2019-11-29 | 晶能光电（江西）有限公司 | A kind of thin-film LED preparation method |
| CN110620139A (en) * | 2019-09-03 | 2019-12-27 | 常山弘远电子有限公司 | AC-DC high-voltage freewheeling diode chip structure |
| CN114720842A (en) * | 2022-06-08 | 2022-07-08 | 合肥新晶集成电路有限公司 | Preparation method of failure analysis structure and failure analysis method |
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